From 31a5504f564ead2fd726a824d2d1b6a0af40aac0 Mon Sep 17 00:00:00 2001 From: Sarthak Garg Date: Wed, 20 Jan 2021 19:08:25 +0530 Subject: [PATCH] mmc: host: sdhci-msm: Don't clear IO_PAD_PWR_SWITCH when faking 3V support Don't clear io pad power switch setting when 3V support is faked. This bit has to be cleared for allowing IO pad to switch to 3V when Vccq is really configured to 3V. But in case of faking 3V where we configure Vccq to 1.8V only, we shouldn't clear this bit. Change-Id: I15c7e3f49703c3ac31d59d7d4bfbd81f3c2dc028 Signed-off-by: Sarthak Garg --- drivers/mmc/host/sdhci-msm.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index ffc10a63127c..8718cd19970c 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -443,7 +443,7 @@ struct sdhci_msm_host { struct delayed_work bus_vote_work; struct delayed_work clk_gating_work; bool pltfm_init_done; - bool core_3_0v_support; + bool fake_core_3_0v_support; bool use_7nm_dll; struct sdhci_msm_dll_hsr *dll_hsr; struct sdhci_msm_regs_restore regs_restore; @@ -1822,7 +1822,7 @@ static bool sdhci_msm_populate_pdata(struct device *dev, } if (of_get_property(np, "qcom,core_3_0v_support", NULL)) - msm_host->core_3_0v_support = true; + msm_host->fake_core_3_0v_support = true; msm_host->regs_restore.is_supported = of_property_read_bool(np, "qcom,restore-after-cx-collapse"); @@ -2388,7 +2388,8 @@ static void sdhci_msm_handle_pwr_irq(struct sdhci_host *host, int irq) new_config = config; if ((io_level & REQ_IO_HIGH) && - (msm_host->caps_0 & CORE_3_0V_SUPPORT)) + (msm_host->caps_0 & CORE_3_0V_SUPPORT) && + !msm_host->fake_core_3_0v_support) new_config &= ~CORE_IO_PAD_PWR_SWITCH; else if ((io_level & REQ_IO_LOW) || (msm_host->caps_0 & CORE_1_8V_SUPPORT)) @@ -3523,7 +3524,7 @@ static void sdhci_set_default_hw_caps(struct sdhci_msm_host *msm_host, msm_host->use_14lpp_dll_reset = true; /* Fake 3.0V support for SDIO devices which requires such voltage */ - if (msm_host->core_3_0v_support) { + if (msm_host->fake_core_3_0v_support) { caps |= CORE_3_0V_SUPPORT; writel_relaxed((readl_relaxed(host->ioaddr + SDHCI_CAPABILITIES) | caps), host->ioaddr +