mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 11:11:45 -04:00
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (34 commits) powerpc: Wireup new syscalls Move update_mmu_cache() declaration from tlbflush.h to pgtable.h powerpc/pseries: Remove kmalloc call in handling writes to lparcfg powerpc/pseries: Update arch vector to indicate support for CMO ibmvfc: Add support for collaborative memory overcommit ibmvscsi: driver enablement for CMO ibmveth: enable driver for CMO ibmveth: Automatically enable larger rx buffer pools for larger mtu powerpc/pseries: Verify CMO memory entitlement updates with virtual I/O powerpc/pseries: vio bus support for CMO powerpc/pseries: iommu enablement for CMO powerpc/pseries: Add CMO paging statistics powerpc/pseries: Add collaborative memory manager powerpc/pseries: Utilities to set firmware page state powerpc/pseries: Enable CMO feature during platform setup powerpc/pseries: Split retrieval of processor entitlement data into a helper routine powerpc/pseries: Add memory entitlement capabilities to /proc/ppc64/lparcfg powerpc/pseries: Split processor entitlement retrieval and gathering to helper routines powerpc/pseries: Remove extraneous error reporting for hcall failures in lparcfg powerpc: Fix compile error with binutils 2.15 ... Fixed up conflict in arch/powerpc/platforms/52xx/Kconfig manually.
This commit is contained in:
commit
5047887caf
49 changed files with 2546 additions and 277 deletions
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@ -127,6 +127,8 @@ extern struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr);
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extern void do_feature_fixups(unsigned long value, void *fixup_start,
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void *fixup_end);
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extern const char *powerpc_base_platform;
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#endif /* __ASSEMBLY__ */
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/* CPU kernel features */
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@ -217,6 +217,14 @@ typedef elf_vrregset_t elf_fpxregset_t;
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#define ELF_PLATFORM (cur_cpu_spec->platform)
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/* While ELF_PLATFORM indicates the ISA supported by the platform, it
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* may not accurately reflect the underlying behavior of the hardware
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* (as in the case of running in Power5+ compatibility mode on a
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* Power6 machine). ELF_BASE_PLATFORM allows ld.so to load libraries
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* that are tuned for the real hardware.
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*/
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#define ELF_BASE_PLATFORM (powerpc_base_platform)
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#ifdef __powerpc64__
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# define ELF_PLAT_INIT(_r, load_addr) do { \
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_r->gpr[2] = load_addr; \
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@ -46,6 +46,7 @@
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#define FW_FEATURE_PS3_LV1 ASM_CONST(0x0000000000800000)
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#define FW_FEATURE_BEAT ASM_CONST(0x0000000001000000)
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#define FW_FEATURE_BULK_REMOVE ASM_CONST(0x0000000002000000)
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#define FW_FEATURE_CMO ASM_CONST(0x0000000004000000)
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#ifndef __ASSEMBLY__
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@ -58,7 +59,7 @@ enum {
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FW_FEATURE_MIGRATE | FW_FEATURE_PERFMON | FW_FEATURE_CRQ |
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FW_FEATURE_VIO | FW_FEATURE_RDMA | FW_FEATURE_LLAN |
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FW_FEATURE_BULK | FW_FEATURE_XDABR | FW_FEATURE_MULTITCE |
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FW_FEATURE_SPLPAR | FW_FEATURE_LPAR,
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FW_FEATURE_SPLPAR | FW_FEATURE_LPAR | FW_FEATURE_CMO,
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FW_FEATURE_PSERIES_ALWAYS = 0,
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FW_FEATURE_ISERIES_POSSIBLE = FW_FEATURE_ISERIES | FW_FEATURE_LPAR,
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FW_FEATURE_ISERIES_ALWAYS = FW_FEATURE_ISERIES | FW_FEATURE_LPAR,
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@ -92,6 +92,11 @@
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#define H_EXACT (1UL<<(63-24)) /* Use exact PTE or return H_PTEG_FULL */
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#define H_R_XLATE (1UL<<(63-25)) /* include a valid logical page num in the pte if the valid bit is set */
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#define H_READ_4 (1UL<<(63-26)) /* Return 4 PTEs */
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#define H_PAGE_STATE_CHANGE (1UL<<(63-28))
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#define H_PAGE_UNUSED ((1UL<<(63-29)) | (1UL<<(63-30)))
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#define H_PAGE_SET_UNUSED (H_PAGE_STATE_CHANGE | H_PAGE_UNUSED)
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#define H_PAGE_SET_LOANED (H_PAGE_SET_UNUSED | (1UL<<(63-31)))
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#define H_PAGE_SET_ACTIVE H_PAGE_STATE_CHANGE
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#define H_AVPN (1UL<<(63-32)) /* An avpn is provided as a sanity test */
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#define H_ANDCOND (1UL<<(63-33))
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#define H_ICACHE_INVALIDATE (1UL<<(63-40)) /* icbi, etc. (ignored for IO pages) */
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@ -210,7 +215,9 @@
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#define H_JOIN 0x298
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#define H_VASI_STATE 0x2A4
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#define H_ENABLE_CRQ 0x2B0
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#define MAX_HCALL_OPCODE H_ENABLE_CRQ
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#define H_SET_MPP 0x2D0
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#define H_GET_MPP 0x2D4
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#define MAX_HCALL_OPCODE H_GET_MPP
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#ifndef __ASSEMBLY__
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@ -270,6 +277,20 @@ struct hcall_stats {
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};
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#define HCALL_STAT_ARRAY_SIZE ((MAX_HCALL_OPCODE >> 2) + 1)
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struct hvcall_mpp_data {
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unsigned long entitled_mem;
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unsigned long mapped_mem;
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unsigned short group_num;
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unsigned short pool_num;
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unsigned char mem_weight;
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unsigned char unallocated_mem_weight;
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unsigned long unallocated_entitlement; /* value in bytes */
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unsigned long pool_size;
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signed long loan_request;
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unsigned long backing_mem;
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};
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int h_get_mpp(struct hvcall_mpp_data *);
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_HVCALL_H */
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@ -125,7 +125,10 @@ struct lppaca {
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// NOTE: This value will ALWAYS be zero for dedicated processors and
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// will NEVER be zero for shared processors (ie, initialized to a 1).
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volatile u32 yield_count; // PLIC increments each dispatchx00-x03
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u8 reserved6[124]; // Reserved x04-x7F
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u32 reserved6;
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volatile u64 cmo_faults; // CMO page fault count x08-x0F
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volatile u64 cmo_fault_time; // CMO page fault time x10-x17
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u8 reserved7[104]; // Reserved x18-x7F
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//=============================================================================
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// CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data
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@ -76,7 +76,7 @@ struct machdep_calls {
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* destroyed as well */
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void (*hpte_clear_all)(void);
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void (*tce_build)(struct iommu_table * tbl,
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int (*tce_build)(struct iommu_table *tbl,
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long index,
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long npages,
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unsigned long uaddr,
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@ -60,10 +60,12 @@
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#define MPC52xx_PSC_RXTX_FIFO_ALARM 0x0002
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#define MPC52xx_PSC_RXTX_FIFO_EMPTY 0x0001
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/* PSC interrupt mask bits */
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/* PSC interrupt status/mask bits */
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#define MPC52xx_PSC_IMR_TXRDY 0x0100
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#define MPC52xx_PSC_IMR_RXRDY 0x0200
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#define MPC52xx_PSC_IMR_DB 0x0400
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#define MPC52xx_PSC_IMR_TXEMP 0x0800
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#define MPC52xx_PSC_IMR_ORERR 0x1000
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#define MPC52xx_PSC_IMR_IPC 0x8000
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/* PSC input port change bit */
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@ -92,6 +94,34 @@
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#define MPC52xx_PSC_RFNUM_MASK 0x01ff
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#define MPC52xx_PSC_SICR_DTS1 (1 << 29)
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#define MPC52xx_PSC_SICR_SHDR (1 << 28)
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#define MPC52xx_PSC_SICR_SIM_MASK (0xf << 24)
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#define MPC52xx_PSC_SICR_SIM_UART (0x0 << 24)
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#define MPC52xx_PSC_SICR_SIM_UART_DCD (0x8 << 24)
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#define MPC52xx_PSC_SICR_SIM_CODEC_8 (0x1 << 24)
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#define MPC52xx_PSC_SICR_SIM_CODEC_16 (0x2 << 24)
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#define MPC52xx_PSC_SICR_SIM_AC97 (0x3 << 24)
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#define MPC52xx_PSC_SICR_SIM_SIR (0x8 << 24)
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#define MPC52xx_PSC_SICR_SIM_SIR_DCD (0xc << 24)
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#define MPC52xx_PSC_SICR_SIM_MIR (0x5 << 24)
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#define MPC52xx_PSC_SICR_SIM_FIR (0x6 << 24)
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#define MPC52xx_PSC_SICR_SIM_CODEC_24 (0x7 << 24)
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#define MPC52xx_PSC_SICR_SIM_CODEC_32 (0xf << 24)
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#define MPC52xx_PSC_SICR_GENCLK (1 << 23)
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#define MPC52xx_PSC_SICR_I2S (1 << 22)
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#define MPC52xx_PSC_SICR_CLKPOL (1 << 21)
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#define MPC52xx_PSC_SICR_SYNCPOL (1 << 20)
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#define MPC52xx_PSC_SICR_CELLSLAVE (1 << 19)
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#define MPC52xx_PSC_SICR_CELL2XCLK (1 << 18)
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#define MPC52xx_PSC_SICR_ESAI (1 << 17)
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#define MPC52xx_PSC_SICR_ENAC97 (1 << 16)
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#define MPC52xx_PSC_SICR_SPI (1 << 15)
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#define MPC52xx_PSC_SICR_MSTR (1 << 14)
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#define MPC52xx_PSC_SICR_CPOL (1 << 13)
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#define MPC52xx_PSC_SICR_CPHA (1 << 12)
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#define MPC52xx_PSC_SICR_USEEOF (1 << 11)
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#define MPC52xx_PSC_SICR_DISABLEEOF (1 << 10)
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/* Structure of the hardware registers */
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struct mpc52xx_psc {
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@ -132,8 +162,12 @@ struct mpc52xx_psc {
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u8 reserved5[3];
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u8 ctlr; /* PSC + 0x1c */
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u8 reserved6[3];
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u16 ccr; /* PSC + 0x20 */
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u8 reserved7[14];
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/* BitClkDiv field of CCR is byte swapped in
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* the hardware for mpc5200/b compatibility */
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u32 ccr; /* PSC + 0x20 */
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u32 ac97_slots; /* PSC + 0x24 */
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u32 ac97_cmd; /* PSC + 0x28 */
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u32 ac97_data; /* PSC + 0x2c */
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u8 ivr; /* PSC + 0x30 */
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u8 reserved8[3];
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u8 ip; /* PSC + 0x34 */
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@ -38,6 +38,19 @@ extern void paging_init(void);
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remap_pfn_range(vma, vaddr, pfn, size, prot)
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#include <asm-generic/pgtable.h>
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/*
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* This gets called at the end of handling a page fault, when
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* the kernel has put a new PTE into the page table for the process.
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* We use it to ensure coherency between the i-cache and d-cache
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* for the page which has just been mapped in.
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* On machines which use an MMU hash table, we use this to put a
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* corresponding HPTE into the hash table ahead of time, instead of
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* waiting for the inevitable extra hash-table miss exception.
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*/
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extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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@ -31,6 +31,7 @@ asmlinkage int sys_vfork(unsigned long p1, unsigned long p2,
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unsigned long p3, unsigned long p4, unsigned long p5,
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unsigned long p6, struct pt_regs *regs);
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asmlinkage long sys_pipe(int __user *fildes);
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asmlinkage long sys_pipe2(int __user *fildes, int flags);
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asmlinkage long sys_rt_sigaction(int sig,
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const struct sigaction __user *act,
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struct sigaction __user *oact, size_t sigsetsize);
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@ -316,3 +316,9 @@ COMPAT_SYS(fallocate)
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SYSCALL(subpage_prot)
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COMPAT_SYS_SPU(timerfd_settime)
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COMPAT_SYS_SPU(timerfd_gettime)
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COMPAT_SYS_SPU(signalfd4)
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SYSCALL_SPU(eventfd2)
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SYSCALL_SPU(epoll_create1)
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SYSCALL_SPU(dup3)
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SYSCALL_SPU(pipe2)
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SYSCALL(inotify_init1)
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@ -110,6 +110,8 @@ static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; }
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#endif
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extern int set_dabr(unsigned long dabr);
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extern void do_dabr(struct pt_regs *regs, unsigned long address,
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unsigned long error_code);
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extern void print_backtrace(unsigned long *);
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extern void show_regs(struct pt_regs * regs);
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extern void flush_instruction_cache(void);
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@ -162,16 +162,5 @@ extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
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#endif
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/*
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* This gets called at the end of handling a page fault, when
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* the kernel has put a new PTE into the page table for the process.
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* We use it to ensure coherency between the i-cache and d-cache
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* for the page which has just been mapped in.
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* On machines which use an MMU hash table, we use this to put a
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* corresponding HPTE into the hash table ahead of time, instead of
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* waiting for the inevitable extra hash-table miss exception.
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*/
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extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
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#endif /*__KERNEL__ */
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#endif /* _ASM_POWERPC_TLBFLUSH_H */
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@ -335,10 +335,16 @@
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#define __NR_subpage_prot 310
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#define __NR_timerfd_settime 311
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#define __NR_timerfd_gettime 312
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#define __NR_signalfd4 313
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#define __NR_eventfd2 314
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#define __NR_epoll_create1 315
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#define __NR_dup3 316
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#define __NR_pipe2 317
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#define __NR_inotify_init1 318
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#ifdef __KERNEL__
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#define __NR_syscalls 313
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#define __NR_syscalls 319
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#define __NR__exit __NR_exit
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#define NR_syscalls __NR_syscalls
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@ -39,16 +39,32 @@
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#define VIO_IRQ_DISABLE 0UL
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#define VIO_IRQ_ENABLE 1UL
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/*
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* VIO CMO minimum entitlement for all devices and spare entitlement
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*/
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#define VIO_CMO_MIN_ENT 1562624
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struct iommu_table;
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/*
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* The vio_dev structure is used to describe virtual I/O devices.
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/**
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* vio_dev - This structure is used to describe virtual I/O devices.
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*
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* @desired: set from return of driver's get_desired_dma() function
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* @entitled: bytes of IO data that has been reserved for this device.
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* @allocated: bytes of IO data currently in use by the device.
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* @allocs_failed: number of DMA failures due to insufficient entitlement.
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*/
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struct vio_dev {
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const char *name;
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const char *type;
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uint32_t unit_address;
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unsigned int irq;
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struct {
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size_t desired;
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size_t entitled;
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size_t allocated;
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atomic_t allocs_failed;
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} cmo;
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struct device dev;
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};
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@ -56,12 +72,19 @@ struct vio_driver {
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const struct vio_device_id *id_table;
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int (*probe)(struct vio_dev *dev, const struct vio_device_id *id);
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int (*remove)(struct vio_dev *dev);
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/* A driver must have a get_desired_dma() function to
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* be loaded in a CMO environment if it uses DMA.
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*/
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unsigned long (*get_desired_dma)(struct vio_dev *dev);
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struct device_driver driver;
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};
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extern int vio_register_driver(struct vio_driver *drv);
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extern void vio_unregister_driver(struct vio_driver *drv);
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extern int vio_cmo_entitlement_update(size_t);
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extern void vio_cmo_set_dev_desired(struct vio_dev *viodev, size_t desired);
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extern void __devinit vio_unregister_device(struct vio_dev *dev);
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struct device_node;
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