From 50d1dbe31d29e3bf32b76a00bdfb7032aaa27e96 Mon Sep 17 00:00:00 2001 From: Sai Chaitanya Kaveti Date: Fri, 8 Oct 2021 17:43:13 +0530 Subject: [PATCH] ARM: dts: msm: Update of RC PCIe PHY settings to V1.08 for sdxlemur Update of RC PCIe PHY setting to version V1.08 based on hardware recommendation for sdxlemur as per HSR. Change-Id: I73f97619b31fd6a1002b62017f0454a721b4b5d1 --- qcom/sdxlemur-pcie.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/qcom/sdxlemur-pcie.dtsi b/qcom/sdxlemur-pcie.dtsi index cdfb037da0ba..56b030f1335a 100644 --- a/qcom/sdxlemur-pcie.dtsi +++ b/qcom/sdxlemur-pcie.dtsi @@ -116,7 +116,7 @@ qcom,ep-latency = <10>; qcom,num-parf-testbus-sel = <0xb9>; - qcom,pcie-phy-ver = <1102>; + qcom,pcie-phy-ver = <1108>; qcom,phy-status-offset = <0x1214>; qcom,phy-status-bit = <7>; qcom,phy-power-down-offset = <0x1240>; @@ -159,7 +159,7 @@ 0x1168 0x0a 0x0 0x116c 0x04 0x0 0x119c 0x88 0x0 - 0x1174 0x20 0x0 + 0x1174 0x60 0x0 0x117c 0x06 0x0 0x11a0 0x14 0x0 0x11a8 0x0f 0x0 @@ -266,6 +266,8 @@ 0x1584 0x28 0x0 0x1370 0x2e 0x0 0x155c 0x2e 0x0 + 0x140c 0x1d 0x0 + 0x1388 0xaa 0x0 0x1200 0x00 0x0 0x1244 0x03 0x0>;