mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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MTD updates for 3.18
NAND
* Cleanup for Denali driver
* Atmel: add support for new page sizes
* Atmel: fix up 'raw' mode support
* Atmel: miscellaneous cleanups
* New timing mode helpers for non-ONFI NAND
* OMAP: allow driver to be (properly) built as a module
* bcm47xx: RESET support and other cleanups
SPI NOR
* Miscellaneous cleanups, to prepare framework for wider use (some further
work still pending)
* Compile-time configuration to select 4K vs. 64K support for flash that
support both (necessary for using UBIFS on some SPI NOR)
A few scattered code quality fixes, detected by Coverity
See the changesets for more.
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Merge tag 'for-linus-20141015' of git://git.infradead.org/linux-mtd
Pull MTD update from Brian Norris:
"Sorry for delaying this a bit later than usual. There's one mild
regression from 3.16 that was noticed during the 3.17 cycle, and I
meant to send a fix for it along with this pull request. I'll
probably try to queue it up for a later pull request once I've had a
better look at it, hopefully by -rc2 at the latest.
Summary for this pull:
NAND
- Cleanup for Denali driver
- Atmel: add support for new page sizes
- Atmel: fix up 'raw' mode support
- Atmel: miscellaneous cleanups
- New timing mode helpers for non-ONFI NAND
- OMAP: allow driver to be (properly) built as a module
- bcm47xx: RESET support and other cleanups
SPI NOR
- Miscellaneous cleanups, to prepare framework for wider use (some
further work still pending)
- Compile-time configuration to select 4K vs. 64K support for flash
that support both (necessary for using UBIFS on some SPI NOR)
A few scattered code quality fixes, detected by Coverity
See the changesets for more"
* tag 'for-linus-20141015' of git://git.infradead.org/linux-mtd: (59 commits)
mtd: nand: omap: Correct CONFIG_MTD_NAND_OMAP_BCH help message
mtd: nand: Force omap_elm to be built as a module if omap2_nand is a module
mtd: move support for struct flash_platform_data into m25p80
mtd: spi-nor: add Kconfig option to disable 4K sectors
mtd: nand: Move ELM driver and rename as omap_elm
nand: omap2: Replace pr_err with dev_err
nand: omap2: Remove horrible ifdefs to fix module probe
mtd: nand: add Hynix's H27UCG8T2ATR-BC to nand_ids table
mtd: nand: support ONFI timing mode retrieval for non-ONFI NANDs
mtd: physmap_of: Add non-obsolete map_rom probe
mtd: physmap_of: Fix ROM support via OF
MAINTAINERS: add l2-mtd.git, 'next' tree for MTD
mtd: denali: fix indents and other trivial things
mtd: denali: remove unnecessary parentheses
mtd: denali: remove another set-but-unused variable
mtd: denali: fix include guard and license block of denali.h
mtd: nand: don't break long print messages
mtd: bcm47xxnflash: replace some magic numbers
mtd: bcm47xxnflash: NAND_CMD_RESET support
mtd: bcm47xxnflash: add cmd_ctrl handler
...
This commit is contained in:
Linus Torvalds
commit
511c41d9e6
45 changed files with 757 additions and 562 deletions
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@ -153,7 +153,7 @@ struct cfi_ident {
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uint16_t MaxBufWriteSize;
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uint8_t NumEraseRegions;
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uint32_t EraseRegionInfo[0]; /* Not host ordered */
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} __attribute__((packed));
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} __packed;
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/* Extended Query Structure for both PRI and ALT */
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@ -161,7 +161,7 @@ struct cfi_extquery {
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uint8_t pri[3];
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uint8_t MajorVersion;
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uint8_t MinorVersion;
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} __attribute__((packed));
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} __packed;
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/* Vendor-Specific PRI for Intel/Sharp Extended Command Set (0x0001) */
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@ -180,7 +180,7 @@ struct cfi_pri_intelext {
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uint8_t FactProtRegSize;
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uint8_t UserProtRegSize;
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uint8_t extra[0];
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} __attribute__((packed));
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} __packed;
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struct cfi_intelext_otpinfo {
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uint32_t ProtRegAddr;
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@ -188,7 +188,7 @@ struct cfi_intelext_otpinfo {
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uint8_t FactProtRegSize;
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uint16_t UserGroups;
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uint8_t UserProtRegSize;
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} __attribute__((packed));
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} __packed;
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struct cfi_intelext_blockinfo {
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uint16_t NumIdentBlocks;
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@ -196,7 +196,7 @@ struct cfi_intelext_blockinfo {
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uint16_t MinBlockEraseCycles;
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uint8_t BitsPerCell;
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uint8_t BlockCap;
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} __attribute__((packed));
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} __packed;
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struct cfi_intelext_regioninfo {
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uint16_t NumIdentPartitions;
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@ -205,7 +205,7 @@ struct cfi_intelext_regioninfo {
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uint8_t NumOpAllowedSimEraMode;
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uint8_t NumBlockTypes;
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struct cfi_intelext_blockinfo BlockTypes[1];
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} __attribute__((packed));
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} __packed;
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struct cfi_intelext_programming_regioninfo {
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uint8_t ProgRegShift;
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@ -214,7 +214,7 @@ struct cfi_intelext_programming_regioninfo {
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uint8_t Reserved2;
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uint8_t ControlInvalid;
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uint8_t Reserved3;
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} __attribute__((packed));
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} __packed;
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/* Vendor-Specific PRI for AMD/Fujitsu Extended Command Set (0x0002) */
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@ -233,7 +233,7 @@ struct cfi_pri_amdstd {
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uint8_t VppMin;
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uint8_t VppMax;
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uint8_t TopBottom;
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} __attribute__((packed));
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} __packed;
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/* Vendor-Specific PRI for Atmel chips (command set 0x0002) */
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@ -245,18 +245,18 @@ struct cfi_pri_atmel {
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uint8_t BottomBoot;
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uint8_t BurstMode;
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uint8_t PageMode;
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} __attribute__((packed));
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} __packed;
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struct cfi_pri_query {
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uint8_t NumFields;
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uint32_t ProtField[1]; /* Not host ordered */
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} __attribute__((packed));
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} __packed;
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struct cfi_bri_query {
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uint8_t PageModeReadCap;
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uint8_t NumFields;
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uint32_t ConfField[1]; /* Not host ordered */
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} __attribute__((packed));
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} __packed;
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#define P_ID_NONE 0x0000
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#define P_ID_INTEL_EXT 0x0001
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@ -587,6 +587,11 @@ struct nand_buffers {
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* @ecc_step_ds: [INTERN] ECC step required by the @ecc_strength_ds,
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* also from the datasheet. It is the recommended ECC step
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* size, if known; if unknown, set to zero.
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* @onfi_timing_mode_default: [INTERN] default ONFI timing mode. This field is
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* either deduced from the datasheet if the NAND
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* chip is not ONFI compliant or set to 0 if it is
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* (an ONFI chip is always configured in mode 0
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* after a NAND reset)
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* @numchips: [INTERN] number of physical chips
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* @chipsize: [INTERN] the size of one chip for multichip arrays
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* @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
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@ -671,6 +676,7 @@ struct nand_chip {
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uint8_t bits_per_cell;
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uint16_t ecc_strength_ds;
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uint16_t ecc_step_ds;
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int onfi_timing_mode_default;
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int badblockpos;
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int badblockbits;
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@ -766,12 +772,17 @@ struct nand_chip {
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* @options: stores various chip bit options
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* @id_len: The valid length of the @id.
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* @oobsize: OOB size
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* @ecc: ECC correctability and step information from the datasheet.
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* @ecc.strength_ds: The ECC correctability from the datasheet, same as the
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* @ecc_strength_ds in nand_chip{}.
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* @ecc.step_ds: The ECC step required by the @ecc.strength_ds, same as the
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* @ecc_step_ds in nand_chip{}, also from the datasheet.
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* For example, the "4bit ECC for each 512Byte" can be set with
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* NAND_ECC_INFO(4, 512).
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* @onfi_timing_mode_default: the default ONFI timing mode entered after a NAND
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* reset. Should be deduced from timings described
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* in the datasheet.
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*
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*/
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struct nand_flash_dev {
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char *name;
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@ -792,6 +803,7 @@ struct nand_flash_dev {
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uint16_t strength_ds;
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uint16_t step_ds;
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} ecc;
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int onfi_timing_mode_default;
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};
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/**
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@ -42,8 +42,24 @@ struct elm_errorvec {
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int error_loc[16];
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};
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#if IS_ENABLED(CONFIG_MTD_NAND_OMAP_BCH)
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void elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc,
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struct elm_errorvec *err_vec);
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int elm_config(struct device *dev, enum bch_ecc bch_type,
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int ecc_steps, int ecc_step_size, int ecc_syndrome_size);
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#else
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static inline void
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elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc,
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struct elm_errorvec *err_vec)
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{
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}
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static inline int elm_config(struct device *dev, enum bch_ecc bch_type,
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int ecc_steps, int ecc_step_size,
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int ecc_syndrome_size)
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{
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return -ENOSYS;
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}
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#endif /* CONFIG_MTD_NAND_ECC_BCH */
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#endif /* __ELM_H */
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@ -71,6 +71,7 @@ struct omap_nand_platform_data {
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struct mtd_partition *parts;
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int nr_parts;
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bool dev_ready;
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bool flash_bbt;
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enum nand_io xfer_type;
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int devsize;
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enum omap_ecc ecc_opt;
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