mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 03:01:39 -04:00
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (262 commits) sh: mach-ecovec24: Add user debug switch support sh: Kill off unused se_skipped in alignment trap notification code. sh: Wire up HAVE_SYSCALL_TRACEPOINTS. video: sh_mobile_lcdcfb: use both register sets for display panning video: sh_mobile_lcdcfb: implement display panning sh: Fix up sh7705 flush_dcache_page() build. sh: kfr2r09: document the PLL/FLL <-> RF relationship. sh: mach-ecovec24: need asm/clock.h. sh: mach-ecovec24: deassert usb irq on boot. sh: Add KEYSC support for EcoVec24 sh: add kycr2_delay for sh_keysc sh: cpufreq: Include CPU id in info messages. sh: multi-evt support for SH-X3 proto CPU. sh: clkfwk: remove bogus set_bus_parent() from SH7709. sh: Fix the indication point of the liquid crystal of AP-325RXA(AP3300) sh: Add EcoVec24 romImage defconfig sh: USB disable process is needed if romImage boot for EcoVec24 sh: EcoVec24: add HIZA setting for LED sh: EcoVec24: write MAC address in boot sh: Add romImage support for EcoVec24 ...
This commit is contained in:
Linus Torvalds
commit
515b696b28
229 changed files with 18935 additions and 3986 deletions
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@ -1869,7 +1869,7 @@ config FB_W100
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config FB_SH_MOBILE_LCDC
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tristate "SuperH Mobile LCDC framebuffer support"
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depends on FB && SUPERH
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depends on FB && SUPERH && HAVE_CLK
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select FB_SYS_FILLRECT
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select FB_SYS_COPYAREA
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select FB_SYS_IMAGEBLIT
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|
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@ -14,6 +14,7 @@
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#include <linux/mm.h>
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#include <linux/fb.h>
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#include <linux/clk.h>
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#include <linux/pm_runtime.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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@ -22,35 +23,8 @@
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#include <asm/atomic.h>
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#define PALETTE_NR 16
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struct sh_mobile_lcdc_priv;
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struct sh_mobile_lcdc_chan {
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struct sh_mobile_lcdc_priv *lcdc;
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unsigned long *reg_offs;
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unsigned long ldmt1r_value;
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unsigned long enabled; /* ME and SE in LDCNT2R */
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struct sh_mobile_lcdc_chan_cfg cfg;
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u32 pseudo_palette[PALETTE_NR];
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struct fb_info *info;
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dma_addr_t dma_handle;
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struct fb_deferred_io defio;
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struct scatterlist *sglist;
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unsigned long frame_end;
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wait_queue_head_t frame_end_wait;
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};
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struct sh_mobile_lcdc_priv {
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void __iomem *base;
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int irq;
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#ifdef CONFIG_HAVE_CLK
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atomic_t clk_usecnt;
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struct clk *dot_clk;
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struct clk *clk;
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#endif
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unsigned long lddckr;
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struct sh_mobile_lcdc_chan ch[2];
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int started;
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};
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#define SIDE_B_OFFSET 0x1000
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#define MIRROR_OFFSET 0x2000
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/* shared registers */
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#define _LDDCKR 0x410
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@ -59,17 +33,30 @@ struct sh_mobile_lcdc_priv {
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#define _LDSR 0x46c
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#define _LDCNT1R 0x470
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#define _LDCNT2R 0x474
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#define _LDRCNTR 0x478
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#define _LDDDSR 0x47c
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#define _LDDWD0R 0x800
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#define _LDDRDR 0x840
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#define _LDDWAR 0x900
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#define _LDDRAR 0x904
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/* shared registers and their order for context save/restore */
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static int lcdc_shared_regs[] = {
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_LDDCKR,
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_LDDCKSTPR,
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_LDINTR,
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_LDDDSR,
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_LDCNT1R,
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_LDCNT2R,
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};
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#define NR_SHARED_REGS ARRAY_SIZE(lcdc_shared_regs)
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/* per-channel registers */
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enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R,
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LDSM2R, LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR };
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LDSM2R, LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR,
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NR_CH_REGS };
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static unsigned long lcdc_offs_mainlcd[] = {
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static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
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[LDDCKPAT1R] = 0x400,
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[LDDCKPAT2R] = 0x404,
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[LDMT1R] = 0x418,
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@ -87,7 +74,7 @@ static unsigned long lcdc_offs_mainlcd[] = {
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[LDPMR] = 0x460,
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};
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static unsigned long lcdc_offs_sublcd[] = {
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static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
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[LDDCKPAT1R] = 0x408,
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[LDDCKPAT2R] = 0x40c,
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[LDMT1R] = 0x600,
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@ -110,12 +97,80 @@ static unsigned long lcdc_offs_sublcd[] = {
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#define DISPLAY_BEU 0x00000008
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#define LCDC_ENABLE 0x00000001
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#define LDINTR_FE 0x00000400
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#define LDINTR_VSE 0x00000200
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#define LDINTR_VEE 0x00000100
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#define LDINTR_FS 0x00000004
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#define LDINTR_VSS 0x00000002
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#define LDINTR_VES 0x00000001
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#define LDRCNTR_SRS 0x00020000
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#define LDRCNTR_SRC 0x00010000
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#define LDRCNTR_MRS 0x00000002
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#define LDRCNTR_MRC 0x00000001
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struct sh_mobile_lcdc_priv;
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struct sh_mobile_lcdc_chan {
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struct sh_mobile_lcdc_priv *lcdc;
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unsigned long *reg_offs;
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unsigned long ldmt1r_value;
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unsigned long enabled; /* ME and SE in LDCNT2R */
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struct sh_mobile_lcdc_chan_cfg cfg;
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u32 pseudo_palette[PALETTE_NR];
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unsigned long saved_ch_regs[NR_CH_REGS];
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struct fb_info *info;
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dma_addr_t dma_handle;
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struct fb_deferred_io defio;
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struct scatterlist *sglist;
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unsigned long frame_end;
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unsigned long pan_offset;
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unsigned long new_pan_offset;
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wait_queue_head_t frame_end_wait;
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};
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struct sh_mobile_lcdc_priv {
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void __iomem *base;
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int irq;
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atomic_t hw_usecnt;
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struct device *dev;
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struct clk *dot_clk;
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unsigned long lddckr;
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struct sh_mobile_lcdc_chan ch[2];
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unsigned long saved_shared_regs[NR_SHARED_REGS];
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int started;
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};
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static bool banked(int reg_nr)
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{
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switch (reg_nr) {
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case LDMT1R:
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case LDMT2R:
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case LDMT3R:
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case LDDFR:
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case LDSM1R:
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case LDSA1R:
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case LDMLSR:
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case LDHCNR:
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case LDHSYNR:
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case LDVLNR:
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case LDVSYNR:
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return true;
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}
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return false;
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}
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static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
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int reg_nr, unsigned long data)
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{
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iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
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if (banked(reg_nr))
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iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
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SIDE_B_OFFSET);
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}
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static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
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int reg_nr, unsigned long data)
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{
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iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
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MIRROR_OFFSET);
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}
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static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
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@ -156,6 +211,7 @@ static void lcdc_sys_write_index(void *handle, unsigned long data)
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lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000);
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lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
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lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
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lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
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}
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static void lcdc_sys_write_data(void *handle, unsigned long data)
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@ -165,6 +221,7 @@ static void lcdc_sys_write_data(void *handle, unsigned long data)
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lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000);
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lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
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lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
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lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
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}
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static unsigned long lcdc_sys_read_data(void *handle)
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@ -175,8 +232,9 @@ static unsigned long lcdc_sys_read_data(void *handle)
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lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
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lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
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udelay(1);
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lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
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return lcdc_read(ch->lcdc, _LDDRDR) & 0xffff;
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return lcdc_read(ch->lcdc, _LDDRDR) & 0x3ffff;
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}
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struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
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@ -185,11 +243,10 @@ struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
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lcdc_sys_read_data,
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};
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#ifdef CONFIG_HAVE_CLK
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static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
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{
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if (atomic_inc_and_test(&priv->clk_usecnt)) {
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clk_enable(priv->clk);
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if (atomic_inc_and_test(&priv->hw_usecnt)) {
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pm_runtime_get_sync(priv->dev);
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if (priv->dot_clk)
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clk_enable(priv->dot_clk);
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}
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@ -197,16 +254,12 @@ static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
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static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
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{
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if (atomic_sub_return(1, &priv->clk_usecnt) == -1) {
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if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
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if (priv->dot_clk)
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clk_disable(priv->dot_clk);
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clk_disable(priv->clk);
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pm_runtime_put(priv->dev);
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}
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}
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#else
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static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) {}
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static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) {}
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#endif
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static int sh_mobile_lcdc_sginit(struct fb_info *info,
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struct list_head *pagelist)
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@ -255,30 +308,52 @@ static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
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struct sh_mobile_lcdc_priv *priv = data;
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struct sh_mobile_lcdc_chan *ch;
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unsigned long tmp;
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unsigned long ldintr;
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int is_sub;
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int k;
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/* acknowledge interrupt */
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tmp = lcdc_read(priv, _LDINTR);
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tmp &= 0xffffff00; /* mask in high 24 bits */
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tmp |= 0x000000ff ^ LDINTR_FS; /* status in low 8 */
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ldintr = tmp = lcdc_read(priv, _LDINTR);
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/*
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* disable further VSYNC End IRQs, preserve all other enabled IRQs,
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* write 0 to bits 0-6 to ack all triggered IRQs.
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*/
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tmp &= 0xffffff00 & ~LDINTR_VEE;
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lcdc_write(priv, _LDINTR, tmp);
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/* figure out if this interrupt is for main or sub lcd */
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is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0;
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|
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/* wake up channel and disable clocks*/
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/* wake up channel and disable clocks */
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for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
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ch = &priv->ch[k];
|
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|
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if (!ch->enabled)
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continue;
|
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|
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if (is_sub == lcdc_chan_is_sublcd(ch)) {
|
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ch->frame_end = 1;
|
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wake_up(&ch->frame_end_wait);
|
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/* Frame Start */
|
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if (ldintr & LDINTR_FS) {
|
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if (is_sub == lcdc_chan_is_sublcd(ch)) {
|
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ch->frame_end = 1;
|
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wake_up(&ch->frame_end_wait);
|
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|
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sh_mobile_lcdc_clk_off(priv);
|
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sh_mobile_lcdc_clk_off(priv);
|
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}
|
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}
|
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|
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/* VSYNC End */
|
||||
if (ldintr & LDINTR_VES) {
|
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unsigned long ldrcntr = lcdc_read(priv, _LDRCNTR);
|
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/* Set the source address for the next refresh */
|
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lcdc_write_chan_mirror(ch, LDSA1R, ch->dma_handle +
|
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ch->new_pan_offset);
|
||||
if (lcdc_chan_is_sublcd(ch))
|
||||
lcdc_write(ch->lcdc, _LDRCNTR,
|
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ldrcntr ^ LDRCNTR_SRS);
|
||||
else
|
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lcdc_write(ch->lcdc, _LDRCNTR,
|
||||
ldrcntr ^ LDRCNTR_MRS);
|
||||
ch->pan_offset = ch->new_pan_offset;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -520,7 +595,6 @@ static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
|
|||
board_cfg = &ch->cfg.board_cfg;
|
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if (board_cfg->display_off)
|
||||
board_cfg->display_off(board_cfg->board_data);
|
||||
|
||||
}
|
||||
|
||||
/* stop the lcdc */
|
||||
|
|
@ -579,9 +653,6 @@ static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
|
|||
int clock_source,
|
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struct sh_mobile_lcdc_priv *priv)
|
||||
{
|
||||
#ifdef CONFIG_HAVE_CLK
|
||||
char clk_name[8];
|
||||
#endif
|
||||
char *str;
|
||||
int icksel;
|
||||
|
||||
|
|
@ -595,25 +666,21 @@ static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
|
|||
|
||||
priv->lddckr = icksel << 16;
|
||||
|
||||
#ifdef CONFIG_HAVE_CLK
|
||||
atomic_set(&priv->clk_usecnt, -1);
|
||||
snprintf(clk_name, sizeof(clk_name), "lcdc%d", pdev->id);
|
||||
priv->clk = clk_get(&pdev->dev, clk_name);
|
||||
if (IS_ERR(priv->clk)) {
|
||||
dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
|
||||
return PTR_ERR(priv->clk);
|
||||
}
|
||||
|
||||
if (str) {
|
||||
priv->dot_clk = clk_get(&pdev->dev, str);
|
||||
if (IS_ERR(priv->dot_clk)) {
|
||||
dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
|
||||
clk_put(priv->clk);
|
||||
return PTR_ERR(priv->dot_clk);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
atomic_set(&priv->hw_usecnt, -1);
|
||||
|
||||
/* Runtime PM support involves two step for this driver:
|
||||
* 1) Enable Runtime PM
|
||||
* 2) Force Runtime PM Resume since hardware is accessed from probe()
|
||||
*/
|
||||
pm_runtime_enable(priv->dev);
|
||||
pm_runtime_resume(priv->dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -646,6 +713,9 @@ static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
|
|||
.type = FB_TYPE_PACKED_PIXELS,
|
||||
.visual = FB_VISUAL_TRUECOLOR,
|
||||
.accel = FB_ACCEL_NONE,
|
||||
.xpanstep = 0,
|
||||
.ypanstep = 1,
|
||||
.ywrapstep = 0,
|
||||
};
|
||||
|
||||
static void sh_mobile_lcdc_fillrect(struct fb_info *info,
|
||||
|
|
@ -669,13 +739,38 @@ static void sh_mobile_lcdc_imageblit(struct fb_info *info,
|
|||
sh_mobile_lcdc_deferred_io_touch(info);
|
||||
}
|
||||
|
||||
static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
|
||||
struct fb_info *info)
|
||||
{
|
||||
struct sh_mobile_lcdc_chan *ch = info->par;
|
||||
|
||||
if (info->var.xoffset == var->xoffset &&
|
||||
info->var.yoffset == var->yoffset)
|
||||
return 0; /* No change, do nothing */
|
||||
|
||||
ch->new_pan_offset = (var->yoffset * info->fix.line_length) +
|
||||
(var->xoffset * (info->var.bits_per_pixel / 8));
|
||||
|
||||
if (ch->new_pan_offset != ch->pan_offset) {
|
||||
unsigned long ldintr;
|
||||
ldintr = lcdc_read(ch->lcdc, _LDINTR);
|
||||
ldintr |= LDINTR_VEE;
|
||||
lcdc_write(ch->lcdc, _LDINTR, ldintr);
|
||||
sh_mobile_lcdc_deferred_io_touch(info);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct fb_ops sh_mobile_lcdc_ops = {
|
||||
.owner = THIS_MODULE,
|
||||
.fb_setcolreg = sh_mobile_lcdc_setcolreg,
|
||||
.fb_read = fb_sys_read,
|
||||
.fb_write = fb_sys_write,
|
||||
.fb_fillrect = sh_mobile_lcdc_fillrect,
|
||||
.fb_copyarea = sh_mobile_lcdc_copyarea,
|
||||
.fb_imageblit = sh_mobile_lcdc_imageblit,
|
||||
.fb_pan_display = sh_mobile_fb_pan_display,
|
||||
};
|
||||
|
||||
static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp)
|
||||
|
|
@ -731,9 +826,59 @@ static int sh_mobile_lcdc_resume(struct device *dev)
|
|||
return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
|
||||
}
|
||||
|
||||
static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
|
||||
struct sh_mobile_lcdc_chan *ch;
|
||||
int k, n;
|
||||
|
||||
/* save per-channel registers */
|
||||
for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
|
||||
ch = &p->ch[k];
|
||||
if (!ch->enabled)
|
||||
continue;
|
||||
for (n = 0; n < NR_CH_REGS; n++)
|
||||
ch->saved_ch_regs[n] = lcdc_read_chan(ch, n);
|
||||
}
|
||||
|
||||
/* save shared registers */
|
||||
for (n = 0; n < NR_SHARED_REGS; n++)
|
||||
p->saved_shared_regs[n] = lcdc_read(p, lcdc_shared_regs[n]);
|
||||
|
||||
/* turn off LCDC hardware */
|
||||
lcdc_write(p, _LDCNT1R, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_mobile_lcdc_runtime_resume(struct device *dev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
|
||||
struct sh_mobile_lcdc_chan *ch;
|
||||
int k, n;
|
||||
|
||||
/* restore per-channel registers */
|
||||
for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
|
||||
ch = &p->ch[k];
|
||||
if (!ch->enabled)
|
||||
continue;
|
||||
for (n = 0; n < NR_CH_REGS; n++)
|
||||
lcdc_write_chan(ch, n, ch->saved_ch_regs[n]);
|
||||
}
|
||||
|
||||
/* restore shared registers */
|
||||
for (n = 0; n < NR_SHARED_REGS; n++)
|
||||
lcdc_write(p, lcdc_shared_regs[n], p->saved_shared_regs[n]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
|
||||
.suspend = sh_mobile_lcdc_suspend,
|
||||
.resume = sh_mobile_lcdc_resume,
|
||||
.runtime_suspend = sh_mobile_lcdc_runtime_suspend,
|
||||
.runtime_resume = sh_mobile_lcdc_runtime_resume,
|
||||
};
|
||||
|
||||
static int sh_mobile_lcdc_remove(struct platform_device *pdev);
|
||||
|
|
@ -778,6 +923,7 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
priv->irq = i;
|
||||
priv->dev = &pdev->dev;
|
||||
platform_set_drvdata(pdev, priv);
|
||||
pdata = pdev->dev.platform_data;
|
||||
|
||||
|
|
@ -792,6 +938,8 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
|
|||
goto err1;
|
||||
}
|
||||
init_waitqueue_head(&priv->ch[i].frame_end_wait);
|
||||
priv->ch[j].pan_offset = 0;
|
||||
priv->ch[j].new_pan_offset = 0;
|
||||
|
||||
switch (pdata->ch[i].chan) {
|
||||
case LCDC_CHAN_MAINLCD:
|
||||
|
|
@ -834,7 +982,9 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
|
|||
info = priv->ch[i].info;
|
||||
info->fbops = &sh_mobile_lcdc_ops;
|
||||
info->var.xres = info->var.xres_virtual = cfg->lcd_cfg.xres;
|
||||
info->var.yres = info->var.yres_virtual = cfg->lcd_cfg.yres;
|
||||
info->var.yres = cfg->lcd_cfg.yres;
|
||||
/* Default Y virtual resolution is 2x panel size */
|
||||
info->var.yres_virtual = info->var.yres * 2;
|
||||
info->var.width = cfg->lcd_size_cfg.width;
|
||||
info->var.height = cfg->lcd_size_cfg.height;
|
||||
info->var.activate = FB_ACTIVATE_NOW;
|
||||
|
|
@ -844,7 +994,8 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
|
|||
|
||||
info->fix = sh_mobile_lcdc_fix;
|
||||
info->fix.line_length = cfg->lcd_cfg.xres * (cfg->bpp / 8);
|
||||
info->fix.smem_len = info->fix.line_length * cfg->lcd_cfg.yres;
|
||||
info->fix.smem_len = info->fix.line_length *
|
||||
info->var.yres_virtual;
|
||||
|
||||
buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len,
|
||||
&priv->ch[i].dma_handle, GFP_KERNEL);
|
||||
|
|
@ -947,11 +1098,10 @@ static int sh_mobile_lcdc_remove(struct platform_device *pdev)
|
|||
framebuffer_release(info);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HAVE_CLK
|
||||
if (priv->dot_clk)
|
||||
clk_put(priv->dot_clk);
|
||||
clk_put(priv->clk);
|
||||
#endif
|
||||
|
||||
pm_runtime_disable(priv->dev);
|
||||
|
||||
if (priv->base)
|
||||
iounmap(priv->base);
|
||||
|
|
|
|||
Loading…
Reference in a new issue