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arm64: handle 52-bit addresses in TTBR

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The top 4 bits of a 52-bit physical address are positioned at bits 2..5
in the TTBR registers. Introduce a couple of macros to move the bits
there, and change all TTBR writers to use them.

Leave TTBR0 PAN code unchanged, to avoid complicating it. A system with
52-bit PA will have PAN anyway (because it's ARMv8.1 or later), and a
system without 52-bit PA can only use up to 48-bit PAs. A later patch in
this series will add a kconfig dependency to ensure PAN is configured.

In addition, when using 52-bit PA there is a special alignment
requirement on the top-level table. We don't currently have any VA_BITS
configuration that would violate the requirement, but one could be added
in the future, so add a compile-time BUG_ON to check for it.

Tested-by: Suzuki K Poulose <[email protected]>
Reviewed-by: Suzuki K Poulose <[email protected]>
Reviewed-by: Marc Zyngier <[email protected]>
Tested-by: Bob Picco <[email protected]>
Reviewed-by: Bob Picco <[email protected]>
Signed-off-by: Kristina Martsenko <[email protected]>
[[email protected]: added TTBR_BADD_MASK_52 comment]
Signed-off-by: Catalin Marinas <[email protected]>
This commit is contained in:
Kristina Martsenko 2017-12-13 17:07:18 +00:00 • committed by Catalin Marinas
commit 529c4b05a3
13 changed files with 71 additions and 16 deletions
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2
virt/kvm/arm/arm.c
View file

@ -509,7 +509,7 @@ static void update_vttbr(struct kvm *kvm)
pgd_phys = virt_to_phys(kvm->arch.pgd);
BUG_ON(pgd_phys & ~VTTBR_BADDR_MASK);
vmid = ((u64)(kvm->arch.vmid) << VTTBR_VMID_SHIFT) & VTTBR_VMID_MASK(kvm_vmid_bits);
kvm->arch.vttbr = pgd_phys | vmid;
kvm->arch.vttbr = kvm_phys_to_vttbr(pgd_phys) | vmid;
spin_unlock(&kvm_vmid_lock);
}