From 52d1e761be1b58fa90de8ec588661f4786efcbf4 Mon Sep 17 00:00:00 2001 From: Pankaj Gupta Date: Mon, 18 Jan 2021 19:32:15 +0530 Subject: [PATCH] msm: kgsl: Enable GMU BW scaling and update CP ROQ size Enable GMU BW scaling for A635 GPU and update CP ROQ size as per recommendation. Change-Id: Id904957038abfdc2109e17cd4d7958759c6c2ed1 Signed-off-by: Pankaj Gupta --- drivers/gpu/msm/adreno_a6xx.c | 4 ++-- drivers/gpu/msm/adreno_a6xx_gmu.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/msm/adreno_a6xx.c b/drivers/gpu/msm/adreno_a6xx.c index bee7f499a6f4..7aaaa0541239 100644 --- a/drivers/gpu/msm/adreno_a6xx.c +++ b/drivers/gpu/msm/adreno_a6xx.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved. */ #include @@ -576,7 +576,7 @@ void a6xx_start(struct adreno_device *adreno_dev) kgsl_regwrite(device, A6XX_UCHE_CACHE_WAYS, 0x4); /* ROQ sizes are twice as big on a640/a680 than on a630 */ - if (ADRENO_GPUREV(adreno_dev) >= ADRENO_REV_A640) { + if (ADRENO_GPUREV(adreno_dev) >= ADRENO_REV_A635) { kgsl_regwrite(device, A6XX_CP_ROQ_THRESHOLDS_2, 0x02000140); kgsl_regwrite(device, A6XX_CP_ROQ_THRESHOLDS_1, 0x8040362C); } else if (adreno_is_a612(adreno_dev) || adreno_is_a610(adreno_dev)) { diff --git a/drivers/gpu/msm/adreno_a6xx_gmu.c b/drivers/gpu/msm/adreno_a6xx_gmu.c index c47a00d7c211..97fe2c39f1c4 100644 --- a/drivers/gpu/msm/adreno_a6xx_gmu.c +++ b/drivers/gpu/msm/adreno_a6xx_gmu.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. */ #include @@ -1978,7 +1978,7 @@ static bool a6xx_gmu_scales_bandwidth(struct kgsl_device *device) { struct adreno_device *adreno_dev = ADRENO_DEVICE(device); - return (ADRENO_GPUREV(adreno_dev) >= ADRENO_REV_A640); + return (ADRENO_GPUREV(adreno_dev) >= ADRENO_REV_A635); } static irqreturn_t a6xx_gmu_irq_handler(int irq, void *data)