mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 19:21:31 -04:00
remove tx3912fb
Remove tx3912fb. Nino has already removed. It is no longer needed. Signed-off-by: Yoichi Yuasa <[email protected]> Acked-by: Ralf Baechle <[email protected]> Cc: "Antonino A. Daplas" <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
This commit is contained in:
Yoichi Yuasa
Linus Torvalds
parent
2174041d66
commit
541510fc28
5 changed files with 0 additions and 762 deletions
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@ -1645,18 +1645,6 @@ config FB_MAXINE
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DECstation series (Personal DECstation 5000/20, /25, /33, /50,
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Codename "Maxine").
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config FB_TX3912
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bool "TMPTX3912/PR31700 frame buffer support"
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depends on (FB = y) && NINO
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select FB_CFB_FILLRECT
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select FB_CFB_COPYAREA
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select FB_CFB_IMAGEBLIT
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help
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The TX3912 is a Toshiba RISC processor based on the MIPS 3900 core
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see <http://www.toshiba.com/taec/components/Generic/risc/tx3912.htm>.
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Say Y here to enable kernel support for the on-board framebuffer.
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config FB_G364
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bool "G364 frame buffer support"
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depends on (FB = y) && (MIPS_MAGNUM_4000 || OLIVETTI_M700)
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@ -103,7 +103,6 @@ obj-$(CONFIG_FB_PMAG_AA) += pmag-aa-fb.o
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obj-$(CONFIG_FB_PMAG_BA) += pmag-ba-fb.o
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obj-$(CONFIG_FB_PMAGB_B) += pmagb-b-fb.o
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obj-$(CONFIG_FB_MAXINE) += maxinefb.o
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obj-$(CONFIG_FB_TX3912) += tx3912fb.o
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obj-$(CONFIG_FB_S1D13XXX) += s1d13xxxfb.o
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obj-$(CONFIG_FB_IMX) += imxfb.o
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obj-$(CONFIG_FB_S3C2410) += s3c2410fb.o
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@ -1,326 +0,0 @@
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/*
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* drivers/video/tx3912fb.c
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*
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* Copyright (C) 1999 Harald Koerfgen
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* Copyright (C) 2001 Steven Hill (sjhill@realitydiluted.com)
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*
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* Framebuffer for LCD controller in TMPR3912/05 and PR31700 processors
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/pm.h>
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#include <linux/fb.h>
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#include <asm/io.h>
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#include <asm/bootinfo.h>
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#include <asm/uaccess.h>
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#include <asm/tx3912.h>
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#include <video/tx3912.h>
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/*
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* Frame buffer, palette and console structures
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*/
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static struct fb_info fb_info;
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static u32 cfb8[16];
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static struct fb_fix_screeninfo tx3912fb_fix __initdata = {
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.id = "tx3912fb",
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.smem_len = ((240 * 320)/2),
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.type = FB_TYPE_PACKED_PIXELS,
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.visual = FB_VISUAL_TRUECOLOR,
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.xpanstep = 1,
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.ypanstep = 1,
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.ywrapstep = 1,
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.accel = FB_ACCEL_NONE,
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};
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static struct fb_var_screeninfo tx3912fb_var = {
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.xres = 240,
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.yres = 320,
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.xres_virtual = 240,
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.yres_virtual = 320,
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.bits_per_pixel =4,
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.red = { 0, 4, 0 }, /* ??? */
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.green = { 0, 4, 0 },
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.blue = { 0, 4, 0 },
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.activate = FB_ACTIVATE_NOW,
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.width = -1,
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.height = -1,
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.pixclock = 20000,
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.left_margin = 64,
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.right_margin = 64,
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.upper_margin = 32,
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.lower_margin = 32,
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.hsync_len = 64,
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.vsync_len = 2,
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.vmode = FB_VMODE_NONINTERLACED,
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};
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/*
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* Interface used by the world
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*/
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int tx3912fb_init(void);
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static int tx3912fb_setcolreg(u_int regno, u_int red, u_int green,
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u_int blue, u_int transp,
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struct fb_info *info);
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/*
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* Macros
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*/
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#define get_line_length(xres_virtual, bpp) \
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(u_long) (((int) xres_virtual * (int) bpp + 7) >> 3)
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/*
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* Frame buffer operations structure used by console driver
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*/
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static struct fb_ops tx3912fb_ops = {
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.owner = THIS_MODULE,
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.fb_setcolreg = tx3912fb_setcolreg,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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};
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static int tx3912fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
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{
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/*
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* Memory limit
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*/
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line_length =
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get_line_length(var->xres_virtual, var->bits_per_pixel);
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if ((line_length * var->yres_virtual) > info->fix.smem_len)
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return -ENOMEM;
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return 0;
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}
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static int tx3912fb_set_par(struct fb_info *info)
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{
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u_long tx3912fb_paddr = 0;
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/* Disable the video logic */
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outl(inl(TX3912_VIDEO_CTRL1) &
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~(TX3912_VIDEO_CTRL1_ENVID | TX3912_VIDEO_CTRL1_DISPON),
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TX3912_VIDEO_CTRL1);
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udelay(200);
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/* Set start address for DMA transfer */
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outl(tx3912fb_paddr, TX3912_VIDEO_CTRL3);
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/* Set end address for DMA transfer */
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outl((tx3912fb_paddr + tx3912fb_fix.smem_len + 1), TX3912_VIDEO_CTRL4);
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/* Set the pixel depth */
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switch (info->var.bits_per_pixel) {
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case 1:
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/* Monochrome */
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outl(inl(TX3912_VIDEO_CTRL1) &
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~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
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info->fix.visual = FB_VISUAL_MONO10;
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break;
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case 4:
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/* 4-bit gray */
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outl(inl(TX3912_VIDEO_CTRL1) &
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~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
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outl(inl(TX3912_VIDEO_CTRL1) |
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TX3912_VIDEO_CTRL1_BITSEL_4BIT_GRAY,
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TX3912_VIDEO_CTRL1);
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info->fix.visual = FB_VISUAL_TRUECOLOR;
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break;
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case 8:
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/* 8-bit color */
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outl(inl(TX3912_VIDEO_CTRL1) &
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~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
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outl(inl(TX3912_VIDEO_CTRL1) |
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TX3912_VIDEO_CTRL1_BITSEL_8BIT_COLOR,
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TX3912_VIDEO_CTRL1);
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info->fix.visual = FB_VISUAL_TRUECOLOR;
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break;
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case 2:
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default:
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/* 2-bit gray */
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outl(inl(TX3912_VIDEO_CTRL1) &
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~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
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outl(inl(TX3912_VIDEO_CTRL1) |
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TX3912_VIDEO_CTRL1_BITSEL_2BIT_GRAY,
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TX3912_VIDEO_CTRL1);
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info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
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break;
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}
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/* Enable the video clock */
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outl(inl(TX3912_CLK_CTRL) | TX3912_CLK_CTRL_ENVIDCLK,
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TX3912_CLK_CTRL);
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/* Unfreeze video logic and enable DF toggle */
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outl(inl(TX3912_VIDEO_CTRL1) &
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~(TX3912_VIDEO_CTRL1_ENFREEZEFRAME |
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TX3912_VIDEO_CTRL1_DFMODE)
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, TX3912_VIDEO_CTRL1);
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udelay(200);
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/* Enable the video logic */
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outl(inl(TX3912_VIDEO_CTRL1) |
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(TX3912_VIDEO_CTRL1_ENVID | TX3912_VIDEO_CTRL1_DISPON),
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TX3912_VIDEO_CTRL1);
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info->fix.line_length = get_line_length(var->xres_virtual,
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var->bits_per_pixel);
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}
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/*
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* Set a single color register
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*/
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static int tx3912fb_setcolreg(u_int regno, u_int red, u_int green,
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u_int blue, u_int transp,
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struct fb_info *info)
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{
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if (regno > 255)
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return 1;
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if (regno < 16)
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((u32 *)(info->pseudo_palette))[regno] = ((red & 0xe000) >> 8)
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| ((green & 0xe000) >> 11)
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| ((blue & 0xc000) >> 14);
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return 0;
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}
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int __init tx3912fb_setup(char *options);
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/*
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* Initialization of the framebuffer
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*/
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int __init tx3912fb_init(void)
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{
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u_long tx3912fb_paddr = 0;
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int size = (info->var.bits_per_pixel == 8) ? 256 : 16;
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char *option = NULL;
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if (fb_get_options("tx3912fb", &option))
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return -ENODEV;
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tx3912fb_setup(option);
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/* Disable the video logic */
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outl(inl(TX3912_VIDEO_CTRL1) &
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~(TX3912_VIDEO_CTRL1_ENVID | TX3912_VIDEO_CTRL1_DISPON),
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TX3912_VIDEO_CTRL1);
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udelay(200);
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/* Set start address for DMA transfer */
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outl(tx3912fb_paddr, TX3912_VIDEO_CTRL3);
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/* Set end address for DMA transfer */
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outl((tx3912fb_paddr + tx3912fb_fix.smem_len + 1), TX3912_VIDEO_CTRL4);
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/* Set the pixel depth */
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switch (tx3912fb_var.bits_per_pixel) {
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case 1:
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/* Monochrome */
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outl(inl(TX3912_VIDEO_CTRL1) &
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~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
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tx3912fb_fix.visual = FB_VISUAL_MONO10;
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break;
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case 4:
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/* 4-bit gray */
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outl(inl(TX3912_VIDEO_CTRL1) &
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~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
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outl(inl(TX3912_VIDEO_CTRL1) |
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TX3912_VIDEO_CTRL1_BITSEL_4BIT_GRAY,
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TX3912_VIDEO_CTRL1);
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tx3912fb_fix.visual = FB_VISUAL_TRUECOLOR;
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tx3912fb_fix.grayscale = 1;
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break;
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case 8:
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/* 8-bit color */
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outl(inl(TX3912_VIDEO_CTRL1) &
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~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
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outl(inl(TX3912_VIDEO_CTRL1) |
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TX3912_VIDEO_CTRL1_BITSEL_8BIT_COLOR,
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TX3912_VIDEO_CTRL1);
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tx3912fb_fix.visual = FB_VISUAL_TRUECOLOR;
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break;
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case 2:
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default:
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/* 2-bit gray */
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outl(inl(TX3912_VIDEO_CTRL1) &
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~TX3912_VIDEO_CTRL1_BITSEL_MASK, TX3912_VIDEO_CTRL1);
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outl(inl(TX3912_VIDEO_CTRL1) |
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TX3912_VIDEO_CTRL1_BITSEL_2BIT_GRAY,
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TX3912_VIDEO_CTRL1);
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tx3912fb_fix.visual = FB_VISUAL_PSEUDOCOLOR;
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tx3912fb_fix.grayscale = 1;
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break;
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}
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/* Enable the video clock */
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outl(inl(TX3912_CLK_CTRL) | TX3912_CLK_CTRL_ENVIDCLK,
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TX3912_CLK_CTRL);
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/* Unfreeze video logic and enable DF toggle */
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outl(inl(TX3912_VIDEO_CTRL1) &
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~(TX3912_VIDEO_CTRL1_ENFREEZEFRAME | TX3912_VIDEO_CTRL1_DFMODE),
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TX3912_VIDEO_CTRL1);
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udelay(200);
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/* Clear the framebuffer */
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memset((void *) tx3912fb_fix.smem_start, 0xff, tx3912fb_fix.smem_len);
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udelay(200);
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/* Enable the video logic */
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outl(inl(TX3912_VIDEO_CTRL1) |
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(TX3912_VIDEO_CTRL1_ENVID | TX3912_VIDEO_CTRL1_DISPON),
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TX3912_VIDEO_CTRL1);
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/*
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* Memory limit
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*/
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tx3912fb_fix.line_length =
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get_line_length(tx3912fb_var.xres_virtual, tx3912fb_var.bits_per_pixel);
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if ((tx3912fb_fix.line_length * tx3912fb_var.yres_virtual) > tx3912fb_fix.smem_len)
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return -ENOMEM;
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fb_info.fbops = &tx3912fb_ops;
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fb_info.var = tx3912fb_var;
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fb_info.fix = tx3912fb_fix;
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fb_info.pseudo_palette = cfb8;
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fb_info.flags = FBINFO_DEFAULT;
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/* Clear the framebuffer */
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memset((void *) fb_info.fix.smem_start, 0xff, fb_info.fix.smem_len);
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udelay(200);
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fb_alloc_cmap(&info->cmap, size, 0);
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if (register_framebuffer(&fb_info) < 0)
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return -1;
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printk(KERN_INFO "fb%d: TX3912 frame buffer using %uKB.\n",
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fb_info.node, (u_int) (fb_info.fix.smem_len >> 10));
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return 0;
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}
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int __init tx3912fb_setup(char *options)
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{
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char *this_opt;
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if (!options || !*options)
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return 0;
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while ((this_opt = strsep(&options, ","))) {
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if (!strncmp(options, "bpp:", 4))
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tx3912fb_var.bits_per_pixel = simple_strtoul(options+4, NULL, 0);
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}
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return 0;
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}
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module_init(tx3912fb_init);
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MODULE_LICENSE("GPL");
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