drivers: llcc: Configure cache override registers

Use the llcc compatible string to configure correct set of llcc
override registers.

Change-Id: I29f00a095aeaf3494674c2e2bfae897b2d93756f
Signed-off-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
[rananta@codeaurora.org: Updated register offsets]
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
This commit is contained in:
Rishabh Bhatnagar 2019-02-15 16:49:26 -08:00 • committed by Raghavendra Rao Ananta
commit 54d0442975

View file

@ -44,6 +44,10 @@
#define LLCC_TRP_ATTR0_CFGn(n) (0x21000 + SZ_8 * n)
#define LLCC_TRP_ATTR1_CFGn(n) (0x21004 + SZ_8 * n)
#define LLCC_TRP_C_AS_NC 0x22890
#define LLCC_TRP_NC_AS_C 0x22894
#define LLCC_FEAC_C_AS_NC 0x35030
#define LLCC_FEAC_NC_AS_C 0x35034
#define LLCC_TRP_WRSC_EN 0x21F20
#define LLCC_WRSC_SCID_EN(n) BIT(n)
@ -264,10 +268,36 @@ static int qcom_llcc_cfg_program(struct platform_device *pdev)
struct llcc_slice_desc desc;
bool cap_based_alloc_and_pwr_collapse =
drv_data->cap_based_alloc_and_pwr_collapse;
uint32_t mask = ~0;
sz = drv_data->cfg_size;
llcc_table = drv_data->cfg;
/* Disable the Cache as Non-Cache override and enable
* the Non-Cache as Cache override
*/
if (of_device_is_compatible(pdev->dev.of_node, "qcom,llcc-v2")) {
ret = regmap_write(drv_data->bcast_regmap,
LLCC_TRP_C_AS_NC, 0);
if (ret)
return ret;
ret = regmap_write(drv_data->bcast_regmap,
LLCC_TRP_NC_AS_C, mask);
if (ret)
return ret;
} else {
ret = regmap_write(drv_data->bcast_regmap,
LLCC_FEAC_C_AS_NC, 0);
if (ret)
return ret;
ret = regmap_write(drv_data->bcast_regmap,
LLCC_FEAC_NC_AS_C, mask);
if (ret)
return ret;
}
for (i = 0; i < sz; i++) {
attr1_cfg = LLCC_TRP_ATTR1_CFGn(llcc_table[i].slice_id);
attr0_cfg = LLCC_TRP_ATTR0_CFGn(llcc_table[i].slice_id);