From 31f7661e9ead7f4ac3b1e250e8d814d136151569 Mon Sep 17 00:00:00 2001
From: sganda <sganda@qti.qualcomm.com>
Date: Fri, 15 Jan 2021 19:16:49 +0530
Subject: [PATCH] ARM: dts: msm: Change QSEE,glink IRQs to level trigger

Change the IRQ handlers from EDGE to level trigger
to prevent missing rapid IRQs from SPU.

Change-Id: I1b0a862edf26ca2540591ba866adb6498dd51b43
---
 qcom/lahaina.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi
index 25926f595614..d261cf1f5436 100644
--- a/qcom/lahaina.dtsi
+++ b/qcom/lahaina.dtsi
@@ -2229,7 +2229,7 @@
 			interrupt-parent = <&ipcc_mproc>;
 			interrupts = <IPCC_CLIENT_SPSS
 				      IPCC_MPROC_SIGNAL_TZ
-				      IRQ_TYPE_EDGE_RISING>;
+				      IRQ_TYPE_LEVEL_HIGH>;
 			label = "spss";
 		};
 	};
@@ -4376,7 +4376,7 @@
 			interrupt-parent = <&ipcc_mproc>;
 			interrupts = <IPCC_CLIENT_SPSS
 				      IPCC_MPROC_SIGNAL_GLINK_QMP
-				      IRQ_TYPE_EDGE_RISING>;
+				      IRQ_TYPE_LEVEL_HIGH>;
 
 			reg = <0x1885008 0x8>,
 			      <0x1885010 0x4>;