mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-26 06:33:19 -04:00
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6: [AVR32] Fix random segfault with preemption [AVR32] Don't use __builtin_xchg() [AVR32] ngw100 i2c-gpio tweaks [AVR32] Ignore a few irrelevant syscalls [AVR32] SMC configuration in clock cycles [AVR32] Drop support for redundant "keepinitrd" boot-time parm. [AVR32] Make dma_sync_*_for_cpu no-ops [AVR32] Remove unneeded 8K alignment of .text section [AVR32] Kill a few hardcoded constants in vmlinux.lds [AVR32] rename vmlinux.lds [AVR32] fix command line parsing in early_parse_fbmem [AVR32] checkstack support [AVR32] Wire up USBA device [AVR32] add multidrive support for pio driver [AVR32] /sys/kernel/debug/at32ap_clk [AVR32] Move AT32_PM_BASE definition into pm.h
This commit is contained in:
commit
55982fd184
21 changed files with 446 additions and 72 deletions
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@ -6,6 +6,8 @@
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#include <linux/types.h>
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#define GPIO_PIN_NONE (-1)
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/* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
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void at32_add_system_devices(void);
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@ -36,6 +38,12 @@ struct platform_device *
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at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
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unsigned long fbmem_start, unsigned long fbmem_len);
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struct usba_platform_data {
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int vbus_pin;
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};
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struct platform_device *
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at32_add_device_usba(unsigned int id, struct usba_platform_data *data);
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/* depending on what's hooked up, not all SSC pins will be used */
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#define ATMEL_SSC_TK 0x01
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#define ATMEL_SSC_TF 0x02
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@ -19,6 +19,7 @@
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#define AT32_GPIOF_OUTPUT 0x00000002 /* (OUT) Enable output driver */
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#define AT32_GPIOF_HIGH 0x00000004 /* (OUT) Set output high */
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#define AT32_GPIOF_DEGLITCH 0x00000008 /* (IN) Filter glitches */
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#define AT32_GPIOF_MULTIDRV 0x00000010 /* Enable multidriver option */
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void at32_select_periph(unsigned int pin, unsigned int periph,
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unsigned long flags);
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@ -15,22 +15,50 @@
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/*
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* All timing parameters are in nanoseconds.
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*/
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struct smc_config {
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struct smc_timing {
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/* Delay from address valid to assertion of given strobe */
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u16 ncs_read_setup;
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u16 nrd_setup;
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u16 ncs_write_setup;
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u16 nwe_setup;
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int ncs_read_setup;
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int nrd_setup;
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int ncs_write_setup;
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int nwe_setup;
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/* Pulse length of given strobe */
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u16 ncs_read_pulse;
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u16 nrd_pulse;
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u16 ncs_write_pulse;
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u16 nwe_pulse;
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int ncs_read_pulse;
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int nrd_pulse;
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int ncs_write_pulse;
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int nwe_pulse;
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/* Total cycle length of given operation */
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u16 read_cycle;
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u16 write_cycle;
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int read_cycle;
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int write_cycle;
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/* Minimal recovery times, will extend cycle if needed */
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int ncs_read_recover;
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int nrd_recover;
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int ncs_write_recover;
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int nwe_recover;
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};
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/*
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* All timing parameters are in clock cycles.
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*/
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struct smc_config {
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/* Delay from address valid to assertion of given strobe */
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u8 ncs_read_setup;
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u8 nrd_setup;
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u8 ncs_write_setup;
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u8 nwe_setup;
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/* Pulse length of given strobe */
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u8 ncs_read_pulse;
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u8 nrd_pulse;
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u8 ncs_write_pulse;
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u8 nwe_pulse;
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/* Total cycle length of given operation */
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u8 read_cycle;
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u8 write_cycle;
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/* Bus width in bytes */
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u8 bus_width;
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@ -76,6 +104,9 @@ struct smc_config {
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unsigned int tdf_mode:1;
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};
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extern void smc_set_timing(struct smc_config *config,
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const struct smc_timing *timing);
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extern int smc_set_configuration(int cs, const struct smc_config *config);
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extern struct smc_config *smc_get_configuration(int cs);
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@ -264,7 +264,11 @@ static inline void
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dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction direction)
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{
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dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
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/*
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* No need to do anything since the CPU isn't supposed to
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* touch this memory after we flushed it at mapping- or
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* sync-for-device time.
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*/
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}
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static inline void
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@ -309,12 +313,11 @@ static inline void
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dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction)
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{
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int i;
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for (i = 0; i < nents; i++) {
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dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset,
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sg[i].length, direction);
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}
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/*
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* No need to do anything since the CPU isn't supposed to
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* touch this memory after we flushed it at mapping- or
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* sync-for-device time.
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*/
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}
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static inline void
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@ -73,11 +73,16 @@ extern struct task_struct *__switch_to(struct task_struct *,
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extern void __xchg_called_with_bad_pointer(void);
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#ifdef __CHECKER__
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extern unsigned long __builtin_xchg(void *ptr, unsigned long x);
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#endif
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static inline unsigned long xchg_u32(u32 val, volatile u32 *m)
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{
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u32 ret;
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#define xchg_u32(val, m) __builtin_xchg((void *)m, val)
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asm volatile("xchg %[ret], %[m], %[val]"
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: [ret] "=&r"(ret), "=m"(*m)
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: "m"(*m), [m] "r"(m), [val] "r"(val)
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: "memory");
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return ret;
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}
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static inline unsigned long __xchg(unsigned long x,
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volatile void *ptr,
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@ -303,6 +303,19 @@
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#ifdef __KERNEL__
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#define NR_syscalls 282
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/* Old stuff */
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#define __IGNORE_uselib
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#define __IGNORE_mmap
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/* NUMA stuff */
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#define __IGNORE_mbind
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#define __IGNORE_get_mempolicy
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#define __IGNORE_set_mempolicy
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#define __IGNORE_migrate_pages
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#define __IGNORE_move_pages
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/* SMP stuff */
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#define __IGNORE_getcpu
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#define __ARCH_WANT_IPC_PARSE_VERSION
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#define __ARCH_WANT_STAT64
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