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UPSTREAM: scsi: ufs: ufs-mediatek: Modify the minimum RX/TX lane count to 2

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MediaTek UFS host now supports 2 lanes. Modify the lane count to 2.

This modification shall not impact old 1-lane host because
PA_CONNECTEDRXDATALANES and PA_CONNECTEDTXDATALANES will limit the target
lanes properly during power mode change. So we could relax the limitation
in ufs_dev_params.

Link: https://lore.kernel.org/r/20200819084340.7021-1-stanley.chu@mediatek.com
Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>
Reviewed-by: Avri Altman <avri.altman@wdc.com>
Signed-off-by: Andy Teng <andy.teng@mediatek.com>
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

Bug: 166747994
(cherry picked from commit 460d74a0911c562f56148519a2467271271a73aa)
Change-Id: Ia3cb46d691f4498829565a70ba332cd246dc98a2
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
This commit is contained in:
Andy Teng 2020-08-19 16:43:40 +08:00 • committed by Todd Kjos
commit 55bbca30d4
1 changed files with 2 additions and 2 deletions
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4
drivers/scsi/ufs/ufs-mediatek.h
View file

@ -33,8 +33,8 @@
/*
* Vendor specific pre-defined parameters
*/
#define UFS_MTK_LIMIT_NUM_LANES_RX 1
#define UFS_MTK_LIMIT_NUM_LANES_TX 1
#define UFS_MTK_LIMIT_NUM_LANES_RX 2
#define UFS_MTK_LIMIT_NUM_LANES_TX 2
#define UFS_MTK_LIMIT_HSGEAR_RX UFS_HS_G3
#define UFS_MTK_LIMIT_HSGEAR_TX UFS_HS_G3
#define UFS_MTK_LIMIT_PWMGEAR_RX UFS_PWM_G4