From 56533d2d4563030d38688a5cf5ee523647f3e627 Mon Sep 17 00:00:00 2001 From: Taniya Das Date: Mon, 28 Sep 2020 13:12:27 +0530 Subject: [PATCH] clk: qcom: camcc: Update camcc_cphy_rx Fmax corner for Shima The clock for cphy_rx LOWSVS fmax is updated from 320 to 266.67MHZ, thus update the frequency table and also the corner values. Change-Id: Ibe53a495347a28c15cdbc2049cca0ccdde4b3fcf Signed-off-by: Taniya Das --- drivers/clk/qcom/camcc-shima.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/camcc-shima.c b/drivers/clk/qcom/camcc-shima.c index 39fb6927bbf2..17171ccdc284 100644 --- a/drivers/clk/qcom/camcc-shima.c +++ b/drivers/clk/qcom/camcc-shima.c @@ -780,7 +780,7 @@ static struct clk_rcg2 cam_cc_cci_1_clk_src = { static const struct freq_tbl ftbl_cam_cc_cphy_rx_clk_src[] = { F(19200000, P_BI_TCXO, 1, 0, 0), - F(320000000, P_CAM_CC_PLL6_OUT_EVEN, 1.5, 0, 0), + F(266666667, P_CAM_CC_PLL0_OUT_ODD, 1.5, 0, 0), F(400000000, P_CAM_CC_PLL0_OUT_ODD, 1, 0, 0), { } }; @@ -802,7 +802,7 @@ static struct clk_rcg2 cam_cc_cphy_rx_clk_src = { .vdd_class = &vdd_cx, .num_rate_max = VDD_NUM, .rate_max = (unsigned long[VDD_NUM]) { - [VDD_LOWER] = 320000000, + [VDD_LOWER] = 266666667, [VDD_LOW] = 400000000}, }, };