From 2f49472d4792cb0a21e3ec8312774f886b619f16 Mon Sep 17 00:00:00 2001 From: Gauri Joshi Date: Mon, 22 Feb 2021 14:46:05 -0800 Subject: [PATCH] ARM: dts: msm: add MX entries for PCIe EP on sdxlemur To properly support PCIe Gen4 on sdxlemur, PCIe needs to vote and scale MX rails accordingly. Add the required MX entries to enable PCIe EP driver to do so for sdxlemur. Change-Id: Ibebb2ac470fbe1ed22c9f4bd7e902de5e71c81fc --- qcom/sdxlemur.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qcom/sdxlemur.dtsi b/qcom/sdxlemur.dtsi index a90d8dd61418..d8a64a575c8b 100644 --- a/qcom/sdxlemur.dtsi +++ b/qcom/sdxlemur.dtsi @@ -925,9 +925,11 @@ gdsc-vdd-supply = <&gcc_pcie_gdsc>; vreg-1p8-supply = <&pmx65_l1>; vreg-0p9-supply = <&pmx65_l4>; + vreg-mx-supply = <&VDD_MXA_LEVEL>; qcom,vreg-1p8-voltage-level = <1200000 1200000 3000>; qcom,vreg-0p9-voltage-level = <912000 912000 132000>; + qcom,vreg-mx-voltage-level = ; clocks = <&gcc GCC_PCIE_PIPE_CLK>, <&gcc GCC_PCIE_CFG_AHB_CLK>,