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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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USB/PHY patches for 4.19-rc1
Here is the big USB and phy driver patch set for 4.19-rc1. Nothing huge but there was a lot of work that happened this development cycle: - lots of type-c work, with drivers graduating out of staging, and displayport support being added. - new PHY drivers - the normal collection of gadget driver updates and fixes - code churn to work on the urb handling path, using irqsave() everywhere in anticipation of making this codepath a lot simpler in the future. - usbserial driver fixes and reworks - other misc changes Full details are in the shortlog. All of these have been in linux-next with no reported issues for a while. Signed-off-by: Greg Kroah-Hartman <[email protected]> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCW3hBPA8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+yloNwCggMZi9m8Krjq7d7aLw5oJJex/nIAAn0jeADOT NpoCgrtGHjwrATxN5/Ke =jXa3 -----END PGP SIGNATURE----- Merge tag 'usb-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB/PHY updates from Greg KH: "Here is the big USB and phy driver patch set for 4.19-rc1. Nothing huge but there was a lot of work that happened this development cycle: - lots of type-c work, with drivers graduating out of staging, and displayport support being added. - new PHY drivers - the normal collection of gadget driver updates and fixes - code churn to work on the urb handling path, using irqsave() everywhere in anticipation of making this codepath a lot simpler in the future. - usbserial driver fixes and reworks - other misc changes All of these have been in linux-next with no reported issues for a while" * tag 'usb-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (159 commits) USB: serial: pl2303: add a new device id for ATEN usb: renesas_usbhs: Kconfig: convert to SPDX identifiers usb: dwc3: gadget: Check MaxPacketSize from descriptor usb: dwc2: Turn on uframe_sched on "stm32f4x9_fsotg" platforms usb: dwc2: Turn on uframe_sched on "amlogic" platforms usb: dwc2: Turn on uframe_sched on "his" platforms usb: dwc2: Turn on uframe_sched on "bcm" platforms usb: dwc2: gadget: ISOC's starting flow improvement usb: dwc2: Make dwc2_readl/writel functions endianness-agnostic. usb: dwc3: core: Enable AutoRetry feature in the controller usb: dwc3: Set default mode for dwc_usb31 usb: gadget: udc: renesas_usb3: Add register of usb role switch usb: dwc2: replace ioread32/iowrite32_rep with dwc2_readl/writel_rep usb: dwc2: Modify dwc2_readl/writel functions prototype usb: dwc3: pci: Intel Merrifield can be host usb: dwc3: pci: Supply device properties via driver data arm64: dts: dwc3: description of incr burst type usb: dwc3: Enable undefined length INCR burst type usb: dwc3: add global soc bus configuration reg0 usb: dwc3: Describe 'wakeup_work' field of struct dwc3_pci ...
This commit is contained in:
Linus Torvalds
commit
5695d5d197
165 changed files with 5847 additions and 1813 deletions
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@ -15,6 +15,33 @@ Optional properties:
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- type: size of the connector, should be specified in case of USB-A, USB-B
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non-fullsize connectors: "mini", "micro".
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Optional properties for usb-c-connector:
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- power-role: should be one of "source", "sink" or "dual"(DRP) if typec
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connector has power support.
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- try-power-role: preferred power role if "dual"(DRP) can support Try.SNK
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or Try.SRC, should be "sink" for Try.SNK or "source" for Try.SRC.
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- data-role: should be one of "host", "device", "dual"(DRD) if typec
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connector supports USB data.
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Required properties for usb-c-connector with power delivery support:
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- source-pdos: An array of u32 with each entry providing supported power
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source data object(PDO), the detailed bit definitions of PDO can be found
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in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.2
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Source_Capabilities Message, the order of each entry(PDO) should follow
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the PD spec chapter 6.4.1. Required for power source and power dual role.
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User can specify the source PDO array via PDO_FIXED/BATT/VAR() defined in
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dt-bindings/usb/pd.h.
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- sink-pdos: An array of u32 with each entry providing supported power
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sink data object(PDO), the detailed bit definitions of PDO can be found
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in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.3
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Sink Capabilities Message, the order of each entry(PDO) should follow
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the PD spec chapter 6.4.1. Required for power sink and power dual role.
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User can specify the sink PDO array via PDO_FIXED/BATT/VAR() defined in
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dt-bindings/usb/pd.h.
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- op-sink-microwatt: Sink required operating power in microwatt, if source
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can't offer the power, Capability Mismatch is set. Required for power
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sink and power dual role.
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Required nodes:
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- any data bus to the connector should be modeled using the OF graph bindings
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specified in bindings/graph.txt, unless the bus is between parent node and
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@ -73,3 +100,20 @@ ccic: s2mm005@33 {
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};
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};
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};
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3. USB-C connector attached to a typec port controller(ptn5110), which has
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power delivery support and enables drp.
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typec: ptn5110@50 {
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...
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usb_con: connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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power-role = "dual";
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try-power-role = "sink";
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source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
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sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)
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PDO_VAR(5000, 12000, 2000)>;
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op-sink-microwatt = <10000000>;
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};
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};
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41
Documentation/devicetree/bindings/phy/brcm,sr-pcie-phy.txt
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41
Documentation/devicetree/bindings/phy/brcm,sr-pcie-phy.txt
Normal file
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@ -0,0 +1,41 @@
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Broadcom Stingray PCIe PHY
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Required properties:
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- compatible: must be "brcm,sr-pcie-phy"
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- reg: base address and length of the PCIe SS register space
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- brcm,sr-cdru: phandle to the CDRU syscon node
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- brcm,sr-mhb: phandle to the MHB syscon node
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- #phy-cells: Must be 1, denotes the PHY index
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For PAXB based root complex, one can have a configuration of up to 8 PHYs
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PHY index goes from 0 to 7
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For the internal PAXC based root complex, PHY index is always 8
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Example:
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mhb: syscon@60401000 {
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compatible = "brcm,sr-mhb", "syscon";
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reg = <0 0x60401000 0 0x38c>;
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};
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cdru: syscon@6641d000 {
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compatible = "brcm,sr-cdru", "syscon";
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reg = <0 0x6641d000 0 0x400>;
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};
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pcie_phy: phy@40000000 {
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compatible = "brcm,sr-pcie-phy";
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reg = <0 0x40000000 0 0x800>;
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brcm,sr-cdru = <&cdru>;
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brcm,sr-mhb = <&mhb>;
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#phy-cells = <1>;
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};
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/* users of the PCIe PHY */
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pcie0: pcie@48000000 {
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...
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...
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phys = <&pcie_phy 0>;
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phy-names = "pcie-phy";
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};
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@ -47,6 +47,12 @@ Required properties (port (child) node):
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- PHY_TYPE_PCIE
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- PHY_TYPE_SATA
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Optional properties (PHY_TYPE_USB2 port (child) node):
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- mediatek,eye-src : u32, the value of slew rate calibrate
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- mediatek,eye-vrt : u32, the selection of VRT reference voltage
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- mediatek,eye-term : u32, the selection of HS_TX TERM reference voltage
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- mediatek,bc12 : bool, enable BC12 of u2phy if support it
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Example:
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u3phy: usb-phy@11290000 {
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@ -12,7 +12,14 @@ Required properties:
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"qcom,sdm845-qmp-usb3-phy" for USB3 QMP V3 phy on sdm845,
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"qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845.
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- reg: offset and length of register set for PHY's common serdes block.
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- reg:
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- For "qcom,sdm845-qmp-usb3-phy":
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- index 0: address and length of register set for PHY's common serdes
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block.
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- named register "dp_com" (using reg-names): address and length of the
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DP_COM control block.
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- For all others:
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- offset and length of register set for PHY's common serdes block.
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- #clock-cells: must be 1
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- Phy pll outputs a bunch of clocks for Tx, Rx and Pipe
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@ -60,7 +67,10 @@ Required nodes:
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Required properties for child node:
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- reg: list of offset and length pairs of register sets for PHY blocks -
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tx, rx and pcs.
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- index 0: tx
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- index 1: rx
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- index 2: pcs
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- index 3: pcs_misc (optional)
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- #phy-cells: must be 0
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24
Documentation/devicetree/bindings/phy/rcar-gen3-phy-pcie.txt
Normal file
24
Documentation/devicetree/bindings/phy/rcar-gen3-phy-pcie.txt
Normal file
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@ -0,0 +1,24 @@
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* Renesas R-Car generation 3 PCIe PHY
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This file provides information on what the device node for the R-Car
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generation 3 PCIe PHY contains.
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Required properties:
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- compatible: "renesas,r8a77980-pcie-phy" if the device is a part of the
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R8A77980 SoC.
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- reg: offset and length of the register block.
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- clocks: clock phandle and specifier pair.
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- power-domains: power domain phandle and specifier pair.
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- resets: reset phandle and specifier pair.
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- #phy-cells: see phy-bindings.txt in the same directory, must be <0>.
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Example (R-Car V3H):
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pcie-phy@e65d0000 {
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compatible = "renesas,r8a77980-pcie-phy";
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reg = <0 0xe65d0000 0 0x8000>;
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#phy-cells = <0>;
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clocks = <&cpg CPG_MOD 319>;
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power-domains = <&sysc 32>;
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resets = <&cpg 319>;
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};
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@ -10,6 +10,8 @@ Required properties:
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SoC.
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"renesas,usb2-phy-r8a77965" if the device is a part of an
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R8A77965 SoC.
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"renesas,usb2-phy-r8a77990" if the device is a part of an
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R8A77990 SoC.
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"renesas,usb2-phy-r8a77995" if the device is a part of an
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R8A77995 SoC.
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"renesas,rcar-gen3-usb2-phy" for a generic R-Car Gen3 compatible device.
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@ -96,6 +96,11 @@ Optional properties:
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enable periodic ESS TX threshold.
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- <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be reallocated.
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- snps,incr-burst-type-adjustment: Value for INCR burst type of GSBUSCFG0
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register, undefined length INCR burst type enable and INCRx type.
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When just one value, which means INCRX burst mode enabled. When
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more than one value, which means undefined length INCR burst type
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enabled. The values can be 1, 4, 8, 16, 32, 64, 128 and 256.
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- in addition all properties from usb-xhci.txt from the current directory are
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supported as well
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@ -108,4 +113,5 @@ dwc3@4a030000 {
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reg = <0x4a030000 0xcfff>;
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interrupts = <0 92 4>
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usb-phy = <&usb2_phy>, <&usb3,phy>;
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snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
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};
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18
Documentation/devicetree/bindings/usb/npcm7xx-usb.txt
Normal file
18
Documentation/devicetree/bindings/usb/npcm7xx-usb.txt
Normal file
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@ -0,0 +1,18 @@
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Nuvoton NPCM7XX SoC USB controllers:
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-----------------------------
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EHCI:
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-----
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Required properties:
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- compatible: "nuvoton,npcm750-ehci"
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- interrupts: Should contain the EHCI interrupt
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- reg: Physical address and length of the register set for the device
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Example:
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ehci1: usb@f0806000 {
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compatible = "nuvoton,npcm750-ehci";
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reg = <0xf0806000 0x1000>;
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interrupts = <0 61 4>;
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};
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49
Documentation/devicetree/bindings/usb/typec-tcpci.txt
Normal file
49
Documentation/devicetree/bindings/usb/typec-tcpci.txt
Normal file
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@ -0,0 +1,49 @@
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TCPCI(Typec port cotroller interface) binding
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---------------------------------------------
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Required properties:
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- compatible: should be set one of following:
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- "nxp,ptn5110" for NXP USB PD TCPC PHY IC ptn5110.
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- reg: the i2c slave address of typec port controller device.
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- interrupt-parent: the phandle to the interrupt controller which provides
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the interrupt.
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- interrupts: interrupt specification for tcpci alert.
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Required sub-node:
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- connector: The "usb-c-connector" attached to the tcpci chip, the bindings
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of connector node are specified in
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Documentation/devicetree/bindings/connector/usb-connector.txt
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Example:
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ptn5110@50 {
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compatible = "nxp,ptn5110";
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reg = <0x50>;
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interrupt-parent = <&gpio3>;
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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usb_con: connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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data-role = "dual";
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power-role = "dual";
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try-power-role = "sink";
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source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
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sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)
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PDO_VAR(5000, 12000, 2000)>;
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op-sink-microwatt = <10000000>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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usb_con_ss: endpoint {
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remote-endpoint = <&usb3_data_ss>;
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};
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};
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};
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};
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};
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@ -14,6 +14,7 @@ Required properties:
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- "renesas,xhci-r8a7795" for r8a7795 SoC
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- "renesas,xhci-r8a7796" for r8a7796 SoC
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- "renesas,xhci-r8a77965" for r8a77965 SoC
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- "renesas,xhci-r8a77990" for r8a77990 SoC
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- "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible
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device
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- "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 compatible device
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