From 56ee50c8a252d7bbb270a64b15a74be3fc21dd09 Mon Sep 17 00:00:00 2001 From: chailu1 Date: Wed, 14 Apr 2021 14:30:12 +0800 Subject: [PATCH] arm/dts: add sc8549 config for corfuP product arm/dts Add sc8549 configure for corfuP product Change-Id: I114be9c734d566ce7fcdc3c20992688919190d53 Signed-off-by: chailu1 Reviewed-on: https://gerrit.mot.com/1923392 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Tested-by: Jira Key Reviewed-by: Haijian Ma Reviewed-by: Huosheng Liao Submit-Approved: Jira Key --- qcom/corfup-charger.dtsi | 45 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/qcom/corfup-charger.dtsi b/qcom/corfup-charger.dtsi index 9843c4367c42..de8f99189db0 100644 --- a/qcom/corfup-charger.dtsi +++ b/qcom/corfup-charger.dtsi @@ -30,3 +30,48 @@ qcom,qg-iterm-ma = <500>; }; +&tlmm { + sc8549_int { + sc8549_int_default: sc8549_int_default { + mux { + pins = "gpio84"; + function = "gpio"; + }; + + config { + pins = "gpio84"; + bias-pull-up; /* PULL UP */ + input-enable; + }; + }; + }; +}; + +&qupv3_se8_i2c { + status = "okay"; + + sc8549-charger@6F{ + compatible = "sc,sc8549-standalone"; + reg = <0x6F>; + interrupt-parent = <&tlmm>; + interrupts = <84 0>; + pinctrl-names = "default"; + pinctrl-0 = <&sc8549_int_default>; + /*sc,sc8549,bat-ovp-disable; + sc,sc8549,bat-ocp-disable; + sc,sc8549,bus-ocp-disable; + sc,sc8549,bus-ovp-disable;*/ + sc,sc8549,bat-therm-disable; + sc,sc8549,bus-therm-disable; + + sc,sc8549,bat-ovp-threshold = <4575>; + sc,sc8549,bat-ocp-threshold = <7000>; + + sc,sc8549,bus-ovp-threshold = <11000>; + sc,sc8549,bus-ocp-threshold = <3500>; + + sc,sc8549,ac-ovp-threshold = <17>; + sc,sc8549,sense-resistor-mohm = <5>; + }; +}; +