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fpga: dfl: fix bug in port reset handshake

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[ Upstream commit 8614afd689df59d9ce019439389be20bd788a897 ]

When putting the port in reset, driver must wait for the soft reset
acknowledgment bit instead of the soft reset bit.

Fixes: 47c1b19c16 (fpga: dfl: afu: add port ops support)
Signed-off-by: Matthew Gerlach <[email protected]>
Signed-off-by: Xu Yilun <[email protected]>
Acked-by: Wu Hao <[email protected]>
Reviewed-by: Tom Rix <[email protected]>
Signed-off-by: Moritz Fischer <[email protected]>
Signed-off-by: Sasha Levin <[email protected]>
This commit is contained in:
Matthew Gerlach 2020-07-13 14:10:03 +08:00 • committed by Greg Kroah-Hartman
commit 570b1c92cb
1 changed files with 2 additions and 1 deletions
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3
drivers/fpga/dfl-afu-main.c
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@ -83,7 +83,8 @@ int __afu_port_disable(struct platform_device *pdev)
* on this port and minimum soft reset pulse width has elapsed.
* Driver polls port_soft_reset_ack to determine if reset done by HW.
*/
if (readq_poll_timeout(base + PORT_HDR_CTRL, v, v & PORT_CTRL_SFTRST,
if (readq_poll_timeout(base + PORT_HDR_CTRL, v,
v & PORT_CTRL_SFTRST_ACK,
RST_POLL_INVL, RST_POLL_TIMEOUT)) {
dev_err(&pdev->dev, "timeout, fail to reset device\n");
return -ETIMEDOUT;