mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 03:01:39 -04:00
SCSI misc on 20170907
This is mostly updates of the usual suspects: lpfc, qla2xxx, hisi_sas, megaraid_sas, zfcp and a host of minor updates. The major driver change here is the elimination of the block based cciss driver in favour of the SCSI based hpsa driver (which now drives all the legacy cases cciss used to be required for). Plus a reset handler clean up and the redo of the SAS SMP handler to use bsg lib. Signed-off-by: James E.J. Bottomley <[email protected]> -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABAgAGBQJZscDNAAoJEAVr7HOZEZN4DWIQAK/UkkrvKpV/jLATM/yi7CoL QidY86Hmwwl7A9HQ+2fjLfAsye0xcCzRwkucKK90IP5b4pefHhiJJfiMKAAe3TUW xstnY5z5jaOhDG4nyJFoSm5fH5qXkMnJ8NZRK8f6Qg5yBN5dStEKqoBboNsz4KBI md7idw0mbp5i2GXlJwSpc5eDS97GiPL6WkwgGaGKfXF1NDau0GbEdjijfz55haCD pMhY7WJh/71RfOq/1ThXT1Z3khOlVcKXrkdO+602n7zh/klRBRtBC8m2a6xCfZPj n7Pb/s0jhCQPd+e/Xtv7WEbY8uNOCrGoVgZ6U5EGrT5IeTfep24ackYqerjMhE63 esi4BJY8lUP9SGleLMgjYWyCHdmxBJRa7UI614DWN/H0QoGP6j/2EzGoi5Fw04vC H8/+aqPPWZc9KUBioRYo8xWO8YgMqL2eyXY+Tc9cwxqAe2T6k/NC1zJVgDFKXfzb QoWW4v9NNmYwf5vL/7tNgkeTMFQV66yUR7dR3SGTSk8UIrJ40ok0JyUAsDg86ZAH BfMkWwhWQ6Byoel0Y7Ti88T49Cox/64r/I0ux06Qgg99+KpRLT7z20+GLIEHgXxg 116C39rgvYKqzc7W8RCyj8qSROuMVzg6QFbB6n+1PEsYIX2O8A2Re3jdS34q2LbX aBDm/Lfdl4kkJrV9xY6P =nQUG -----END PGP SIGNATURE----- Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi Pull SCSI updates from James Bottomley: "This is mostly updates of the usual suspects: lpfc, qla2xxx, hisi_sas, megaraid_sas, zfcp and a host of minor updates. The major driver change here is the elimination of the block based cciss driver in favour of the SCSI based hpsa driver (which now drives all the legacy cases cciss used to be required for). Plus a reset handler clean up and the redo of the SAS SMP handler to use bsg lib" * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (279 commits) scsi: scsi-mq: Always unprepare before requeuing a request scsi: Show .retries and .jiffies_at_alloc in debugfs scsi: Improve requeuing behavior scsi: Call scsi_initialize_rq() for filesystem requests scsi: qla2xxx: Reset the logo flag, after target re-login. scsi: qla2xxx: Fix slow mem alloc behind lock scsi: qla2xxx: Clear fc4f_nvme flag scsi: qla2xxx: add missing includes for qla_isr scsi: qla2xxx: Fix an integer overflow in sysfs code scsi: aacraid: report -ENOMEM to upper layer from aac_convert_sgraw2() scsi: aacraid: get rid of one level of indentation scsi: aacraid: fix indentation errors scsi: storvsc: fix memory leak on ring buffer busy scsi: scsi_transport_sas: switch to bsg-lib for SMP passthrough scsi: smartpqi: remove the smp_handler stub scsi: hpsa: remove the smp_handler stub scsi: bsg-lib: pass the release callback through bsg_setup_queue scsi: Rework handling of scsi_device.vpd_pg8[03] scsi: Rework the code for caching Vital Product Data (VPD) scsi: rcu: Introduce rcu_swap_protected() ...
This commit is contained in:
Linus Torvalds
commit
572c01ba19
218 changed files with 4910 additions and 12340 deletions
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@ -112,33 +112,6 @@ source "drivers/block/mtip32xx/Kconfig"
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source "drivers/block/zram/Kconfig"
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config BLK_CPQ_CISS_DA
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tristate "Compaq Smart Array 5xxx support"
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depends on PCI
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select CHECK_SIGNATURE
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select BLK_SCSI_REQUEST
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help
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This is the driver for Compaq Smart Array 5xxx controllers.
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Everyone using these boards should say Y here.
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See <file:Documentation/blockdev/cciss.txt> for the current list of
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boards supported by this driver, and for further information
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on the use of this driver.
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config CISS_SCSI_TAPE
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bool "SCSI tape drive support for Smart Array 5xxx"
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depends on BLK_CPQ_CISS_DA && PROC_FS
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depends on SCSI=y || SCSI=BLK_CPQ_CISS_DA
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help
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When enabled (Y), this option allows SCSI tape drives and SCSI medium
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changers (tape robots) to be accessed via a Compaq 5xxx array
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controller. (See <file:Documentation/blockdev/cciss.txt> for more details.)
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"SCSI support" and "SCSI tape support" must also be enabled for this
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option to work.
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When this option is disabled (N), the SCSI portion of the driver
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is not compiled.
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config BLK_DEV_DAC960
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tristate "Mylex DAC960/DAC1100 PCI RAID Controller support"
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depends on PCI
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@ -15,7 +15,6 @@ obj-$(CONFIG_ATARI_FLOPPY) += ataflop.o
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obj-$(CONFIG_AMIGA_Z2RAM) += z2ram.o
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obj-$(CONFIG_BLK_DEV_RAM) += brd.o
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obj-$(CONFIG_BLK_DEV_LOOP) += loop.o
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obj-$(CONFIG_BLK_CPQ_CISS_DA) += cciss.o
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obj-$(CONFIG_BLK_DEV_DAC960) += DAC960.o
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obj-$(CONFIG_XILINX_SYSACE) += xsysace.o
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obj-$(CONFIG_CDROM_PKTCDVD) += pktcdvd.o
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File diff suppressed because it is too large
Load diff
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@ -1,433 +0,0 @@
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#ifndef CCISS_H
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#define CCISS_H
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#include <linux/genhd.h>
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#include <linux/mutex.h>
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#include "cciss_cmd.h"
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#define NWD_SHIFT 4
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#define MAX_PART (1 << NWD_SHIFT)
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#define IO_OK 0
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#define IO_ERROR 1
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#define IO_NEEDS_RETRY 3
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#define VENDOR_LEN 8
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#define MODEL_LEN 16
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#define REV_LEN 4
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struct ctlr_info;
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typedef struct ctlr_info ctlr_info_t;
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struct access_method {
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void (*submit_command)(ctlr_info_t *h, CommandList_struct *c);
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void (*set_intr_mask)(ctlr_info_t *h, unsigned long val);
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unsigned long (*fifo_full)(ctlr_info_t *h);
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bool (*intr_pending)(ctlr_info_t *h);
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unsigned long (*command_completed)(ctlr_info_t *h);
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};
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typedef struct _drive_info_struct
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{
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unsigned char LunID[8];
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int usage_count;
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struct request_queue *queue;
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sector_t nr_blocks;
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int block_size;
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int heads;
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int sectors;
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int cylinders;
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int raid_level; /* set to -1 to indicate that
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* the drive is not in use/configured
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*/
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int busy_configuring; /* This is set when a drive is being removed
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* to prevent it from being opened or it's
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* queue from being started.
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*/
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struct device dev;
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__u8 serial_no[16]; /* from inquiry page 0x83,
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* not necc. null terminated.
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*/
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char vendor[VENDOR_LEN + 1]; /* SCSI vendor string */
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char model[MODEL_LEN + 1]; /* SCSI model string */
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char rev[REV_LEN + 1]; /* SCSI revision string */
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char device_initialized; /* indicates whether dev is initialized */
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} drive_info_struct;
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struct ctlr_info
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{
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int ctlr;
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char devname[8];
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char *product_name;
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char firm_ver[4]; /* Firmware version */
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struct pci_dev *pdev;
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__u32 board_id;
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void __iomem *vaddr;
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unsigned long paddr;
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int nr_cmds; /* Number of commands allowed on this controller */
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CfgTable_struct __iomem *cfgtable;
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int interrupts_enabled;
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int major;
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int max_commands;
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int commands_outstanding;
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int max_outstanding; /* Debug */
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int num_luns;
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int highest_lun;
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int usage_count; /* number of opens all all minor devices */
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/* Need space for temp sg list
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* number of scatter/gathers supported
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* number of scatter/gathers in chained block
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*/
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struct scatterlist **scatter_list;
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int maxsgentries;
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int chainsize;
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int max_cmd_sgentries;
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SGDescriptor_struct **cmd_sg_list;
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# define PERF_MODE_INT 0
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# define DOORBELL_INT 1
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# define SIMPLE_MODE_INT 2
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# define MEMQ_MODE_INT 3
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unsigned int intr[4];
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int intr_mode;
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int cciss_max_sectors;
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BYTE cciss_read;
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BYTE cciss_write;
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BYTE cciss_read_capacity;
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/* information about each logical volume */
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drive_info_struct *drv[CISS_MAX_LUN];
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struct access_method access;
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/* queue and queue Info */
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struct list_head reqQ;
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struct list_head cmpQ;
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unsigned int Qdepth;
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unsigned int maxQsinceinit;
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unsigned int maxSG;
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spinlock_t lock;
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/* pointers to command and error info pool */
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CommandList_struct *cmd_pool;
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dma_addr_t cmd_pool_dhandle;
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ErrorInfo_struct *errinfo_pool;
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dma_addr_t errinfo_pool_dhandle;
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unsigned long *cmd_pool_bits;
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int nr_allocs;
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int nr_frees;
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int busy_configuring;
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int busy_initializing;
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int busy_scanning;
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struct mutex busy_shutting_down;
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/* This element holds the zero based queue number of the last
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* queue to be started. It is used for fairness.
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*/
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int next_to_run;
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/* Disk structures we need to pass back */
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struct gendisk *gendisk[CISS_MAX_LUN];
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#ifdef CONFIG_CISS_SCSI_TAPE
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struct cciss_scsi_adapter_data_t *scsi_ctlr;
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#endif
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unsigned char alive;
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struct list_head scan_list;
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struct completion scan_wait;
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struct device dev;
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/*
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* Performant mode tables.
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*/
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u32 trans_support;
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u32 trans_offset;
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struct TransTable_struct *transtable;
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unsigned long transMethod;
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/*
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* Performant mode completion buffer
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*/
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u64 *reply_pool;
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dma_addr_t reply_pool_dhandle;
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u64 *reply_pool_head;
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size_t reply_pool_size;
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unsigned char reply_pool_wraparound;
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u32 *blockFetchTable;
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};
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/* Defining the diffent access_methods
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*
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* Memory mapped FIFO interface (SMART 53xx cards)
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*/
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#define SA5_DOORBELL 0x20
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#define SA5_REQUEST_PORT_OFFSET 0x40
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#define SA5_REPLY_INTR_MASK_OFFSET 0x34
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#define SA5_REPLY_PORT_OFFSET 0x44
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#define SA5_INTR_STATUS 0x30
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#define SA5_SCRATCHPAD_OFFSET 0xB0
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#define SA5_CTCFG_OFFSET 0xB4
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#define SA5_CTMEM_OFFSET 0xB8
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#define SA5_INTR_OFF 0x08
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#define SA5B_INTR_OFF 0x04
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#define SA5_INTR_PENDING 0x08
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#define SA5B_INTR_PENDING 0x04
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#define FIFO_EMPTY 0xffffffff
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#define CCISS_FIRMWARE_READY 0xffff0000 /* value in scratchpad register */
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/* Perf. mode flags */
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#define SA5_PERF_INTR_PENDING 0x04
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#define SA5_PERF_INTR_OFF 0x05
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#define SA5_OUTDB_STATUS_PERF_BIT 0x01
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#define SA5_OUTDB_CLEAR_PERF_BIT 0x01
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#define SA5_OUTDB_CLEAR 0xA0
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#define SA5_OUTDB_CLEAR_PERF_BIT 0x01
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#define SA5_OUTDB_STATUS 0x9C
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#define CISS_ERROR_BIT 0x02
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#define CCISS_INTR_ON 1
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#define CCISS_INTR_OFF 0
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/* CCISS_BOARD_READY_WAIT_SECS is how long to wait for a board
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* to become ready, in seconds, before giving up on it.
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* CCISS_BOARD_READY_POLL_INTERVAL_MSECS * is how long to wait
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* between polling the board to see if it is ready, in
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* milliseconds. CCISS_BOARD_READY_ITERATIONS is derived
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* the above.
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*/
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#define CCISS_BOARD_READY_WAIT_SECS (120)
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#define CCISS_BOARD_NOT_READY_WAIT_SECS (100)
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#define CCISS_BOARD_READY_POLL_INTERVAL_MSECS (100)
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#define CCISS_BOARD_READY_ITERATIONS \
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((CCISS_BOARD_READY_WAIT_SECS * 1000) / \
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CCISS_BOARD_READY_POLL_INTERVAL_MSECS)
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#define CCISS_BOARD_NOT_READY_ITERATIONS \
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((CCISS_BOARD_NOT_READY_WAIT_SECS * 1000) / \
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CCISS_BOARD_READY_POLL_INTERVAL_MSECS)
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#define CCISS_POST_RESET_PAUSE_MSECS (3000)
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#define CCISS_POST_RESET_NOOP_INTERVAL_MSECS (4000)
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#define CCISS_POST_RESET_NOOP_RETRIES (12)
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#define CCISS_POST_RESET_NOOP_TIMEOUT_MSECS (10000)
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/*
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Send the command to the hardware
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*/
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static void SA5_submit_command( ctlr_info_t *h, CommandList_struct *c)
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{
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#ifdef CCISS_DEBUG
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printk(KERN_WARNING "cciss%d: Sending %08x - down to controller\n",
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h->ctlr, c->busaddr);
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#endif /* CCISS_DEBUG */
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writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
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readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
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h->commands_outstanding++;
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if ( h->commands_outstanding > h->max_outstanding)
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h->max_outstanding = h->commands_outstanding;
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}
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/*
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* This card is the opposite of the other cards.
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* 0 turns interrupts on...
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* 0x08 turns them off...
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*/
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static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
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{
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if (val)
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{ /* Turn interrupts on */
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h->interrupts_enabled = 1;
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writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
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(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
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} else /* Turn them off */
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{
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h->interrupts_enabled = 0;
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writel( SA5_INTR_OFF,
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h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
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(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
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}
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}
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/*
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* This card is the opposite of the other cards.
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* 0 turns interrupts on...
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* 0x04 turns them off...
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*/
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static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
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{
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if (val)
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{ /* Turn interrupts on */
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h->interrupts_enabled = 1;
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writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
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(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
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} else /* Turn them off */
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{
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h->interrupts_enabled = 0;
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writel( SA5B_INTR_OFF,
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h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
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(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
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}
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}
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/* Performant mode intr_mask */
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static void SA5_performant_intr_mask(ctlr_info_t *h, unsigned long val)
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{
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if (val) { /* turn on interrupts */
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h->interrupts_enabled = 1;
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writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
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(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
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} else {
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h->interrupts_enabled = 0;
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writel(SA5_PERF_INTR_OFF,
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h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
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(void) readl(h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
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}
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}
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/*
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* Returns true if fifo is full.
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*
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*/
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static unsigned long SA5_fifo_full(ctlr_info_t *h)
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{
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if( h->commands_outstanding >= h->max_commands)
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return(1);
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else
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return(0);
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}
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/*
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* returns value read from hardware.
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* returns FIFO_EMPTY if there is nothing to read
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*/
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static unsigned long SA5_completed(ctlr_info_t *h)
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{
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unsigned long register_value
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= readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
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if(register_value != FIFO_EMPTY)
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{
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h->commands_outstanding--;
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#ifdef CCISS_DEBUG
|
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printk("cciss: Read %lx back from board\n", register_value);
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#endif /* CCISS_DEBUG */
|
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}
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#ifdef CCISS_DEBUG
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else
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{
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printk("cciss: FIFO Empty read\n");
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}
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#endif
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return ( register_value);
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}
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/* Performant mode command completed */
|
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static unsigned long SA5_performant_completed(ctlr_info_t *h)
|
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{
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unsigned long register_value = FIFO_EMPTY;
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|
||||
/* flush the controller write of the reply queue by reading
|
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* outbound doorbell status register.
|
||||
*/
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register_value = readl(h->vaddr + SA5_OUTDB_STATUS);
|
||||
/* msi auto clears the interrupt pending bit. */
|
||||
if (!(h->pdev->msi_enabled || h->pdev->msix_enabled)) {
|
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writel(SA5_OUTDB_CLEAR_PERF_BIT, h->vaddr + SA5_OUTDB_CLEAR);
|
||||
/* Do a read in order to flush the write to the controller
|
||||
* (as per spec.)
|
||||
*/
|
||||
register_value = readl(h->vaddr + SA5_OUTDB_STATUS);
|
||||
}
|
||||
|
||||
if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
|
||||
register_value = *(h->reply_pool_head);
|
||||
(h->reply_pool_head)++;
|
||||
h->commands_outstanding--;
|
||||
} else {
|
||||
register_value = FIFO_EMPTY;
|
||||
}
|
||||
/* Check for wraparound */
|
||||
if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
|
||||
h->reply_pool_head = h->reply_pool;
|
||||
h->reply_pool_wraparound ^= 1;
|
||||
}
|
||||
|
||||
return register_value;
|
||||
}
|
||||
/*
|
||||
* Returns true if an interrupt is pending..
|
||||
*/
|
||||
static bool SA5_intr_pending(ctlr_info_t *h)
|
||||
{
|
||||
unsigned long register_value =
|
||||
readl(h->vaddr + SA5_INTR_STATUS);
|
||||
#ifdef CCISS_DEBUG
|
||||
printk("cciss: intr_pending %lx\n", register_value);
|
||||
#endif /* CCISS_DEBUG */
|
||||
if( register_value & SA5_INTR_PENDING)
|
||||
return 1;
|
||||
return 0 ;
|
||||
}
|
||||
|
||||
/*
|
||||
* Returns true if an interrupt is pending..
|
||||
*/
|
||||
static bool SA5B_intr_pending(ctlr_info_t *h)
|
||||
{
|
||||
unsigned long register_value =
|
||||
readl(h->vaddr + SA5_INTR_STATUS);
|
||||
#ifdef CCISS_DEBUG
|
||||
printk("cciss: intr_pending %lx\n", register_value);
|
||||
#endif /* CCISS_DEBUG */
|
||||
if( register_value & SA5B_INTR_PENDING)
|
||||
return 1;
|
||||
return 0 ;
|
||||
}
|
||||
|
||||
static bool SA5_performant_intr_pending(ctlr_info_t *h)
|
||||
{
|
||||
unsigned long register_value = readl(h->vaddr + SA5_INTR_STATUS);
|
||||
|
||||
if (!register_value)
|
||||
return false;
|
||||
|
||||
if (h->pdev->msi_enabled || h->pdev->msix_enabled)
|
||||
return true;
|
||||
|
||||
/* Read outbound doorbell to flush */
|
||||
register_value = readl(h->vaddr + SA5_OUTDB_STATUS);
|
||||
return register_value & SA5_OUTDB_STATUS_PERF_BIT;
|
||||
}
|
||||
|
||||
static struct access_method SA5_access = {
|
||||
.submit_command = SA5_submit_command,
|
||||
.set_intr_mask = SA5_intr_mask,
|
||||
.fifo_full = SA5_fifo_full,
|
||||
.intr_pending = SA5_intr_pending,
|
||||
.command_completed = SA5_completed,
|
||||
};
|
||||
|
||||
static struct access_method SA5B_access = {
|
||||
.submit_command = SA5_submit_command,
|
||||
.set_intr_mask = SA5B_intr_mask,
|
||||
.fifo_full = SA5_fifo_full,
|
||||
.intr_pending = SA5B_intr_pending,
|
||||
.command_completed = SA5_completed,
|
||||
};
|
||||
|
||||
static struct access_method SA5_performant_access = {
|
||||
.submit_command = SA5_submit_command,
|
||||
.set_intr_mask = SA5_performant_intr_mask,
|
||||
.fifo_full = SA5_fifo_full,
|
||||
.intr_pending = SA5_performant_intr_pending,
|
||||
.command_completed = SA5_performant_completed,
|
||||
};
|
||||
|
||||
struct board_type {
|
||||
__u32 board_id;
|
||||
char *product_name;
|
||||
struct access_method *access;
|
||||
int nr_cmds; /* Max cmds this kind of ctlr can handle. */
|
||||
};
|
||||
|
||||
#endif /* CCISS_H */
|
||||
|
|
@ -1,269 +0,0 @@
|
|||
#ifndef CCISS_CMD_H
|
||||
#define CCISS_CMD_H
|
||||
|
||||
#include <linux/cciss_defs.h>
|
||||
|
||||
/* DEFINES */
|
||||
#define CISS_VERSION "1.00"
|
||||
|
||||
/* general boundary definitions */
|
||||
#define MAXSGENTRIES 32
|
||||
#define CCISS_SG_CHAIN 0x80000000
|
||||
#define MAXREPLYQS 256
|
||||
|
||||
/* Unit Attentions ASC's as defined for the MSA2012sa */
|
||||
#define POWER_OR_RESET 0x29
|
||||
#define STATE_CHANGED 0x2a
|
||||
#define UNIT_ATTENTION_CLEARED 0x2f
|
||||
#define LUN_FAILED 0x3e
|
||||
#define REPORT_LUNS_CHANGED 0x3f
|
||||
|
||||
/* Unit Attentions ASCQ's as defined for the MSA2012sa */
|
||||
|
||||
/* These ASCQ's defined for ASC = POWER_OR_RESET */
|
||||
#define POWER_ON_RESET 0x00
|
||||
#define POWER_ON_REBOOT 0x01
|
||||
#define SCSI_BUS_RESET 0x02
|
||||
#define MSA_TARGET_RESET 0x03
|
||||
#define CONTROLLER_FAILOVER 0x04
|
||||
#define TRANSCEIVER_SE 0x05
|
||||
#define TRANSCEIVER_LVD 0x06
|
||||
|
||||
/* These ASCQ's defined for ASC = STATE_CHANGED */
|
||||
#define RESERVATION_PREEMPTED 0x03
|
||||
#define ASYM_ACCESS_CHANGED 0x06
|
||||
#define LUN_CAPACITY_CHANGED 0x09
|
||||
|
||||
/* config space register offsets */
|
||||
#define CFG_VENDORID 0x00
|
||||
#define CFG_DEVICEID 0x02
|
||||
#define CFG_I2OBAR 0x10
|
||||
#define CFG_MEM1BAR 0x14
|
||||
|
||||
/* i2o space register offsets */
|
||||
#define I2O_IBDB_SET 0x20
|
||||
#define I2O_IBDB_CLEAR 0x70
|
||||
#define I2O_INT_STATUS 0x30
|
||||
#define I2O_INT_MASK 0x34
|
||||
#define I2O_IBPOST_Q 0x40
|
||||
#define I2O_OBPOST_Q 0x44
|
||||
#define I2O_DMA1_CFG 0x214
|
||||
|
||||
/* Configuration Table */
|
||||
#define CFGTBL_ChangeReq 0x00000001l
|
||||
#define CFGTBL_AccCmds 0x00000001l
|
||||
#define DOORBELL_CTLR_RESET 0x00000004l
|
||||
#define DOORBELL_CTLR_RESET2 0x00000020l
|
||||
|
||||
#define CFGTBL_Trans_Simple 0x00000002l
|
||||
#define CFGTBL_Trans_Performant 0x00000004l
|
||||
#define CFGTBL_Trans_use_short_tags 0x20000000l
|
||||
|
||||
#define CFGTBL_BusType_Ultra2 0x00000001l
|
||||
#define CFGTBL_BusType_Ultra3 0x00000002l
|
||||
#define CFGTBL_BusType_Fibre1G 0x00000100l
|
||||
#define CFGTBL_BusType_Fibre2G 0x00000200l
|
||||
typedef struct _vals32
|
||||
{
|
||||
__u32 lower;
|
||||
__u32 upper;
|
||||
} vals32;
|
||||
|
||||
typedef union _u64bit
|
||||
{
|
||||
vals32 val32;
|
||||
__u64 val;
|
||||
} u64bit;
|
||||
|
||||
/* Type defs used in the following structs */
|
||||
#define QWORD vals32
|
||||
|
||||
/* STRUCTURES */
|
||||
#define CISS_MAX_PHYS_LUN 1024
|
||||
/* SCSI-3 Cmmands */
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
#define CISS_INQUIRY 0x12
|
||||
/* Date returned */
|
||||
typedef struct _InquiryData_struct
|
||||
{
|
||||
BYTE data_byte[36];
|
||||
} InquiryData_struct;
|
||||
|
||||
#define CISS_REPORT_LOG 0xc2 /* Report Logical LUNs */
|
||||
#define CISS_REPORT_PHYS 0xc3 /* Report Physical LUNs */
|
||||
/* Data returned */
|
||||
typedef struct _ReportLUNdata_struct
|
||||
{
|
||||
BYTE LUNListLength[4];
|
||||
DWORD reserved;
|
||||
BYTE LUN[CISS_MAX_LUN][8];
|
||||
} ReportLunData_struct;
|
||||
|
||||
#define CCISS_READ_CAPACITY 0x25 /* Read Capacity */
|
||||
typedef struct _ReadCapdata_struct
|
||||
{
|
||||
BYTE total_size[4]; /* Total size in blocks */
|
||||
BYTE block_size[4]; /* Size of blocks in bytes */
|
||||
} ReadCapdata_struct;
|
||||
|
||||
#define CCISS_READ_CAPACITY_16 0x9e /* Read Capacity 16 */
|
||||
|
||||
/* service action to differentiate a 16 byte read capacity from
|
||||
other commands that use the 0x9e SCSI op code */
|
||||
|
||||
#define CCISS_READ_CAPACITY_16_SERVICE_ACT 0x10
|
||||
|
||||
typedef struct _ReadCapdata_struct_16
|
||||
{
|
||||
BYTE total_size[8]; /* Total size in blocks */
|
||||
BYTE block_size[4]; /* Size of blocks in bytes */
|
||||
BYTE prot_en:1; /* protection enable bit */
|
||||
BYTE rto_en:1; /* reference tag own enable bit */
|
||||
BYTE reserved:6; /* reserved bits */
|
||||
BYTE reserved2[18]; /* reserved bytes per spec */
|
||||
} ReadCapdata_struct_16;
|
||||
|
||||
/* Define the supported read/write commands for cciss based controllers */
|
||||
|
||||
#define CCISS_READ_10 0x28 /* Read(10) */
|
||||
#define CCISS_WRITE_10 0x2a /* Write(10) */
|
||||
#define CCISS_READ_16 0x88 /* Read(16) */
|
||||
#define CCISS_WRITE_16 0x8a /* Write(16) */
|
||||
|
||||
/* Define the CDB lengths supported by cciss based controllers */
|
||||
|
||||
#define CDB_LEN10 10
|
||||
#define CDB_LEN16 16
|
||||
|
||||
/* BMIC commands */
|
||||
#define BMIC_READ 0x26
|
||||
#define BMIC_WRITE 0x27
|
||||
#define BMIC_CACHE_FLUSH 0xc2
|
||||
#define CCISS_CACHE_FLUSH 0x01 /* C2 was already being used by CCISS */
|
||||
|
||||
#define CCISS_ABORT_MSG 0x00
|
||||
#define CCISS_RESET_MSG 0x01
|
||||
#define CCISS_RESET_TYPE_CONTROLLER 0x00
|
||||
#define CCISS_RESET_TYPE_BUS 0x01
|
||||
#define CCISS_RESET_TYPE_TARGET 0x03
|
||||
#define CCISS_RESET_TYPE_LUN 0x04
|
||||
#define CCISS_NOOP_MSG 0x03
|
||||
|
||||
/* Command List Structure */
|
||||
#define CTLR_LUNID "\0\0\0\0\0\0\0\0"
|
||||
|
||||
typedef struct _CommandListHeader_struct {
|
||||
BYTE ReplyQueue;
|
||||
BYTE SGList;
|
||||
HWORD SGTotal;
|
||||
QWORD Tag;
|
||||
LUNAddr_struct LUN;
|
||||
} CommandListHeader_struct;
|
||||
typedef struct _ErrDescriptor_struct {
|
||||
QWORD Addr;
|
||||
DWORD Len;
|
||||
} ErrDescriptor_struct;
|
||||
typedef struct _SGDescriptor_struct {
|
||||
QWORD Addr;
|
||||
DWORD Len;
|
||||
DWORD Ext;
|
||||
} SGDescriptor_struct;
|
||||
|
||||
/* Command types */
|
||||
#define CMD_RWREQ 0x00
|
||||
#define CMD_IOCTL_PEND 0x01
|
||||
#define CMD_SCSI 0x03
|
||||
#define CMD_MSG_DONE 0x04
|
||||
#define CMD_MSG_TIMEOUT 0x05
|
||||
#define CMD_MSG_STALE 0xff
|
||||
|
||||
/* This structure needs to be divisible by COMMANDLIST_ALIGNMENT
|
||||
* because low bits of the address are used to to indicate that
|
||||
* whether the tag contains an index or an address. PAD_32 and
|
||||
* PAD_64 can be adjusted independently as needed for 32-bit
|
||||
* and 64-bits systems.
|
||||
*/
|
||||
#define COMMANDLIST_ALIGNMENT (32)
|
||||
#define IS_64_BIT ((sizeof(long) - 4)/4)
|
||||
#define IS_32_BIT (!IS_64_BIT)
|
||||
#define PAD_32 (0)
|
||||
#define PAD_64 (4)
|
||||
#define PADSIZE (IS_32_BIT * PAD_32 + IS_64_BIT * PAD_64)
|
||||
#define DIRECT_LOOKUP_BIT 0x10
|
||||
#define DIRECT_LOOKUP_SHIFT 5
|
||||
|
||||
typedef struct _CommandList_struct {
|
||||
CommandListHeader_struct Header;
|
||||
RequestBlock_struct Request;
|
||||
ErrDescriptor_struct ErrDesc;
|
||||
SGDescriptor_struct SG[MAXSGENTRIES];
|
||||
/* information associated with the command */
|
||||
__u32 busaddr; /* physical address of this record */
|
||||
ErrorInfo_struct * err_info; /* pointer to the allocated mem */
|
||||
int ctlr;
|
||||
int cmd_type;
|
||||
long cmdindex;
|
||||
struct list_head list;
|
||||
struct request * rq;
|
||||
struct completion *waiting;
|
||||
int retry_count;
|
||||
void * scsi_cmd;
|
||||
char pad[PADSIZE];
|
||||
} CommandList_struct;
|
||||
|
||||
/* Configuration Table Structure */
|
||||
typedef struct _HostWrite_struct {
|
||||
DWORD TransportRequest;
|
||||
DWORD Reserved;
|
||||
DWORD CoalIntDelay;
|
||||
DWORD CoalIntCount;
|
||||
} HostWrite_struct;
|
||||
|
||||
typedef struct _CfgTable_struct {
|
||||
BYTE Signature[4];
|
||||
DWORD SpecValence;
|
||||
#define SIMPLE_MODE 0x02
|
||||
#define PERFORMANT_MODE 0x04
|
||||
#define MEMQ_MODE 0x08
|
||||
DWORD TransportSupport;
|
||||
DWORD TransportActive;
|
||||
HostWrite_struct HostWrite;
|
||||
DWORD CmdsOutMax;
|
||||
DWORD BusTypes;
|
||||
DWORD TransMethodOffset;
|
||||
BYTE ServerName[16];
|
||||
DWORD HeartBeat;
|
||||
DWORD SCSI_Prefetch;
|
||||
DWORD MaxSGElements;
|
||||
DWORD MaxLogicalUnits;
|
||||
DWORD MaxPhysicalDrives;
|
||||
DWORD MaxPhysicalDrivesPerLogicalUnit;
|
||||
DWORD MaxPerformantModeCommands;
|
||||
u8 reserved[0x78 - 0x58];
|
||||
u32 misc_fw_support; /* offset 0x78 */
|
||||
#define MISC_FW_DOORBELL_RESET (0x02)
|
||||
#define MISC_FW_DOORBELL_RESET2 (0x10)
|
||||
u8 driver_version[32];
|
||||
} CfgTable_struct;
|
||||
|
||||
struct TransTable_struct {
|
||||
u32 BlockFetch0;
|
||||
u32 BlockFetch1;
|
||||
u32 BlockFetch2;
|
||||
u32 BlockFetch3;
|
||||
u32 BlockFetch4;
|
||||
u32 BlockFetch5;
|
||||
u32 BlockFetch6;
|
||||
u32 BlockFetch7;
|
||||
u32 RepQSize;
|
||||
u32 RepQCount;
|
||||
u32 RepQCtrAddrLow32;
|
||||
u32 RepQCtrAddrHigh32;
|
||||
u32 RepQAddr0Low32;
|
||||
u32 RepQAddr0High32;
|
||||
};
|
||||
|
||||
#pragma pack()
|
||||
#endif /* CCISS_CMD_H */
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -1,79 +0,0 @@
|
|||
/*
|
||||
* Disk Array driver for HP Smart Array controllers, SCSI Tape module.
|
||||
* (C) Copyright 2001, 2007 Hewlett-Packard Development Company, L.P.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 300, Boston, MA
|
||||
* 02111-1307, USA.
|
||||
*
|
||||
* Questions/Comments/Bugfixes to iss_storagedev@hp.com
|
||||
*
|
||||
*/
|
||||
#ifdef CONFIG_CISS_SCSI_TAPE
|
||||
#ifndef _CCISS_SCSI_H_
|
||||
#define _CCISS_SCSI_H_
|
||||
|
||||
#include <scsi/scsicam.h> /* possibly irrelevant, since we don't show disks */
|
||||
|
||||
/* the scsi id of the adapter... */
|
||||
#define SELF_SCSI_ID 15
|
||||
/* 15 is somewhat arbitrary, since the scsi-2 bus
|
||||
that's presented by the driver to the OS is
|
||||
fabricated. The "real" scsi-3 bus the
|
||||
hardware presents is fabricated too.
|
||||
The actual, honest-to-goodness physical
|
||||
bus that the devices are attached to is not
|
||||
addressible natively, and may in fact turn
|
||||
out to be not scsi at all. */
|
||||
|
||||
|
||||
/*
|
||||
|
||||
If the upper scsi layer tries to track how many commands we have
|
||||
outstanding, it will be operating under the misapprehension that it is
|
||||
the only one sending us requests. We also have the block interface,
|
||||
which is where most requests must surely come from, so the upper layer's
|
||||
notion of how many requests we have outstanding will be wrong most or
|
||||
all of the time.
|
||||
|
||||
Note, the normal SCSI mid-layer error handling doesn't work well
|
||||
for this driver because 1) it takes the io_request_lock before
|
||||
calling error handlers and uses a local variable to store flags,
|
||||
so the io_request_lock cannot be released and interrupts enabled
|
||||
inside the error handlers, and, the error handlers cannot poll
|
||||
for command completion because they might get commands from the
|
||||
block half of the driver completing, and not know what to do
|
||||
with them. That's what we get for making a hybrid scsi/block
|
||||
driver, I suppose.
|
||||
|
||||
*/
|
||||
|
||||
struct cciss_scsi_dev_t {
|
||||
int devtype;
|
||||
int bus, target, lun; /* as presented to the OS */
|
||||
unsigned char scsi3addr[8]; /* as presented to the HW */
|
||||
unsigned char device_id[16]; /* from inquiry pg. 0x83 */
|
||||
unsigned char vendor[8]; /* bytes 8-15 of inquiry data */
|
||||
unsigned char model[16]; /* bytes 16-31 of inquiry data */
|
||||
unsigned char revision[4]; /* bytes 32-35 of inquiry data */
|
||||
};
|
||||
|
||||
struct cciss_scsi_hba_t {
|
||||
char *name;
|
||||
int ndevices;
|
||||
#define CCISS_MAX_SCSI_DEVS_PER_HBA 16
|
||||
struct cciss_scsi_dev_t dev[CCISS_MAX_SCSI_DEVS_PER_HBA];
|
||||
};
|
||||
|
||||
#endif /* _CCISS_SCSI_H_ */
|
||||
#endif /* CONFIG_CISS_SCSI_TAPE */
|
||||
Loading…
Reference in a new issue