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RTC for 4.11
Subsystem: - constify rtc_class_ops structures New driver: - STM32 Drivers: - armada38x: fix errata, Armada 7K/8K support - ds3232: fix wakeup support - gemini: DT support - m48t86: huge cleanup and platform_data removal - mcp795: alarm support - sun6i: proper oscillator handling - tegra: proper clock handling - tps65910: calibration support -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEl0I5XWmUIrwBfFMm2KKDO9oT4sIFAlizZLQACgkQ2KKDO9oT 4sISIw//Zl96KIXqeC+En+8v8Sa0pham/mcLbKYujnFIi1mMaesEXJJClALXYAGQ r/fwXkYowC14AMXGuV5vMMVAVisJpj1gtMmpom+9/7mYtkFOIUsB8Sis8dMqgTqx JFBho7JvPJcwE7BLzUNRzX4tWhFhNm0epyMrsrQrBSeLx3PD8xg5v2kPYuZHdYU0 63Bovkq6zvH9/WdO8DLXw/nc/Y0Bo66rlvJkcaNfjBrdFTRvRAM5JIiJuxewR+jY 3bTQ8PQjnHAWIj/RhrwguGTLDlgJKcpitB06Y53TdRaNtVfJuEN8z6EjNkR37kyS ZJnPgihCoH6l7v28uY4e5BAg/Fe3ZhDrPmhZWq8rEkByeQpSUWgrE/DtcoC0OkZO l2fU/y2vq4za7CpRPp5bvq3sF0PbRHSF0o8rvmHlQZI/mwwYbwF9gk1vg5adyH7i 1UuTGoDXxcMYZPJm3zezE1bUa4OAyjH1NhrvPvinlDw+aekaai2eFUKIbJim+dJx tEVPATPlDk/Ngwth1hpE8D/tOdoQhWtfNk7+zo7MNtMjAO1h/DxSLHXJ9mvCwcPh lPT9BmQxT1HECIa5gjN1R+5X5or5z8LPcNGO9TedIchfZ8qBGzsWOt9bXlw2dgI2 qmXo6IrjCN88kf+qsVA4FKLmaqgpb9+Yb+5cPlhEOKvxUhY47Nc= =Go5q -----END PGP SIGNATURE----- Merge tag 'rtc-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux Pull RTC updates from Alexandre Belloni: "Subsystem: - constify rtc_class_ops structures New driver: - STM32 Drivers: - armada38x: fix errata, Armada 7K/8K support - ds3232: fix wakeup support - gemini: DT support - m48t86: huge cleanup and platform_data removal - mcp795: alarm support - sun6i: proper oscillator handling - tegra: proper clock handling - tps65910: calibration support" * tag 'rtc-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (44 commits) rtc: ds3232: Call device_init_wakeup before device_register rtc: pcf2127: bulk read only date and time registers. rtc: armada38x: Add support for Armada 7K/8K rtc: armada38x: Prepare driver to manage different versions rtc: ds3232: Add regmap max_register definition. rtc: ds3232: Cleanup whitespace around register and bit definitions. rtc: m48t86: remove unused platform_data ARM: Orion5x: ts78xx: allow rtc-m48t86 to manage it's own resources ARM: Orion5x: ts78xx: remove RTC detection ARM: ep93xx: ts72xx: allow rtc-m48t86 to manage its own resources rtc: m48t86: verify that the RTC is actually present rtc: m48t86: add NVRAM support rtc: m48t86: allow driver to manage its resources rtc: m48t86: shorten register name defines bindings: rtc: correct wrong reference in required properties rtc: sun6i: Fix return value check in sun6i_rtc_clk_init() rtc: sun6i: extend test coverage rtc: sun6i: Fix compatibility with old DT binding rtc: snvs: add a missing write sync rtc: bq32000: add support to enable disable the trickle charge FET bypass ...
This commit is contained in:
commit
5782fd14aa
35 changed files with 1956 additions and 376 deletions
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* Real Time Clock of the Armada 38x SoCs
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* Real Time Clock of the Armada 38x/7K/8K SoCs
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RTC controller for the Armada 38x SoCs
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RTC controller for the Armada 38x, 7K and 8K SoCs
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Required properties:
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- compatible : Should be "marvell,armada-380-rtc"
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- compatible : Should be one of the following:
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"marvell,armada-380-rtc" for Armada 38x SoC
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"marvell,armada-8k-rtc" for Aramda 7K/8K SoCs
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- reg: a list of base address and size pairs, one for each entry in
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reg-names
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- reg names: should contain:
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14
Documentation/devicetree/bindings/rtc/cortina,gemini.txt
Normal file
14
Documentation/devicetree/bindings/rtc/cortina,gemini.txt
Normal file
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@ -0,0 +1,14 @@
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* Cortina Systems Gemini RTC
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Gemini SoC real-time clock.
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Required properties:
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- compatible : Should be "cortina,gemini-rtc"
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Examples:
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rtc@45000000 {
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compatible = "cortina,gemini-rtc";
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reg = <0x45000000 0x100>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
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};
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@ -8,10 +8,13 @@ Required properties:
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region.
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- interrupts: rtc alarm interrupt
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Optional properties:
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- interrupts: dryice security violation interrupt
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Example:
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rtc@80056000 {
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compatible = "fsl,imx53-rtc", "fsl,imx25-rtc";
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reg = <0x80056000 2000>;
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interrupts = <29>;
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interrupts = <29 56>;
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};
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@ -1,7 +1,8 @@
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* Maxim DS3231 Real Time Clock
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Required properties:
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see: Documentation/devicetree/bindings/i2c/trivial-admin-guide/devices.rst
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- compatible: Should contain "maxim,ds3231".
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- reg: I2C address for chip.
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Optional property:
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- #clock-cells: Should be 1.
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@ -3,7 +3,8 @@
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Philips PCF8563/Epson RTC8564 Real Time Clock
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Required properties:
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see: Documentation/devicetree/bindings/i2c/trivial-admin-guide/devices.rst
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- compatible: Should contain "nxp,pcf8563".
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- reg: I2C address for chip.
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Optional property:
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- #clock-cells: Should be 0.
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27
Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
Normal file
27
Documentation/devicetree/bindings/rtc/st,stm32-rtc.txt
Normal file
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STM32 Real Time Clock
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Required properties:
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- compatible: "st,stm32-rtc".
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- reg: address range of rtc register set.
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- clocks: reference to the clock entry ck_rtc.
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- interrupt-parent: phandle for the interrupt controller.
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- interrupts: rtc alarm interrupt.
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- st,syscfg: phandle for pwrcfg, mandatory to disable/enable backup domain
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(RTC registers) write protection.
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Optional properties (to override default ck_rtc parent clock):
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- assigned-clocks: reference to the ck_rtc clock entry.
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- assigned-clock-parents: phandle of the new parent clock of ck_rtc.
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Example:
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rtc: rtc@40002800 {
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compatible = "st,stm32-rtc";
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reg = <0x40002800 0x400>;
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clocks = <&rcc 1 CLK_RTC>;
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assigned-clocks = <&rcc 1 CLK_RTC>;
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assigned-clock-parents = <&rcc 1 CLK_LSE>;
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interrupt-parent = <&exti>;
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interrupts = <17 1>;
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st,syscfg = <&pwrcfg>;
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};
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memory mapped region.
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- interrupts : IRQ lines for the RTC alarm 0 and alarm 1, in that order.
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Required properties for new device trees
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- clocks : phandle to the 32kHz external oscillator
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- clock-output-names : name of the LOSC clock created
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- #clock-cells : must be equals to 1. The RTC provides two clocks: the
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LOSC and its external output, with index 0 and 1
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respectively.
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Example:
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rtc: rtc@01f00000 {
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compatible = "allwinner,sun6i-a31-rtc";
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reg = <0x01f00000 0x54>;
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interrupts = <0 40 4>, <0 41 4>;
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clock-output-names = "osc32k";
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clocks = <&ext_osc32k>;
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#clock-cells = <1>;
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};
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