Merge "mhi: core: Add checks for bhi and bhie offsets"

This commit is contained in:
qctecmdr 2020-08-18 14:18:22 -07:00 • committed by Gerrit - the friendly Code Review server
commit 580c2daadd
4 changed files with 31 additions and 5 deletions

View file

@ -217,6 +217,9 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl)
* waiting for image download completion.
*/
ee = mhi_get_exec_env(mhi_cntrl);
if (ee == MHI_EE_MAX)
goto err_no_rddm;
if (ee != MHI_EE_RDDM) {
MHI_CNTRL_LOG("Trigger device into RDDM mode using SYSERR\n");
@ -265,10 +268,12 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl)
ee = mhi_get_exec_env(mhi_cntrl);
ret = mhi_read_reg(mhi_cntrl, base, BHIE_RXVECSTATUS_OFFS, &rx_status);
MHI_CNTRL_ERR("Did not complete RDDM transfer\n");
MHI_CNTRL_ERR("Current EE:%s\n", TO_MHI_EXEC_STR(ee));
MHI_CNTRL_ERR("RXVEC_STATUS:0x%x, ret:%d\n", rx_status, ret);
err_no_rddm:
MHI_CNTRL_ERR("Current EE:%s\n", TO_MHI_EXEC_STR(ee));
MHI_CNTRL_ERR("Did not complete RDDM transfer\n");
return -EIO;
}

View file

@ -244,8 +244,13 @@ static enum mhi_ee mhi_translate_dev_ee(struct mhi_controller *mhi_cntrl,
enum mhi_ee mhi_get_exec_env(struct mhi_controller *mhi_cntrl)
{
int ret;
u32 exec;
int ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_EXECENV, &exec);
if (!mhi_cntrl || !mhi_cntrl->bhi)
return MHI_EE_MAX;
ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_EXECENV, &exec);
return (ret) ? MHI_EE_MAX : mhi_translate_dev_ee(mhi_cntrl, exec);
}

View file

@ -968,6 +968,13 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl)
goto error_bhi_offset;
}
if (val >= mhi_cntrl->len) {
ret = -ENODEV;
write_unlock_irq(&mhi_cntrl->pm_lock);
MHI_ERR("Invalid bhi offset:%x\n", val);
goto error_bhi_offset;
}
mhi_cntrl->bhi = mhi_cntrl->regs + val;
/* setup bhie offset if not set */
@ -979,6 +986,13 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl)
goto error_bhi_offset;
}
if (val >= mhi_cntrl->len) {
ret = -ENODEV;
write_unlock_irq(&mhi_cntrl->pm_lock);
MHI_ERR("Invalid bhie offset:%x\n", val);
goto error_bhi_offset;
}
mhi_cntrl->bhie = mhi_cntrl->regs + val;
}

View file

@ -4453,8 +4453,10 @@ static int cnss_pci_register_mhi(struct cnss_pci_data *pci_priv)
mhi_ctrl->fw_image = plat_priv->firmware_name;
mhi_ctrl->regs = pci_priv->bar;
cnss_pr_dbg("BAR starts at %pa\n",
&pci_resource_start(pci_priv->pci_dev, PCI_BAR_NUM));
mhi_ctrl->len = pci_resource_len(pci_priv->pci_dev, PCI_BAR_NUM);
cnss_pr_dbg("BAR starts at %pa, len-%x\n",
&pci_resource_start(pci_priv->pci_dev, PCI_BAR_NUM),
mhi_ctrl->len);
ret = cnss_pci_get_mhi_msi(pci_priv);
if (ret) {