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x86/mce/AMD, EDAC/mce_amd: Define and use tables for known SMCA IP types
Scalable MCA defines a number of IP types. An MCA bank on an SMCA system is defined as one of these IP types. A bank's type is uniquely identified by the combination of the HWID and MCATYPE values read from its MCA_IPID register. Add the required tables in order to be able to lookup error descriptions based on a bank's type and the error's extended error code. [ bp: Align comments, simplify a bit. ] Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Thomas Gleixner <[email protected]>
This commit is contained in:
Yazen Ghannam
Thomas Gleixner
parent
856095b179
commit
5896820e0a
3 changed files with 147 additions and 212 deletions
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@ -283,6 +283,27 @@ static const char * const smca_smu_mce_desc[] = {
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"SMU RAM ECC or parity error",
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};
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struct smca_mce_desc {
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const char * const *descs;
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unsigned int num_descs;
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};
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static struct smca_mce_desc smca_mce_descs[] = {
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[SMCA_LS] = { smca_ls_mce_desc, ARRAY_SIZE(smca_ls_mce_desc) },
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[SMCA_IF] = { smca_if_mce_desc, ARRAY_SIZE(smca_if_mce_desc) },
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[SMCA_L2_CACHE] = { smca_l2_mce_desc, ARRAY_SIZE(smca_l2_mce_desc) },
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[SMCA_DE] = { smca_de_mce_desc, ARRAY_SIZE(smca_de_mce_desc) },
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[SMCA_EX] = { smca_ex_mce_desc, ARRAY_SIZE(smca_ex_mce_desc) },
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[SMCA_FP] = { smca_fp_mce_desc, ARRAY_SIZE(smca_fp_mce_desc) },
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[SMCA_L3_CACHE] = { smca_l3_mce_desc, ARRAY_SIZE(smca_l3_mce_desc) },
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[SMCA_CS] = { smca_cs_mce_desc, ARRAY_SIZE(smca_cs_mce_desc) },
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[SMCA_PIE] = { smca_pie_mce_desc, ARRAY_SIZE(smca_pie_mce_desc) },
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[SMCA_UMC] = { smca_umc_mce_desc, ARRAY_SIZE(smca_umc_mce_desc) },
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[SMCA_PB] = { smca_pb_mce_desc, ARRAY_SIZE(smca_pb_mce_desc) },
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[SMCA_PSP] = { smca_psp_mce_desc, ARRAY_SIZE(smca_psp_mce_desc) },
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[SMCA_SMU] = { smca_smu_mce_desc, ARRAY_SIZE(smca_smu_mce_desc) },
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};
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static bool f12h_mc0_mce(u16 ec, u8 xec)
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{
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bool ret = false;
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@ -827,175 +848,32 @@ static void decode_mc6_mce(struct mce *m)
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pr_emerg(HW_ERR "Corrupted MC6 MCE info?\n");
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}
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static void decode_f17h_core_errors(const char *ip_name, u8 xec,
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unsigned int mca_type)
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{
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const char * const *error_desc_array;
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size_t len;
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pr_emerg(HW_ERR "%s Error: ", ip_name);
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switch (mca_type) {
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case SMCA_LS:
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error_desc_array = smca_ls_mce_desc;
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len = ARRAY_SIZE(smca_ls_mce_desc) - 1;
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if (xec == 0x4) {
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pr_cont("Unrecognized LS MCA error code.\n");
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return;
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}
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break;
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case SMCA_IF:
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error_desc_array = smca_if_mce_desc;
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len = ARRAY_SIZE(smca_if_mce_desc) - 1;
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break;
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case SMCA_L2_CACHE:
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error_desc_array = smca_l2_mce_desc;
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len = ARRAY_SIZE(smca_l2_mce_desc) - 1;
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break;
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case SMCA_DE:
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error_desc_array = smca_de_mce_desc;
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len = ARRAY_SIZE(smca_de_mce_desc) - 1;
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break;
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case SMCA_EX:
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error_desc_array = smca_ex_mce_desc;
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len = ARRAY_SIZE(smca_ex_mce_desc) - 1;
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break;
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case SMCA_FP:
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error_desc_array = smca_fp_mce_desc;
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len = ARRAY_SIZE(smca_fp_mce_desc) - 1;
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break;
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case SMCA_L3_CACHE:
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error_desc_array = smca_l3_mce_desc;
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len = ARRAY_SIZE(smca_l3_mce_desc) - 1;
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break;
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default:
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pr_cont("Corrupted MCA core error info.\n");
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return;
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}
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if (xec > len) {
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pr_cont("Unrecognized %s MCA bank error code.\n",
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amd_core_mcablock_names[mca_type]);
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return;
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}
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pr_cont("%s.\n", error_desc_array[xec]);
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}
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static void decode_df_errors(u8 xec, unsigned int mca_type)
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{
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const char * const *error_desc_array;
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size_t len;
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pr_emerg(HW_ERR "Data Fabric Error: ");
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switch (mca_type) {
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case SMCA_CS:
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error_desc_array = smca_cs_mce_desc;
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len = ARRAY_SIZE(smca_cs_mce_desc) - 1;
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break;
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case SMCA_PIE:
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error_desc_array = smca_pie_mce_desc;
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len = ARRAY_SIZE(smca_pie_mce_desc) - 1;
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break;
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default:
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pr_cont("Corrupted MCA Data Fabric info.\n");
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return;
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}
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if (xec > len) {
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pr_cont("Unrecognized %s MCA bank error code.\n",
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amd_df_mcablock_names[mca_type]);
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return;
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}
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pr_cont("%s.\n", error_desc_array[xec]);
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}
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/* Decode errors according to Scalable MCA specification */
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static void decode_smca_errors(struct mce *m)
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{
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u32 addr = MSR_AMD64_SMCA_MCx_IPID(m->bank);
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unsigned int hwid, mca_type, i;
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u8 xec = XEC(m->status, xec_mask);
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const char * const *error_desc_array;
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struct smca_hwid_mcatype *type;
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unsigned int bank_type;
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const char *ip_name;
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u32 low, high;
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size_t len;
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u8 xec = XEC(m->status, xec_mask);
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if (rdmsr_safe(addr, &low, &high)) {
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pr_emerg(HW_ERR "Invalid IP block specified.\n");
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if (m->bank >= ARRAY_SIZE(smca_banks))
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return;
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}
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hwid = high & MCI_IPID_HWID;
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mca_type = (high & MCI_IPID_MCATYPE) >> 16;
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pr_emerg(HW_ERR "MC%d IPID value: 0x%08x%08x\n", m->bank, high, low);
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/*
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* Based on hwid and mca_type values, decode errors from respective IPs.
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* Note: mca_type values make sense only in the context of an hwid.
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*/
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for (i = 0; i < ARRAY_SIZE(amd_hwids); i++)
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if (amd_hwids[i].hwid == hwid)
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break;
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switch (i) {
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case SMCA_F17H_CORE:
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ip_name = (mca_type == SMCA_L3_CACHE) ?
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"L3 Cache" : "F17h Core";
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return decode_f17h_core_errors(ip_name, xec, mca_type);
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break;
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case SMCA_DF:
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return decode_df_errors(xec, mca_type);
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break;
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case SMCA_UMC:
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error_desc_array = smca_umc_mce_desc;
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len = ARRAY_SIZE(smca_umc_mce_desc) - 1;
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break;
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case SMCA_PB:
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error_desc_array = smca_pb_mce_desc;
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len = ARRAY_SIZE(smca_pb_mce_desc) - 1;
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break;
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case SMCA_PSP:
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error_desc_array = smca_psp_mce_desc;
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len = ARRAY_SIZE(smca_psp_mce_desc) - 1;
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break;
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case SMCA_SMU:
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error_desc_array = smca_smu_mce_desc;
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len = ARRAY_SIZE(smca_smu_mce_desc) - 1;
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break;
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default:
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pr_emerg(HW_ERR "HWID:%d does not match any existing IPs.\n", hwid);
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type = smca_banks[m->bank].type;
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if (!type)
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return;
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bank_type = type->bank_type;
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ip_name = smca_bank_names[bank_type].long_name;
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pr_emerg(HW_ERR "%s Extended Error Code: %d\n", ip_name, xec);
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/* Only print the decode of valid error codes */
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if (xec < smca_mce_descs[bank_type].num_descs &&
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(type->xec_bitmap & BIT_ULL(xec))) {
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pr_emerg(HW_ERR "%s Error: ", ip_name);
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pr_cont("%s.\n", smca_mce_descs[bank_type].descs[xec]);
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}
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ip_name = amd_hwids[i].name;
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pr_emerg(HW_ERR "%s Error: ", ip_name);
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if (xec > len) {
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pr_cont("Unrecognized %s MCA bank error code.\n", ip_name);
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return;
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}
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pr_cont("%s.\n", error_desc_array[xec]);
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}
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static inline void amd_decode_err_code(u16 ec)
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