mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-24 21:54:34 -04:00
Merge branches 'drivers/macb-gem' and 'drivers/pxa-gpio' into next/drivers
This commit is contained in:
Arnd Bergmann
commit
58a273745f
691 changed files with 16753 additions and 11135 deletions
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|
@ -23,57 +23,62 @@
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|||
struct module;
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struct cpuidle_device;
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struct cpuidle_driver;
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/****************************
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* CPUIDLE DEVICE INTERFACE *
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||||
****************************/
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struct cpuidle_state_usage {
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void *driver_data;
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unsigned long long usage;
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unsigned long long time; /* in US */
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};
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|
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struct cpuidle_state {
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char name[CPUIDLE_NAME_LEN];
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char desc[CPUIDLE_DESC_LEN];
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void *driver_data;
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unsigned int flags;
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unsigned int exit_latency; /* in US */
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unsigned int power_usage; /* in mW */
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unsigned int target_residency; /* in US */
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unsigned long long usage;
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unsigned long long time; /* in US */
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int (*enter) (struct cpuidle_device *dev,
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struct cpuidle_state *state);
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struct cpuidle_driver *drv,
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int index);
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};
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/* Idle State Flags */
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#define CPUIDLE_FLAG_TIME_VALID (0x01) /* is residency time measurable? */
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#define CPUIDLE_FLAG_IGNORE (0x100) /* ignore during this idle period */
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#define CPUIDLE_DRIVER_FLAGS_MASK (0xFFFF0000)
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/**
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* cpuidle_get_statedata - retrieves private driver state data
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* @state: the state
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* @st_usage: the state usage statistics
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*/
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static inline void * cpuidle_get_statedata(struct cpuidle_state *state)
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static inline void *cpuidle_get_statedata(struct cpuidle_state_usage *st_usage)
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{
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return state->driver_data;
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return st_usage->driver_data;
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}
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/**
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* cpuidle_set_statedata - stores private driver state data
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* @state: the state
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* @st_usage: the state usage statistics
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* @data: the private data
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*/
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static inline void
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cpuidle_set_statedata(struct cpuidle_state *state, void *data)
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cpuidle_set_statedata(struct cpuidle_state_usage *st_usage, void *data)
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{
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state->driver_data = data;
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st_usage->driver_data = data;
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}
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struct cpuidle_state_kobj {
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struct cpuidle_state *state;
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struct cpuidle_state_usage *state_usage;
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struct completion kobj_unregister;
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struct kobject kobj;
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};
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@ -81,22 +86,17 @@ struct cpuidle_state_kobj {
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struct cpuidle_device {
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unsigned int registered:1;
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unsigned int enabled:1;
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unsigned int power_specified:1;
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unsigned int cpu;
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int last_residency;
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int state_count;
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struct cpuidle_state states[CPUIDLE_STATE_MAX];
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struct cpuidle_state_usage states_usage[CPUIDLE_STATE_MAX];
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struct cpuidle_state_kobj *kobjs[CPUIDLE_STATE_MAX];
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struct cpuidle_state *last_state;
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struct list_head device_list;
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struct kobject kobj;
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struct completion kobj_unregister;
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void *governor_data;
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struct cpuidle_state *safe_state;
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int (*prepare) (struct cpuidle_device *dev);
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};
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DECLARE_PER_CPU(struct cpuidle_device *, cpuidle_devices);
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@ -120,6 +120,11 @@ static inline int cpuidle_get_last_residency(struct cpuidle_device *dev)
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struct cpuidle_driver {
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char name[CPUIDLE_NAME_LEN];
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struct module *owner;
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|
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unsigned int power_specified:1;
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struct cpuidle_state states[CPUIDLE_STATE_MAX];
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int state_count;
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int safe_state_index;
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};
|
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|
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#ifdef CONFIG_CPU_IDLE
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@ -166,11 +171,14 @@ struct cpuidle_governor {
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struct list_head governor_list;
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unsigned int rating;
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|
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int (*enable) (struct cpuidle_device *dev);
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void (*disable) (struct cpuidle_device *dev);
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int (*enable) (struct cpuidle_driver *drv,
|
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struct cpuidle_device *dev);
|
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void (*disable) (struct cpuidle_driver *drv,
|
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struct cpuidle_device *dev);
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|
||||
int (*select) (struct cpuidle_device *dev);
|
||||
void (*reflect) (struct cpuidle_device *dev);
|
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int (*select) (struct cpuidle_driver *drv,
|
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struct cpuidle_device *dev);
|
||||
void (*reflect) (struct cpuidle_device *dev, int index);
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||||
|
||||
struct module *owner;
|
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};
|
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|
|
|
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|
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@ -41,7 +41,7 @@ struct devfreq_dev_status {
|
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unsigned long total_time;
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unsigned long busy_time;
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unsigned long current_frequency;
|
||||
void *private_date;
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||||
void *private_data;
|
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};
|
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|
||||
/**
|
||||
|
|
|
|||
|
|
@ -1097,10 +1097,12 @@ struct ethtool_ops {
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#define SPEED_1000 1000
|
||||
#define SPEED_2500 2500
|
||||
#define SPEED_10000 10000
|
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#define SPEED_UNKNOWN -1
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||||
|
||||
/* Duplex, half or full. */
|
||||
#define DUPLEX_HALF 0x00
|
||||
#define DUPLEX_FULL 0x01
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||||
#define DUPLEX_UNKNOWN 0xff
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||||
|
||||
/* Which connector port. */
|
||||
#define PORT_TP 0x00
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||||
|
|
|
|||
|
|
@ -118,7 +118,6 @@ int __hwspin_trylock(struct hwspinlock *hwlock, int mode, unsigned long *flags)
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static inline
|
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void __hwspin_unlock(struct hwspinlock *hwlock, int mode, unsigned long *flags)
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{
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return 0;
|
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}
|
||||
|
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static inline int hwspin_lock_get_id(struct hwspinlock *hwlock)
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|
|
|
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|
|
@ -1962,6 +1962,21 @@
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#define WM8958_MICB2_DISCH_SHIFT 0 /* MICB2_DISCH */
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#define WM8958_MICB2_DISCH_WIDTH 1 /* MICB2_DISCH */
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|
||||
/*
|
||||
* R210 (0xD2) - Mic Detect 3
|
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*/
|
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#define WM8958_MICD_LVL_MASK 0x07FC /* MICD_LVL - [10:2] */
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#define WM8958_MICD_LVL_SHIFT 2 /* MICD_LVL - [10:2] */
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#define WM8958_MICD_LVL_WIDTH 9 /* MICD_LVL - [10:2] */
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#define WM8958_MICD_VALID 0x0002 /* MICD_VALID */
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#define WM8958_MICD_VALID_MASK 0x0002 /* MICD_VALID */
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#define WM8958_MICD_VALID_SHIFT 1 /* MICD_VALID */
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#define WM8958_MICD_VALID_WIDTH 1 /* MICD_VALID */
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#define WM8958_MICD_STS 0x0001 /* MICD_STS */
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#define WM8958_MICD_STS_MASK 0x0001 /* MICD_STS */
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#define WM8958_MICD_STS_SHIFT 0 /* MICD_STS */
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#define WM8958_MICD_STS_WIDTH 1 /* MICD_STS */
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|
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/*
|
||||
* R76 (0x4C) - Charge Pump (1)
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||||
*/
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|
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|
|
@ -86,24 +86,39 @@ struct nand_bbt_descr {
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#define NAND_BBT_VERSION 0x00000100
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||||
/* Create a bbt if none exists */
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#define NAND_BBT_CREATE 0x00000200
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/*
|
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* Create an empty BBT with no vendor information. Vendor's information may be
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||||
* unavailable, for example, if the NAND controller has a different data and OOB
|
||||
* layout or if this information is already purged. Must be used in conjunction
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* with NAND_BBT_CREATE.
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*/
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#define NAND_BBT_CREATE_EMPTY 0x00000400
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||||
/* Search good / bad pattern through all pages of a block */
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#define NAND_BBT_SCANALLPAGES 0x00000400
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#define NAND_BBT_SCANALLPAGES 0x00000800
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/* Scan block empty during good / bad block scan */
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#define NAND_BBT_SCANEMPTY 0x00000800
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#define NAND_BBT_SCANEMPTY 0x00001000
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/* Write bbt if neccecary */
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#define NAND_BBT_WRITE 0x00001000
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#define NAND_BBT_WRITE 0x00002000
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/* Read and write back block contents when writing bbt */
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#define NAND_BBT_SAVECONTENT 0x00002000
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#define NAND_BBT_SAVECONTENT 0x00004000
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/* Search good / bad pattern on the first and the second page */
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#define NAND_BBT_SCAN2NDPAGE 0x00004000
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#define NAND_BBT_SCAN2NDPAGE 0x00008000
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/* Search good / bad pattern on the last page of the eraseblock */
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#define NAND_BBT_SCANLASTPAGE 0x00008000
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/* Chip stores bad block marker on BOTH 1st and 6th bytes of OOB */
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#define NAND_BBT_SCANBYTE1AND6 0x00100000
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/* The nand_bbt_descr was created dynamicaly and must be freed */
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#define NAND_BBT_DYNAMICSTRUCT 0x00200000
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/* The bad block table does not OOB for marker */
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#define NAND_BBT_NO_OOB 0x00400000
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#define NAND_BBT_SCANLASTPAGE 0x00010000
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/*
|
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* Use a flash based bad block table. By default, OOB identifier is saved in
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* OOB area. This option is passed to the default bad block table function.
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*/
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#define NAND_BBT_USE_FLASH 0x00020000
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/* Do not store flash based bad block table in OOB area; store it in-band */
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#define NAND_BBT_NO_OOB 0x00040000
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/*
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* Flag set by nand_create_default_bbt_descr(), marking that the nand_bbt_descr
|
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* was allocated dynamicaly and must be freed in nand_release(). Has no meaning
|
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* in nand_chip.bbt_options.
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*/
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#define NAND_BBT_DYNAMICSTRUCT 0x80000000
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/* The maximum number of blocks to scan for a bbt */
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#define NAND_BBT_SCAN_MAXBLOCKS 4
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|
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|
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@ -32,17 +32,19 @@
|
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#define MTD_CHAR_MAJOR 90
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#define MTD_BLOCK_MAJOR 31
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#define MTD_ERASE_PENDING 0x01
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#define MTD_ERASE_PENDING 0x01
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#define MTD_ERASING 0x02
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#define MTD_ERASE_SUSPEND 0x04
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#define MTD_ERASE_DONE 0x08
|
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#define MTD_ERASE_FAILED 0x10
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#define MTD_ERASE_DONE 0x08
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#define MTD_ERASE_FAILED 0x10
|
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|
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#define MTD_FAIL_ADDR_UNKNOWN -1LL
|
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|
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/* If the erase fails, fail_addr might indicate exactly which block failed. If
|
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fail_addr = MTD_FAIL_ADDR_UNKNOWN, the failure was not at the device level or was not
|
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specific to any particular block. */
|
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/*
|
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* If the erase fails, fail_addr might indicate exactly which block failed. If
|
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* fail_addr = MTD_FAIL_ADDR_UNKNOWN, the failure was not at the device level
|
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* or was not specific to any particular block.
|
||||
*/
|
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struct erase_info {
|
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struct mtd_info *mtd;
|
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uint64_t addr;
|
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|
|
@ -59,26 +61,12 @@ struct erase_info {
|
|||
};
|
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|
||||
struct mtd_erase_region_info {
|
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uint64_t offset; /* At which this region starts, from the beginning of the MTD */
|
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uint64_t offset; /* At which this region starts, from the beginning of the MTD */
|
||||
uint32_t erasesize; /* For this region */
|
||||
uint32_t numblocks; /* Number of blocks of erasesize in this region */
|
||||
unsigned long *lockmap; /* If keeping bitmap of locks */
|
||||
};
|
||||
|
||||
/*
|
||||
* oob operation modes
|
||||
*
|
||||
* MTD_OOB_PLACE: oob data are placed at the given offset
|
||||
* MTD_OOB_AUTO: oob data are automatically placed at the free areas
|
||||
* which are defined by the ecclayout
|
||||
* MTD_OOB_RAW: mode to read oob and data without doing ECC checking
|
||||
*/
|
||||
typedef enum {
|
||||
MTD_OOB_PLACE,
|
||||
MTD_OOB_AUTO,
|
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MTD_OOB_RAW,
|
||||
} mtd_oob_mode_t;
|
||||
|
||||
/**
|
||||
* struct mtd_oob_ops - oob operation operands
|
||||
* @mode: operation mode
|
||||
|
|
@ -90,7 +78,7 @@ typedef enum {
|
|||
* @ooblen: number of oob bytes to write/read
|
||||
* @oobretlen: number of oob bytes written/read
|
||||
* @ooboffs: offset of oob data in the oob area (only relevant when
|
||||
* mode = MTD_OOB_PLACE)
|
||||
* mode = MTD_OPS_PLACE_OOB or MTD_OPS_RAW)
|
||||
* @datbuf: data buffer - if NULL only oob data are read/written
|
||||
* @oobbuf: oob data buffer
|
||||
*
|
||||
|
|
@ -99,7 +87,7 @@ typedef enum {
|
|||
* OOB area.
|
||||
*/
|
||||
struct mtd_oob_ops {
|
||||
mtd_oob_mode_t mode;
|
||||
unsigned int mode;
|
||||
size_t len;
|
||||
size_t retlen;
|
||||
size_t ooblen;
|
||||
|
|
@ -173,7 +161,7 @@ struct mtd_info {
|
|||
const char *name;
|
||||
int index;
|
||||
|
||||
/* ecc layout structure pointer - read only ! */
|
||||
/* ECC layout structure pointer - read only! */
|
||||
struct nand_ecclayout *ecclayout;
|
||||
|
||||
/* Data for variable erase regions. If numeraseregions is zero,
|
||||
|
|
@ -324,10 +312,15 @@ static inline uint32_t mtd_mod_by_ws(uint64_t sz, struct mtd_info *mtd)
|
|||
/* Kernel-side ioctl definitions */
|
||||
|
||||
struct mtd_partition;
|
||||
struct mtd_part_parser_data;
|
||||
|
||||
extern int mtd_device_register(struct mtd_info *master,
|
||||
const struct mtd_partition *parts,
|
||||
int nr_parts);
|
||||
extern int mtd_device_parse_register(struct mtd_info *mtd,
|
||||
const char **part_probe_types,
|
||||
struct mtd_part_parser_data *parser_data,
|
||||
const struct mtd_partition *defparts,
|
||||
int defnr_parts);
|
||||
#define mtd_device_register(master, parts, nr_parts) \
|
||||
mtd_device_parse_register(master, NULL, NULL, parts, nr_parts)
|
||||
extern int mtd_device_unregister(struct mtd_info *master);
|
||||
extern struct mtd_info *get_mtd_device(struct mtd_info *mtd, int num);
|
||||
extern int __get_mtd_device(struct mtd_info *mtd);
|
||||
|
|
@ -356,27 +349,16 @@ void *mtd_kmalloc_up_to(const struct mtd_info *mtd, size_t *size);
|
|||
|
||||
void mtd_erase_callback(struct erase_info *instr);
|
||||
|
||||
/*
|
||||
* Debugging macro and defines
|
||||
*/
|
||||
#define MTD_DEBUG_LEVEL0 (0) /* Quiet */
|
||||
#define MTD_DEBUG_LEVEL1 (1) /* Audible */
|
||||
#define MTD_DEBUG_LEVEL2 (2) /* Loud */
|
||||
#define MTD_DEBUG_LEVEL3 (3) /* Noisy */
|
||||
static inline int mtd_is_bitflip(int err) {
|
||||
return err == -EUCLEAN;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MTD_DEBUG
|
||||
#define DEBUG(n, args...) \
|
||||
do { \
|
||||
if (n <= CONFIG_MTD_DEBUG_VERBOSE) \
|
||||
printk(KERN_INFO args); \
|
||||
} while(0)
|
||||
#else /* CONFIG_MTD_DEBUG */
|
||||
#define DEBUG(n, args...) \
|
||||
do { \
|
||||
if (0) \
|
||||
printk(KERN_INFO args); \
|
||||
} while(0)
|
||||
static inline int mtd_is_eccerr(int err) {
|
||||
return err == -EBADMSG;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_MTD_DEBUG */
|
||||
static inline int mtd_is_bitflip_or_eccerr(int err) {
|
||||
return mtd_is_bitflip(err) || mtd_is_eccerr(err);
|
||||
}
|
||||
|
||||
#endif /* __MTD_MTD_H__ */
|
||||
|
|
|
|||
|
|
@ -42,10 +42,10 @@ extern void nand_release(struct mtd_info *mtd);
|
|||
/* Internal helper for board drivers which need to override command function */
|
||||
extern void nand_wait_ready(struct mtd_info *mtd);
|
||||
|
||||
/* locks all blockes present in the device */
|
||||
/* locks all blocks present in the device */
|
||||
extern int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
|
||||
|
||||
/* unlocks specified locked blockes */
|
||||
/* unlocks specified locked blocks */
|
||||
extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
|
||||
|
||||
/* The maximum number of NAND chips in an array */
|
||||
|
|
@ -150,7 +150,7 @@ typedef enum {
|
|||
#define NAND_ECC_READ 0
|
||||
/* Reset Hardware ECC for write */
|
||||
#define NAND_ECC_WRITE 1
|
||||
/* Enable Hardware ECC before syndrom is read back from flash */
|
||||
/* Enable Hardware ECC before syndrome is read back from flash */
|
||||
#define NAND_ECC_READSYN 2
|
||||
|
||||
/* Bit mask for flags passed to do_nand_read_ecc */
|
||||
|
|
@ -163,7 +163,7 @@ typedef enum {
|
|||
*/
|
||||
/* Chip can not auto increment pages */
|
||||
#define NAND_NO_AUTOINCR 0x00000001
|
||||
/* Buswitdh is 16 bit */
|
||||
/* Buswidth is 16 bit */
|
||||
#define NAND_BUSWIDTH_16 0x00000002
|
||||
/* Device supports partial programming without padding */
|
||||
#define NAND_NO_PADDING 0x00000004
|
||||
|
|
@ -219,27 +219,15 @@ typedef enum {
|
|||
#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR)
|
||||
|
||||
/* Non chip related options */
|
||||
/*
|
||||
* Use a flash based bad block table. OOB identifier is saved in OOB area.
|
||||
* This option is passed to the default bad block table function.
|
||||
*/
|
||||
#define NAND_USE_FLASH_BBT 0x00010000
|
||||
/* This option skips the bbt scan during initialization. */
|
||||
#define NAND_SKIP_BBTSCAN 0x00020000
|
||||
#define NAND_SKIP_BBTSCAN 0x00010000
|
||||
/*
|
||||
* This option is defined if the board driver allocates its own buffers
|
||||
* (e.g. because it needs them DMA-coherent).
|
||||
*/
|
||||
#define NAND_OWN_BUFFERS 0x00040000
|
||||
#define NAND_OWN_BUFFERS 0x00020000
|
||||
/* Chip may not exist, so silence any errors in scan */
|
||||
#define NAND_SCAN_SILENT_NODEV 0x00080000
|
||||
/*
|
||||
* If passed additionally to NAND_USE_FLASH_BBT then BBT code will not touch
|
||||
* the OOB area.
|
||||
*/
|
||||
#define NAND_USE_FLASH_BBT_NO_OOB 0x00800000
|
||||
/* Create an empty BBT with no vendor information if the BBT is available */
|
||||
#define NAND_CREATE_EMPTY_BBT 0x01000000
|
||||
#define NAND_SCAN_SILENT_NODEV 0x00040000
|
||||
|
||||
/* Options set by nand scan */
|
||||
/* Nand scan has allocated controller struct */
|
||||
|
|
@ -331,27 +319,29 @@ struct nand_hw_control {
|
|||
};
|
||||
|
||||
/**
|
||||
* struct nand_ecc_ctrl - Control structure for ecc
|
||||
* @mode: ecc mode
|
||||
* @steps: number of ecc steps per page
|
||||
* @size: data bytes per ecc step
|
||||
* @bytes: ecc bytes per step
|
||||
* @total: total number of ecc bytes per page
|
||||
* @prepad: padding information for syndrome based ecc generators
|
||||
* @postpad: padding information for syndrome based ecc generators
|
||||
* struct nand_ecc_ctrl - Control structure for ECC
|
||||
* @mode: ECC mode
|
||||
* @steps: number of ECC steps per page
|
||||
* @size: data bytes per ECC step
|
||||
* @bytes: ECC bytes per step
|
||||
* @total: total number of ECC bytes per page
|
||||
* @prepad: padding information for syndrome based ECC generators
|
||||
* @postpad: padding information for syndrome based ECC generators
|
||||
* @layout: ECC layout control struct pointer
|
||||
* @priv: pointer to private ecc control data
|
||||
* @hwctl: function to control hardware ecc generator. Must only
|
||||
* @priv: pointer to private ECC control data
|
||||
* @hwctl: function to control hardware ECC generator. Must only
|
||||
* be provided if an hardware ECC is available
|
||||
* @calculate: function for ecc calculation or readback from ecc hardware
|
||||
* @correct: function for ecc correction, matching to ecc generator (sw/hw)
|
||||
* @calculate: function for ECC calculation or readback from ECC hardware
|
||||
* @correct: function for ECC correction, matching to ECC generator (sw/hw)
|
||||
* @read_page_raw: function to read a raw page without ECC
|
||||
* @write_page_raw: function to write a raw page without ECC
|
||||
* @read_page: function to read a page according to the ecc generator
|
||||
* @read_page: function to read a page according to the ECC generator
|
||||
* requirements.
|
||||
* @read_subpage: function to read parts of the page covered by ECC.
|
||||
* @write_page: function to write a page according to the ecc generator
|
||||
* @write_page: function to write a page according to the ECC generator
|
||||
* requirements.
|
||||
* @write_oob_raw: function to write chip OOB data without ECC
|
||||
* @read_oob_raw: function to read chip OOB data without ECC
|
||||
* @read_oob: function to read chip OOB data
|
||||
* @write_oob: function to write chip OOB data
|
||||
*/
|
||||
|
|
@ -380,6 +370,10 @@ struct nand_ecc_ctrl {
|
|||
uint32_t offs, uint32_t len, uint8_t *buf);
|
||||
void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
|
||||
const uint8_t *buf);
|
||||
int (*write_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip,
|
||||
int page);
|
||||
int (*read_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip,
|
||||
int page, int sndcmd);
|
||||
int (*read_oob)(struct mtd_info *mtd, struct nand_chip *chip, int page,
|
||||
int sndcmd);
|
||||
int (*write_oob)(struct mtd_info *mtd, struct nand_chip *chip,
|
||||
|
|
@ -388,8 +382,8 @@ struct nand_ecc_ctrl {
|
|||
|
||||
/**
|
||||
* struct nand_buffers - buffer structure for read/write
|
||||
* @ecccalc: buffer for calculated ecc
|
||||
* @ecccode: buffer for ecc read from flash
|
||||
* @ecccalc: buffer for calculated ECC
|
||||
* @ecccode: buffer for ECC read from flash
|
||||
* @databuf: buffer for data - dynamically sized
|
||||
*
|
||||
* Do not change the order of buffers. databuf and oobrbuf must be in
|
||||
|
|
@ -422,7 +416,7 @@ struct nand_buffers {
|
|||
* mtd->oobsize, mtd->writesize and so on.
|
||||
* @id_data contains the 8 bytes values of NAND_CMD_READID.
|
||||
* Return with the bus width.
|
||||
* @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing
|
||||
* @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accessing
|
||||
* device ready/busy line. If set to NULL no access to
|
||||
* ready/busy is available and the ready/busy information
|
||||
* is read from the chip status register.
|
||||
|
|
@ -430,17 +424,17 @@ struct nand_buffers {
|
|||
* commands to the chip.
|
||||
* @waitfunc: [REPLACEABLE] hardwarespecific function for wait on
|
||||
* ready.
|
||||
* @ecc: [BOARDSPECIFIC] ecc control ctructure
|
||||
* @ecc: [BOARDSPECIFIC] ECC control structure
|
||||
* @buffers: buffer structure for read/write
|
||||
* @hwcontrol: platform-specific hardware control structure
|
||||
* @ops: oob operation operands
|
||||
* @erase_cmd: [INTERN] erase command write function, selectable due
|
||||
* to AND support.
|
||||
* @scan_bbt: [REPLACEABLE] function to scan bad block table
|
||||
* @chip_delay: [BOARDSPECIFIC] chip dependent delay for transferring
|
||||
* data from array to read regs (tR).
|
||||
* @state: [INTERN] the current state of the NAND device
|
||||
* @oob_poi: poison value buffer
|
||||
* @oob_poi: "poison value buffer," used for laying out OOB data
|
||||
* before writing
|
||||
* @page_shift: [INTERN] number of address bits in a page (column
|
||||
* address bits).
|
||||
* @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock
|
||||
|
|
@ -449,6 +443,9 @@ struct nand_buffers {
|
|||
* @options: [BOARDSPECIFIC] various chip options. They can partly
|
||||
* be set to inform nand_scan about special functionality.
|
||||
* See the defines for further explanation.
|
||||
* @bbt_options: [INTERN] bad block specific options. All options used
|
||||
* here must come from bbm.h. By default, these options
|
||||
* will be copied to the appropriate nand_bbt_descr's.
|
||||
* @badblockpos: [INTERN] position of the bad block marker in the oob
|
||||
* area.
|
||||
* @badblockbits: [INTERN] number of bits to left-shift the bad block
|
||||
|
|
@ -464,7 +461,7 @@ struct nand_buffers {
|
|||
* non 0 if ONFI supported.
|
||||
* @onfi_params: [INTERN] holds the ONFI page parameter when ONFI is
|
||||
* supported, 0 otherwise.
|
||||
* @ecclayout: [REPLACEABLE] the default ecc placement scheme
|
||||
* @ecclayout: [REPLACEABLE] the default ECC placement scheme
|
||||
* @bbt: [INTERN] bad block table pointer
|
||||
* @bbt_td: [REPLACEABLE] bad block table descriptor for flash
|
||||
* lookup.
|
||||
|
|
@ -472,9 +469,9 @@ struct nand_buffers {
|
|||
* @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial
|
||||
* bad block scan.
|
||||
* @controller: [REPLACEABLE] a pointer to a hardware controller
|
||||
* structure which is shared among multiple independend
|
||||
* structure which is shared among multiple independent
|
||||
* devices.
|
||||
* @priv: [OPTIONAL] pointer to private chip date
|
||||
* @priv: [OPTIONAL] pointer to private chip data
|
||||
* @errstat: [OPTIONAL] hardware specific function to perform
|
||||
* additional error status checks (determine if errors are
|
||||
* correctable).
|
||||
|
|
@ -509,6 +506,7 @@ struct nand_chip {
|
|||
|
||||
int chip_delay;
|
||||
unsigned int options;
|
||||
unsigned int bbt_options;
|
||||
|
||||
int page_shift;
|
||||
int phys_erase_shift;
|
||||
|
|
@ -536,8 +534,6 @@ struct nand_chip {
|
|||
struct nand_buffers *buffers;
|
||||
struct nand_hw_control hwcontrol;
|
||||
|
||||
struct mtd_oob_ops ops;
|
||||
|
||||
uint8_t *bbt;
|
||||
struct nand_bbt_descr *bbt_td;
|
||||
struct nand_bbt_descr *bbt_md;
|
||||
|
|
@ -611,10 +607,9 @@ extern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len,
|
|||
* @partitions: mtd partition list
|
||||
* @chip_delay: R/B delay value in us
|
||||
* @options: Option flags, e.g. 16bit buswidth
|
||||
* @ecclayout: ecc layout info structure
|
||||
* @bbt_options: BBT option flags, e.g. NAND_BBT_USE_FLASH
|
||||
* @ecclayout: ECC layout info structure
|
||||
* @part_probe_types: NULL-terminated array of probe types
|
||||
* @set_parts: platform specific function to set partitions
|
||||
* @priv: hardware controller specific settings
|
||||
*/
|
||||
struct platform_nand_chip {
|
||||
int nr_chips;
|
||||
|
|
@ -624,9 +619,8 @@ struct platform_nand_chip {
|
|||
struct nand_ecclayout *ecclayout;
|
||||
int chip_delay;
|
||||
unsigned int options;
|
||||
unsigned int bbt_options;
|
||||
const char **part_probe_types;
|
||||
void (*set_parts)(uint64_t size, struct platform_nand_chip *chip);
|
||||
void *priv;
|
||||
};
|
||||
|
||||
/* Keep gcc happy */
|
||||
|
|
|
|||
|
|
@ -184,6 +184,9 @@ struct onenand_chip {
|
|||
#define ONENAND_IS_CACHE_PROGRAM(this) \
|
||||
(this->options & ONENAND_HAS_CACHE_PROGRAM)
|
||||
|
||||
#define ONENAND_IS_NOP_1(this) \
|
||||
(this->options & ONENAND_HAS_NOP_1)
|
||||
|
||||
/* Check byte access in OneNAND */
|
||||
#define ONENAND_CHECK_BYTE_ACCESS(addr) (addr & 0x1)
|
||||
|
||||
|
|
@ -195,6 +198,7 @@ struct onenand_chip {
|
|||
#define ONENAND_HAS_2PLANE (0x0004)
|
||||
#define ONENAND_HAS_4KB_PAGE (0x0008)
|
||||
#define ONENAND_HAS_CACHE_PROGRAM (0x0010)
|
||||
#define ONENAND_HAS_NOP_1 (0x0020)
|
||||
#define ONENAND_SKIP_UNLOCK_CHECK (0x0100)
|
||||
#define ONENAND_PAGEBUF_ALLOC (0x1000)
|
||||
#define ONENAND_OOBBUF_ALLOC (0x2000)
|
||||
|
|
|
|||
|
|
@ -24,7 +24,9 @@
|
|||
* will extend to the end of the master MTD device.
|
||||
* offset: absolute starting position within the master MTD device; if
|
||||
* defined as MTDPART_OFS_APPEND, the partition will start where the
|
||||
* previous one ended; if MTDPART_OFS_NXTBLK, at the next erase block.
|
||||
* previous one ended; if MTDPART_OFS_NXTBLK, at the next erase block;
|
||||
* if MTDPART_OFS_RETAIN, consume as much as possible, leaving size
|
||||
* after the end of partition.
|
||||
* mask_flags: contains flags that have to be masked (removed) from the
|
||||
* master MTD flag set for the corresponding MTD partition.
|
||||
* For example, to force a read-only partition, simply adding
|
||||
|
|
@ -42,12 +44,25 @@ struct mtd_partition {
|
|||
struct nand_ecclayout *ecclayout; /* out of band layout for this partition (NAND only) */
|
||||
};
|
||||
|
||||
#define MTDPART_OFS_RETAIN (-3)
|
||||
#define MTDPART_OFS_NXTBLK (-2)
|
||||
#define MTDPART_OFS_APPEND (-1)
|
||||
#define MTDPART_SIZ_FULL (0)
|
||||
|
||||
|
||||
struct mtd_info;
|
||||
struct device_node;
|
||||
|
||||
/**
|
||||
* struct mtd_part_parser_data - used to pass data to MTD partition parsers.
|
||||
* @origin: for RedBoot, start address of MTD device
|
||||
* @of_node: for OF parsers, device node containing partitioning information
|
||||
*/
|
||||
struct mtd_part_parser_data {
|
||||
unsigned long origin;
|
||||
struct device_node *of_node;
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
* Functions dealing with the various ways of partitioning the space
|
||||
|
|
@ -57,37 +72,12 @@ struct mtd_part_parser {
|
|||
struct list_head list;
|
||||
struct module *owner;
|
||||
const char *name;
|
||||
int (*parse_fn)(struct mtd_info *, struct mtd_partition **, unsigned long);
|
||||
int (*parse_fn)(struct mtd_info *, struct mtd_partition **,
|
||||
struct mtd_part_parser_data *);
|
||||
};
|
||||
|
||||
extern int register_mtd_parser(struct mtd_part_parser *parser);
|
||||
extern int deregister_mtd_parser(struct mtd_part_parser *parser);
|
||||
extern int parse_mtd_partitions(struct mtd_info *master, const char **types,
|
||||
struct mtd_partition **pparts, unsigned long origin);
|
||||
|
||||
#define put_partition_parser(p) do { module_put((p)->owner); } while(0)
|
||||
|
||||
struct device;
|
||||
struct device_node;
|
||||
|
||||
#ifdef CONFIG_MTD_OF_PARTS
|
||||
int __devinit of_mtd_parse_partitions(struct device *dev,
|
||||
struct device_node *node,
|
||||
struct mtd_partition **pparts);
|
||||
#else
|
||||
static inline int of_mtd_parse_partitions(struct device *dev,
|
||||
struct device_node *node,
|
||||
struct mtd_partition **pparts)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MTD_CMDLINE_PARTS
|
||||
static inline int mtd_has_cmdlinepart(void) { return 1; }
|
||||
#else
|
||||
static inline int mtd_has_cmdlinepart(void) { return 0; }
|
||||
#endif
|
||||
|
||||
int mtd_is_partition(struct mtd_info *mtd);
|
||||
int mtd_add_partition(struct mtd_info *master, char *name,
|
||||
|
|
|
|||
|
|
@ -32,21 +32,4 @@ struct physmap_flash_data {
|
|||
struct mtd_partition *parts;
|
||||
};
|
||||
|
||||
/*
|
||||
* Board needs to specify the exact mapping during their setup time.
|
||||
*/
|
||||
void physmap_configure(unsigned long addr, unsigned long size,
|
||||
int bankwidth, void (*set_vpp)(struct map_info *, int) );
|
||||
|
||||
/*
|
||||
* Machines that wish to do flash partition may want to call this function in
|
||||
* their setup routine.
|
||||
*
|
||||
* physmap_set_partitions(mypartitions, num_parts);
|
||||
*
|
||||
* Note that one can always override this hard-coded partition with
|
||||
* command line partition (you need to enable CONFIG_MTD_CMDLINE_PARTS).
|
||||
*/
|
||||
void physmap_set_partitions(struct mtd_partition *parts, int num_parts);
|
||||
|
||||
#endif /* __LINUX_MTD_PHYSMAP__ */
|
||||
|
|
|
|||
|
|
@ -2405,6 +2405,8 @@
|
|||
|
||||
#define PCI_VENDOR_ID_AZWAVE 0x1a3b
|
||||
|
||||
#define PCI_VENDOR_ID_ASMEDIA 0x1b21
|
||||
|
||||
#define PCI_VENDOR_ID_TEKRAM 0x1de1
|
||||
#define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29
|
||||
|
||||
|
|
|
|||
|
|
@ -121,6 +121,7 @@ extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev);
|
|||
extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev);
|
||||
#else
|
||||
|
||||
struct pinctrl_dev;
|
||||
|
||||
/* Sufficiently stupid default function when pinctrl is not in use */
|
||||
static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
|
||||
|
|
|
|||
17
include/linux/platform_data/macb.h
Normal file
17
include/linux/platform_data/macb.h
Normal file
|
|
@ -0,0 +1,17 @@
|
|||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef __MACB_PDATA_H__
|
||||
#define __MACB_PDATA_H__
|
||||
|
||||
struct macb_platform_data {
|
||||
u32 phy_mask;
|
||||
u8 phy_irq_pin; /* PHY IRQ */
|
||||
u8 is_rmii; /* using RMII interface? */
|
||||
};
|
||||
|
||||
#endif /* __MACB_PDATA_H__ */
|
||||
|
|
@ -67,6 +67,7 @@ enum {
|
|||
SCIx_IRDA_REGTYPE,
|
||||
SCIx_SCIFA_REGTYPE,
|
||||
SCIx_SCIFB_REGTYPE,
|
||||
SCIx_SH2_SCIF_FIFODATA_REGTYPE,
|
||||
SCIx_SH3_SCIF_REGTYPE,
|
||||
SCIx_SH4_SCIF_REGTYPE,
|
||||
SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
|
||||
|
|
|
|||
|
|
@ -52,7 +52,6 @@ struct clk {
|
|||
|
||||
unsigned long arch_flags;
|
||||
void *priv;
|
||||
struct dentry *dentry;
|
||||
struct clk_mapping *mapping;
|
||||
struct cpufreq_frequency_table *freq_table;
|
||||
unsigned int nr_freqs;
|
||||
|
|
@ -94,6 +93,9 @@ int clk_rate_table_find(struct clk *clk,
|
|||
long clk_rate_div_range_round(struct clk *clk, unsigned int div_min,
|
||||
unsigned int div_max, unsigned long rate);
|
||||
|
||||
long clk_rate_mult_range_round(struct clk *clk, unsigned int mult_min,
|
||||
unsigned int mult_max, unsigned long rate);
|
||||
|
||||
long clk_round_parent(struct clk *clk, unsigned long target,
|
||||
unsigned long *best_freq, unsigned long *parent_freq,
|
||||
unsigned int div_min, unsigned int div_max);
|
||||
|
|
|
|||
|
|
@ -104,4 +104,80 @@ struct pinmux_info {
|
|||
int register_pinmux(struct pinmux_info *pip);
|
||||
int unregister_pinmux(struct pinmux_info *pip);
|
||||
|
||||
/* helper macro for port */
|
||||
#define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
|
||||
|
||||
#define PORT_10(fn, pfx, sfx) \
|
||||
PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
|
||||
PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
|
||||
PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
|
||||
PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
|
||||
PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
|
||||
|
||||
#define PORT_90(fn, pfx, sfx) \
|
||||
PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \
|
||||
PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \
|
||||
PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \
|
||||
PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \
|
||||
PORT_10(fn, pfx##9, sfx)
|
||||
|
||||
#define _PORT_ALL(pfx, sfx) pfx##_##sfx
|
||||
#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
|
||||
#define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str)
|
||||
#define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
|
||||
#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
|
||||
|
||||
/* helper macro for pinmux_enum_t */
|
||||
#define PORT_DATA_I(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
|
||||
|
||||
#define PORT_DATA_I_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD)
|
||||
|
||||
#define PORT_DATA_I_PU(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PU)
|
||||
|
||||
#define PORT_DATA_I_PU_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
|
||||
|
||||
#define PORT_DATA_O(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
|
||||
|
||||
#define PORT_DATA_IO(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
|
||||
PORT##nr##_IN)
|
||||
|
||||
#define PORT_DATA_IO_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD)
|
||||
|
||||
#define PORT_DATA_IO_PU(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PU)
|
||||
|
||||
#define PORT_DATA_IO_PU_PD(nr) \
|
||||
PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
|
||||
PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
|
||||
|
||||
/* helper macro for top 4 bits in PORTnCR */
|
||||
#define _PCRH(in, in_pd, in_pu, out) \
|
||||
0, (out), (in), 0, \
|
||||
0, 0, 0, 0, \
|
||||
0, 0, (in_pd), 0, \
|
||||
0, 0, (in_pu), 0
|
||||
|
||||
#define PORTCR(nr, reg) \
|
||||
{ \
|
||||
PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
|
||||
_PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
|
||||
PORT##nr##_IN_PU, PORT##nr##_OUT), \
|
||||
PORT##nr##_FN0, PORT##nr##_FN1, \
|
||||
PORT##nr##_FN2, PORT##nr##_FN3, \
|
||||
PORT##nr##_FN4, PORT##nr##_FN5, \
|
||||
PORT##nr##_FN6, PORT##nr##_FN7 } \
|
||||
}
|
||||
|
||||
#endif /* __SH_PFC_H */
|
||||
|
|
|
|||
Loading…
Reference in a new issue