Merge "ARM: dts: msm: Add ACD control register values for Shima GPU"

This commit is contained in:
qctecmdr 2021-01-12 08:24:51 -08:00 • committed by Gerrit - the friendly Code Review server
commit 58d42ada0c

View file

@ -157,6 +157,8 @@
qcom,bus-freq-ddr8 = <11>;
qcom,bus-min-ddr8 = <10>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0xa8295ffd>;
};
qcom,gpu-pwrlevel@1 {
@ -171,6 +173,8 @@
qcom,bus-freq-ddr8 = <10>;
qcom,bus-min-ddr8 = <9>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0x882a5ffd>;
};
qcom,gpu-pwrlevel@2 {
@ -185,6 +189,8 @@
qcom,bus-freq-ddr8 = <9>;
qcom,bus-min-ddr8 = <8>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0x882a5ffd>;
};
qcom,gpu-pwrlevel@3 {
@ -199,6 +205,8 @@
qcom,bus-freq-ddr8 = <8>;
qcom,bus-min-ddr8 = <7>;
qcom,bus-max-ddr8 = <10>;
qcom,acd-level = <0x882b5ffd>;
};
qcom,gpu-pwrlevel@4 {
@ -213,6 +221,8 @@
qcom,bus-freq-ddr8 = <7>;
qcom,bus-min-ddr8 = <6>;
qcom,bus-max-ddr8 = <10>;
qcom,acd-level = <0x882b5ffd>;
};
qcom,gpu-pwrlevel@5 {
@ -227,6 +237,8 @@
qcom,bus-freq-ddr8 = <7>;
qcom,bus-min-ddr8 = <6>;
qcom,bus-max-ddr8 = <9>;
qcom,acd-level = <0x882b5ffd>;
};
qcom,gpu-pwrlevel@6 {
@ -241,6 +253,8 @@
qcom,bus-freq-ddr8 = <6>;
qcom,bus-min-ddr8 = <5>;
qcom,bus-max-ddr8 = <9>;
qcom,acd-level = <0x882f5ffd>;
};
qcom,gpu-pwrlevel@7 {
@ -255,6 +269,8 @@
qcom,bus-freq-ddr8 = <3>;
qcom,bus-min-ddr8 = <2>;
qcom,bus-max-ddr8 = <8>;
qcom,acd-level = <0x882f5ffd>;
};
};
@ -277,6 +293,8 @@
qcom,bus-freq-ddr8 = <11>;
qcom,bus-min-ddr8 = <9>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0x882b5ffd>;
};
qcom,gpu-pwrlevel@1 {
@ -291,6 +309,8 @@
qcom,bus-freq-ddr8 = <7>;
qcom,bus-min-ddr8 = <6>;
qcom,bus-max-ddr8 = <9>;
qcom,acd-level = <0x882b5ffd>;
};
qcom,gpu-pwrlevel@2 {
@ -305,6 +325,8 @@
qcom,bus-freq-ddr8 = <6>;
qcom,bus-min-ddr8 = <5>;
qcom,bus-max-ddr8 = <9>;
qcom,acd-level = <0x882f5ffd>;
};
qcom,gpu-pwrlevel@3 {
@ -319,6 +341,8 @@
qcom,bus-freq-ddr8 = <3>;
qcom,bus-min-ddr8 = <2>;
qcom,bus-max-ddr8 = <8>;
qcom,acd-level = <0x882f5ffd>;
};
};
@ -341,6 +365,8 @@
qcom,bus-freq-ddr8 = <9>;
qcom,bus-min-ddr8 = <7>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0x882f5ffd>;
};
qcom,gpu-pwrlevel@1 {
@ -355,6 +381,8 @@
qcom,bus-freq-ddr8 = <3>;
qcom,bus-min-ddr8 = <2>;
qcom,bus-max-ddr8 = <8>;
qcom,acd-level = <0x882f5ffd>;
};
};
@ -377,6 +405,8 @@
qcom,bus-freq-ddr8 = <11>;
qcom,bus-min-ddr8 = <10>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0xa8295ffd>;
};
qcom,gpu-pwrlevel@1 {
@ -391,6 +421,8 @@
qcom,bus-freq-ddr8 = <10>;
qcom,bus-min-ddr8 = <9>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0x882a5ffd>;
};
qcom,gpu-pwrlevel@2 {
@ -405,6 +437,8 @@
qcom,bus-freq-ddr8 = <9>;
qcom,bus-min-ddr8 = <8>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0x882a5ffd>;
};
qcom,gpu-pwrlevel@3 {
@ -419,6 +453,8 @@
qcom,bus-freq-ddr8 = <8>;
qcom,bus-min-ddr8 = <7>;
qcom,bus-max-ddr8 = <10>;
qcom,acd-level = <0x882b5ffd>;
};
qcom,gpu-pwrlevel@4 {
@ -433,6 +469,8 @@
qcom,bus-freq-ddr8 = <7>;
qcom,bus-min-ddr8 = <6>;
qcom,bus-max-ddr8 = <10>;
qcom,acd-level = <0x882b5ffd>;
};
qcom,gpu-pwrlevel@5 {
@ -447,6 +485,8 @@
qcom,bus-freq-ddr8 = <7>;
qcom,bus-min-ddr8 = <6>;
qcom,bus-max-ddr8 = <9>;
qcom,acd-level = <0x882b5ffd>;
};
qcom,gpu-pwrlevel@6 {
@ -461,6 +501,8 @@
qcom,bus-freq-ddr8 = <6>;
qcom,bus-min-ddr8 = <5>;
qcom,bus-max-ddr8 = <9>;
qcom,acd-level = <0x882f5ffd>;
};
qcom,gpu-pwrlevel@7 {
@ -475,6 +517,8 @@
qcom,bus-freq-ddr8 = <3>;
qcom,bus-min-ddr8 = <2>;
qcom,bus-max-ddr8 = <8>;
qcom,acd-level = <0x882f5ffd>;
};
};
};