mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-11-08 11:45:53 -05:00
SoC changes for omaps for v4.12 merge window:
- Drop PM_SUSPEND_STANDBY - Clean up hwmod code in preparation to eventually dynamically allocating hwmod data based on device tree data - Implement hwmod workaround for dra7 DCAN1 and OTG module to prevent clockdomain from entering HW_AUTO - Configure clockdomain and hwmod for dm81xx SATA - Mark omap_init_rng as __init -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlja0g8RHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXMB+A//VmbKMoDFNOSjYZP7gFKsnYrSzJQUgWvU vLxI2bKjJvX2oTKaPTMhZdLzmEEVE9RcPec+4X80WgRLbmWdj+o3gkEDygjXJi9Q ATlS6Qop9r6KEmvL4KsQnNjws0WxFXfASUxiztnJvL9fgH0svII6DpamtXN7iRwz PmgBPcsOEOlTAnMWYr/zLbTtp6ajWkRiHetdLCgHfSRuKgo6e16OswOo+Fj2HM49 o9OSlSyWmu6jjJSrUWYo6mokexKWkNflV1z1XTgOhfi/LJKWcmlYjqwW+ycXm2h7 /Q8/YSwNXRHEetLsfNQwmvVoV6lsTkeebJ8DHsPbE1V4780TrXNpVhlZXD5OdTYZ sgX+ubSSSwsT2JIyUFNxXwJqrZy2J7Rt//59ccJb7TtlTRDsDDvJHdSKeo+YVyys 4Cw1prelcK7yR5OFS2FRopUTXsoXtjnVDP6Y/jboPn6oihnI1Mvs0iAecgLwUUN4 jvhjvI1gSHRg/kqG0dJ77TUUyzx8N4+NQOILJJqrxea7YgfmJx4zCJP1q3FpeUVc b0W/zTyFZKz5b9n28s0aq4ancbGiLMFh4+Vifwbx0NQsD9tajYyP4QhbPtIrwozh k7GcB+tPoLWPpTA88L2KLXkfgAb6kon76w/CjECDlkygmOo/7k/6ULnBhUxq+Qll hbHbhxC/30Q= =736B -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.12/soc-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Pull "SoC changes for omaps for v4.12 merge window" from Tony Lindgren: - Drop PM_SUSPEND_STANDBY - Clean up hwmod code in preparation to eventually dynamically allocating hwmod data based on device tree data - Implement hwmod workaround for dra7 DCAN1 and OTG module to prevent clockdomain from entering HW_AUTO - Configure clockdomain and hwmod for dm81xx SATA - Mark omap_init_rng as __init * tag 'omap-for-v4.12/soc-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: mark omap_init_rng as __init ARM: OMAP2+: dm81xx: Add clkdm and hwmod for SATA ARM: DRA7: hwmod_data: Prevent wait_target_disable error for usb_otg_ss ARM: DRA7: hwmod: Fix DCAN1 stuck in transition ARM: OMAP2+ hwmod: Allow modules to disable HW_AUTO ARM: OMAP2+: omap_hwmod: provide space for more hwmod flags ARM: OMAP2+: Make hwmod clkdm_name const ARM: OMAP2+: Remove unused CLOCKACT_TEST_ICLK ARM: OMAP2+: Use list_for_each_entry for hwmod slave_ports ARM: OMAP2+: Remove mostly unused hwmod linkspace ARM: OMAP: PM: Drop useless checks for PM_SUSPEND_STANDBY
This commit is contained in:
Arnd Bergmann
commit
59bc516c8b
13 changed files with 78 additions and 216 deletions
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@ -581,7 +581,6 @@ static int omap_pm_enter(suspend_state_t state)
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{
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switch (state)
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{
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case PM_SUSPEND_STANDBY:
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case PM_SUSPEND_MEM:
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omap1_pm_suspend();
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break;
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@ -91,6 +91,14 @@ static struct clockdomain default_l3_slow_81xx_clkdm = {
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain default_sata_81xx_clkdm = {
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.name = "default_clkdm",
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.pwrdm = { .name = "default_pwrdm" },
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.cm_inst = TI81XX_CM_DEFAULT_MOD,
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.clkdm_offs = TI816X_CM_DEFAULT_SATA_CLKDM,
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.flags = CLKDM_CAN_SWSUP,
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};
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/* 816x only */
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static struct clockdomain alwon_mpu_816x_clkdm = {
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@ -173,6 +181,7 @@ static struct clockdomain *clockdomains_ti814x[] __initdata = {
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&mmu_81xx_clkdm,
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&mmu_cfg_81xx_clkdm,
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&default_l3_slow_81xx_clkdm,
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&default_sata_81xx_clkdm,
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NULL,
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};
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@ -200,6 +209,7 @@ static struct clockdomain *clockdomains_ti816x[] __initdata = {
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&default_ducati_816x_clkdm,
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&default_pci_816x_clkdm,
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&default_l3_slow_81xx_clkdm,
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&default_sata_81xx_clkdm,
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NULL,
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};
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@ -57,5 +57,6 @@
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#define TI816X_CM_DEFAULT_PCI_CLKDM 0x0010
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#define TI816X_CM_DEFAULT_L3_SLOW_CLKDM 0x0014
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#define TI816X_CM_DEFAULT_DUCATI_CLKDM 0x0018
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#define TI816X_CM_DEFAULT_SATA_CLKDM 0x0060
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#endif
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@ -121,7 +121,7 @@ static inline void omap_init_mcspi(void) {}
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*
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* Bind the RNG hwmod to the RNG omap_device. No return value.
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*/
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static void omap_init_rng(void)
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static void __init omap_init_rng(void)
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{
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struct omap_hwmod *oh;
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struct platform_device *pdev;
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@ -138,7 +138,6 @@
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#include <linux/mutex.h>
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#include <linux/spinlock.h>
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#include <linux/slab.h>
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#include <linux/bootmem.h>
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#include <linux/cpu.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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@ -216,48 +215,11 @@ static LIST_HEAD(omap_hwmod_list);
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/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
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static struct omap_hwmod *mpu_oh;
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/*
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* linkspace: ptr to a buffer that struct omap_hwmod_link records are
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* allocated from - used to reduce the number of small memory
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* allocations, which has a significant impact on performance
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*/
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static struct omap_hwmod_link *linkspace;
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/*
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* free_ls, max_ls: array indexes into linkspace; representing the
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* next free struct omap_hwmod_link index, and the maximum number of
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* struct omap_hwmod_link records allocated (respectively)
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*/
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static unsigned short free_ls, max_ls, ls_supp;
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/* inited: set to true once the hwmod code is initialized */
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static bool inited;
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/* Private functions */
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/**
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* _fetch_next_ocp_if - return the next OCP interface in a list
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* @p: ptr to a ptr to the list_head inside the ocp_if to return
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* @i: pointer to the index of the element pointed to by @p in the list
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*
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* Return a pointer to the struct omap_hwmod_ocp_if record
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* containing the struct list_head pointed to by @p, and increment
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* @p such that a future call to this routine will return the next
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* record.
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*/
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static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
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int *i)
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{
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struct omap_hwmod_ocp_if *oi;
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oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
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*p = (*p)->next;
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*i = *i + 1;
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return oi;
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}
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/**
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* _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
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* @oh: struct omap_hwmod *
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@ -794,15 +756,10 @@ static int _init_main_clk(struct omap_hwmod *oh)
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static int _init_interface_clks(struct omap_hwmod *oh)
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{
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struct omap_hwmod_ocp_if *os;
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struct list_head *p;
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struct clk *c;
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int i = 0;
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int ret = 0;
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p = oh->slave_ports.next;
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while (i < oh->slaves_cnt) {
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os = _fetch_next_ocp_if(&p, &i);
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list_for_each_entry(os, &oh->slave_ports, node) {
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if (!os->clk)
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continue;
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@ -905,19 +862,13 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
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static int _enable_clocks(struct omap_hwmod *oh)
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{
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struct omap_hwmod_ocp_if *os;
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struct list_head *p;
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int i = 0;
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pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
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if (oh->_clk)
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clk_enable(oh->_clk);
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p = oh->slave_ports.next;
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while (i < oh->slaves_cnt) {
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os = _fetch_next_ocp_if(&p, &i);
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list_for_each_entry(os, &oh->slave_ports, node) {
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if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
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clk_enable(os->_clk);
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}
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@ -939,19 +890,13 @@ static int _enable_clocks(struct omap_hwmod *oh)
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static int _disable_clocks(struct omap_hwmod *oh)
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{
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struct omap_hwmod_ocp_if *os;
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struct list_head *p;
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int i = 0;
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pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
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if (oh->_clk)
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clk_disable(oh->_clk);
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p = oh->slave_ports.next;
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while (i < oh->slaves_cnt) {
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os = _fetch_next_ocp_if(&p, &i);
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list_for_each_entry(os, &oh->slave_ports, node) {
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if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
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clk_disable(os->_clk);
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}
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@ -1190,16 +1135,11 @@ static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
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static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
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u32 *pa_start, u32 *pa_end)
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{
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int i, j;
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int j;
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struct omap_hwmod_ocp_if *os;
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struct list_head *p = NULL;
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bool found = false;
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p = oh->slave_ports.next;
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i = 0;
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while (i < oh->slaves_cnt) {
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os = _fetch_next_ocp_if(&p, &i);
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list_for_each_entry(os, &oh->slave_ports, node) {
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if (!os->addr)
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return -ENOENT;
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@ -1239,18 +1179,13 @@ static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
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static void __init _save_mpu_port_index(struct omap_hwmod *oh)
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{
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struct omap_hwmod_ocp_if *os = NULL;
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struct list_head *p;
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int i = 0;
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if (!oh)
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return;
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oh->_int_flags |= _HWMOD_NO_MPU_PORT;
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p = oh->slave_ports.next;
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while (i < oh->slaves_cnt) {
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os = _fetch_next_ocp_if(&p, &i);
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list_for_each_entry(os, &oh->slave_ports, node) {
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if (os->user & OCP_USER_MPU) {
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oh->_mpu_port = os;
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oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
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@ -1393,7 +1328,7 @@ static void _enable_sysc(struct omap_hwmod *oh)
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*/
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if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
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(sf & SYSC_HAS_CLOCKACTIVITY))
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_set_clockactivity(oh, oh->class->sysc->clockact, &v);
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_set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
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_write_sysconfig(v, oh);
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@ -2092,7 +2027,7 @@ static int _enable(struct omap_hwmod *oh)
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r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
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-EINVAL;
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if (oh->clkdm)
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if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
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clkdm_allow_idle(oh->clkdm);
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if (!r) {
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@ -2149,7 +2084,12 @@ static int _idle(struct omap_hwmod *oh)
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_idle_sysc(oh);
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_del_initiator_dep(oh, mpu_oh);
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if (oh->clkdm)
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/*
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* If HWMOD_CLKDM_NOAUTO is set then we don't
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* deny idle the clkdm again since idle was already denied
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* in _enable()
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*/
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if (oh->clkdm && !(oh->flags & HWMOD_CLKDM_NOAUTO))
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clkdm_deny_idle(oh->clkdm);
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if (oh->flags & HWMOD_BLOCK_WFI)
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@ -2451,15 +2391,11 @@ static int __init _init(struct omap_hwmod *oh, void *data)
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static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
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{
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struct omap_hwmod_ocp_if *os;
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struct list_head *p;
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int i = 0;
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if (oh->_state != _HWMOD_STATE_INITIALIZED)
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return;
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p = oh->slave_ports.next;
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while (i < oh->slaves_cnt) {
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os = _fetch_next_ocp_if(&p, &i);
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list_for_each_entry(os, &oh->slave_ports, node) {
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if (!os->_clk)
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continue;
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@ -2657,7 +2593,6 @@ static int __init _register(struct omap_hwmod *oh)
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list_add_tail(&oh->node, &omap_hwmod_list);
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INIT_LIST_HEAD(&oh->master_ports);
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INIT_LIST_HEAD(&oh->slave_ports);
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spin_lock_init(&oh->_lock);
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lockdep_set_class(&oh->_lock, &oh->hwmod_key);
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@ -2674,50 +2609,11 @@ static int __init _register(struct omap_hwmod *oh)
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return 0;
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}
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/**
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* _alloc_links - return allocated memory for hwmod links
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* @ml: pointer to a struct omap_hwmod_link * for the master link
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* @sl: pointer to a struct omap_hwmod_link * for the slave link
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*
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* Return pointers to two struct omap_hwmod_link records, via the
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* addresses pointed to by @ml and @sl. Will first attempt to return
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* memory allocated as part of a large initial block, but if that has
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* been exhausted, will allocate memory itself. Since ideally this
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* second allocation path will never occur, the number of these
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* 'supplemental' allocations will be logged when debugging is
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* enabled. Returns 0.
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*/
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static int __init _alloc_links(struct omap_hwmod_link **ml,
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struct omap_hwmod_link **sl)
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{
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unsigned int sz;
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if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
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*ml = &linkspace[free_ls++];
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*sl = &linkspace[free_ls++];
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return 0;
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}
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sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
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*sl = NULL;
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*ml = memblock_virt_alloc(sz, 0);
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*sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
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ls_supp++;
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pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
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ls_supp * LINKS_PER_OCP_IF);
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return 0;
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};
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/**
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* _add_link - add an interconnect between two IP blocks
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* @oi: pointer to a struct omap_hwmod_ocp_if record
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*
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* Add struct omap_hwmod_link records connecting the master IP block
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* specified in @oi->master to @oi, and connecting the slave IP block
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* Add struct omap_hwmod_link records connecting the slave IP block
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* specified in @oi->slave to @oi. This code is assumed to run before
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* preemption or SMP has been enabled, thus avoiding the need for
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* locking in this code. Changes to this assumption will require
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@ -2725,19 +2621,10 @@ static int __init _alloc_links(struct omap_hwmod_link **ml,
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*/
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static int __init _add_link(struct omap_hwmod_ocp_if *oi)
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{
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struct omap_hwmod_link *ml, *sl;
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pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
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oi->slave->name);
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_alloc_links(&ml, &sl);
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ml->ocp_if = oi;
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list_add(&ml->node, &oi->master->master_ports);
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oi->master->masters_cnt++;
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sl->ocp_if = oi;
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list_add(&sl->node, &oi->slave->slave_ports);
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list_add(&oi->node, &oi->slave->slave_ports);
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oi->slave->slaves_cnt++;
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return 0;
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@ -2784,45 +2671,6 @@ static int __init _register_link(struct omap_hwmod_ocp_if *oi)
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return 0;
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}
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/**
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* _alloc_linkspace - allocate large block of hwmod links
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* @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
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*
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* Allocate a large block of struct omap_hwmod_link records. This
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* improves boot time significantly by avoiding the need to allocate
|
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* individual records one by one. If the number of records to
|
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* allocate in the block hasn't been manually specified, this function
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* will count the number of struct omap_hwmod_ocp_if records in @ois
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* and use that to determine the allocation size. For SoC families
|
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* that require multiple list registrations, such as OMAP3xxx, this
|
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* estimation process isn't optimal, so manual estimation is advised
|
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* in those cases. Returns -EEXIST if the allocation has already occurred
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* or 0 upon success.
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*/
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static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
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{
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unsigned int i = 0;
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unsigned int sz;
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if (linkspace) {
|
||||
WARN(1, "linkspace already allocated\n");
|
||||
return -EEXIST;
|
||||
}
|
||||
|
||||
if (max_ls == 0)
|
||||
while (ois[i++])
|
||||
max_ls += LINKS_PER_OCP_IF;
|
||||
|
||||
sz = sizeof(struct omap_hwmod_link) * max_ls;
|
||||
|
||||
pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
|
||||
__func__, sz, max_ls);
|
||||
|
||||
linkspace = memblock_virt_alloc(sz, 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Static functions intended only for use in soc_ops field function pointers */
|
||||
|
||||
/**
|
||||
|
|
@ -3180,13 +3028,6 @@ int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
|
|||
if (ois[0] == NULL) /* Empty list */
|
||||
return 0;
|
||||
|
||||
if (!linkspace) {
|
||||
if (_alloc_linkspace(ois)) {
|
||||
pr_err("omap_hwmod: could not allocate link space\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
}
|
||||
|
||||
i = 0;
|
||||
do {
|
||||
r = _register_link(ois[i]);
|
||||
|
|
@ -3398,14 +3239,10 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
|
|||
ret += _count_sdma_reqs(oh);
|
||||
|
||||
if (flags & IORESOURCE_MEM) {
|
||||
int i = 0;
|
||||
struct omap_hwmod_ocp_if *os;
|
||||
struct list_head *p = oh->slave_ports.next;
|
||||
|
||||
while (i < oh->slaves_cnt) {
|
||||
os = _fetch_next_ocp_if(&p, &i);
|
||||
list_for_each_entry(os, &oh->slave_ports, node)
|
||||
ret += _count_ocp_if_addr_spaces(os);
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
|
@ -3424,7 +3261,6 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
|
|||
int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
|
||||
{
|
||||
struct omap_hwmod_ocp_if *os;
|
||||
struct list_head *p;
|
||||
int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
|
||||
int r = 0;
|
||||
|
||||
|
|
@ -3454,11 +3290,7 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
|
|||
r++;
|
||||
}
|
||||
|
||||
p = oh->slave_ports.next;
|
||||
|
||||
i = 0;
|
||||
while (i < oh->slaves_cnt) {
|
||||
os = _fetch_next_ocp_if(&p, &i);
|
||||
list_for_each_entry(os, &oh->slave_ports, node) {
|
||||
addr_cnt = _count_ocp_if_addr_spaces(os);
|
||||
|
||||
for (j = 0; j < addr_cnt; j++) {
|
||||
|
|
|
|||
|
|
@ -313,6 +313,7 @@ struct omap_hwmod_ocp_if {
|
|||
struct omap_hwmod_addr_space *addr;
|
||||
const char *clk;
|
||||
struct clk *_clk;
|
||||
struct list_head node;
|
||||
union {
|
||||
struct omap_hwmod_omap2_firewall omap2;
|
||||
} fw;
|
||||
|
|
@ -410,7 +411,6 @@ struct omap_hwmod_class_sysconfig {
|
|||
struct omap_hwmod_sysc_fields *sysc_fields;
|
||||
u8 srst_udelay;
|
||||
u8 idlemodes;
|
||||
u8 clockact;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
@ -531,6 +531,10 @@ struct omap_hwmod_omap4_prcm {
|
|||
* operate and they need to be handled at the same time as the main_clk.
|
||||
* HWMOD_NO_IDLE: Do not idle the hwmod at all. Useful to handle certain
|
||||
* IPs like CPSW on DRA7, where clocks to this module cannot be disabled.
|
||||
* HWMOD_CLKDM_NOAUTO: Allows the hwmod's clockdomain to be prevented from
|
||||
* entering HW_AUTO while hwmod is active. This is needed to workaround
|
||||
* some modules which don't function correctly with HW_AUTO. For example,
|
||||
* DCAN on DRA7x SoC needs this to workaround errata i893.
|
||||
*/
|
||||
#define HWMOD_SWSUP_SIDLE (1 << 0)
|
||||
#define HWMOD_SWSUP_MSTANDBY (1 << 1)
|
||||
|
|
@ -548,6 +552,7 @@ struct omap_hwmod_omap4_prcm {
|
|||
#define HWMOD_RECONFIG_IO_CHAIN (1 << 13)
|
||||
#define HWMOD_OPT_CLKS_NEEDED (1 << 14)
|
||||
#define HWMOD_NO_IDLE (1 << 15)
|
||||
#define HWMOD_CLKDM_NOAUTO (1 << 16)
|
||||
|
||||
/*
|
||||
* omap_hwmod._int_flags definitions
|
||||
|
|
@ -616,16 +621,6 @@ struct omap_hwmod_class {
|
|||
void (*unlock)(struct omap_hwmod *oh);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct omap_hwmod_link - internal structure linking hwmods with ocp_ifs
|
||||
* @ocp_if: OCP interface structure record pointer
|
||||
* @node: list_head pointing to next struct omap_hwmod_link in a list
|
||||
*/
|
||||
struct omap_hwmod_link {
|
||||
struct omap_hwmod_ocp_if *ocp_if;
|
||||
struct list_head node;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
|
||||
* @name: name of the hwmod
|
||||
|
|
@ -686,9 +681,8 @@ struct omap_hwmod {
|
|||
const char *main_clk;
|
||||
struct clk *_clk;
|
||||
struct omap_hwmod_opt_clk *opt_clks;
|
||||
char *clkdm_name;
|
||||
const char *clkdm_name;
|
||||
struct clockdomain *clkdm;
|
||||
struct list_head master_ports; /* connect to *_IA */
|
||||
struct list_head slave_ports; /* connect to *_TA */
|
||||
void *dev_attr;
|
||||
u32 _sysc_cache;
|
||||
|
|
@ -698,12 +692,11 @@ struct omap_hwmod {
|
|||
struct list_head node;
|
||||
struct omap_hwmod_ocp_if *_mpu_port;
|
||||
unsigned int (*xlate_irq)(unsigned int);
|
||||
u16 flags;
|
||||
u32 flags;
|
||||
u8 mpu_rt_idx;
|
||||
u8 response_lat;
|
||||
u8 rst_lines_cnt;
|
||||
u8 opt_clks_cnt;
|
||||
u8 masters_cnt;
|
||||
u8 slaves_cnt;
|
||||
u8 hwmods_cnt;
|
||||
u8 _int_flags;
|
||||
|
|
|
|||
|
|
@ -55,7 +55,6 @@ static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = {
|
|||
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
|
||||
SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.clockact = CLOCKACT_TEST_ICLK,
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -149,7 +149,6 @@ static struct omap_hwmod_class_sysconfig omap3xxx_timer_sysc = {
|
|||
SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE |
|
||||
SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.clockact = CLOCKACT_TEST_ICLK,
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
|
|
@ -424,7 +423,6 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
|
|||
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
|
||||
SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.clockact = CLOCKACT_TEST_ICLK,
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
|
|
@ -1045,7 +1043,6 @@ static struct omap_hwmod_class_sysconfig omap3xxx_mcbsp_sysc = {
|
|||
SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
.clockact = 0x2,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap3xxx_mcbsp_hwmod_class = {
|
||||
|
|
@ -1210,7 +1207,6 @@ static struct omap_hwmod_sysc_fields omap34xx_sr_sysc_fields = {
|
|||
static struct omap_hwmod_class_sysconfig omap34xx_sr_sysc = {
|
||||
.sysc_offs = 0x24,
|
||||
.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_NO_CACHE),
|
||||
.clockact = CLOCKACT_TEST_ICLK,
|
||||
.sysc_fields = &omap34xx_sr_sysc_fields,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1320,7 +1320,6 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = {
|
|||
SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP),
|
||||
.clockact = CLOCKACT_TEST_ICLK,
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
|
|
@ -2548,7 +2547,6 @@ static struct omap_hwmod_class_sysconfig omap44xx_timer_1ms_sysc = {
|
|||
SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
|
||||
SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.clockact = CLOCKACT_TEST_ICLK,
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -839,7 +839,6 @@ static struct omap_hwmod_class_sysconfig omap54xx_i2c_sysc = {
|
|||
SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP),
|
||||
.clockact = CLOCKACT_TEST_ICLK,
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
|
|
@ -1530,7 +1529,6 @@ static struct omap_hwmod_class_sysconfig omap54xx_timer_1ms_sysc = {
|
|||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP),
|
||||
.sysc_fields = &omap_hwmod_sysc_type2,
|
||||
.clockact = CLOCKACT_TEST_ICLK,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap54xx_timer_1ms_hwmod_class = {
|
||||
|
|
|
|||
|
|
@ -359,6 +359,7 @@ static struct omap_hwmod dra7xx_dcan1_hwmod = {
|
|||
.class = &dra7xx_dcan_hwmod_class,
|
||||
.clkdm_name = "wkupaon_clkdm",
|
||||
.main_clk = "dcan1_sys_clk_mux",
|
||||
.flags = HWMOD_CLKDM_NOAUTO,
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = DRA7XX_CM_WKUPAON_DCAN1_CLKCTRL_OFFSET,
|
||||
|
|
@ -374,6 +375,7 @@ static struct omap_hwmod dra7xx_dcan2_hwmod = {
|
|||
.class = &dra7xx_dcan_hwmod_class,
|
||||
.clkdm_name = "l4per2_clkdm",
|
||||
.main_clk = "sys_clkin1",
|
||||
.flags = HWMOD_CLKDM_NOAUTO,
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = DRA7XX_CM_L4PER2_DCAN2_CLKCTRL_OFFSET,
|
||||
|
|
@ -1098,7 +1100,6 @@ static struct omap_hwmod_class_sysconfig dra7xx_i2c_sysc = {
|
|||
SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP),
|
||||
.clockact = CLOCKACT_TEST_ICLK,
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
|
|
@ -2700,6 +2701,7 @@ static struct omap_hwmod dra7xx_usb_otg_ss1_hwmod = {
|
|||
.class = &dra7xx_usb_otg_ss_hwmod_class,
|
||||
.clkdm_name = "l3init_clkdm",
|
||||
.main_clk = "dpll_core_h13x2_ck",
|
||||
.flags = HWMOD_CLKDM_NOAUTO,
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = DRA7XX_CM_L3INIT_USB_OTG_SS1_CLKCTRL_OFFSET,
|
||||
|
|
@ -2721,6 +2723,7 @@ static struct omap_hwmod dra7xx_usb_otg_ss2_hwmod = {
|
|||
.class = &dra7xx_usb_otg_ss_hwmod_class,
|
||||
.clkdm_name = "l3init_clkdm",
|
||||
.main_clk = "dpll_core_h13x2_ck",
|
||||
.flags = HWMOD_CLKDM_NOAUTO,
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = DRA7XX_CM_L3INIT_USB_OTG_SS2_CLKCTRL_OFFSET,
|
||||
|
|
|
|||
|
|
@ -106,6 +106,7 @@
|
|||
*/
|
||||
#define DM81XX_CM_DEFAULT_OFFSET 0x500
|
||||
#define DM81XX_CM_DEFAULT_USB_CLKCTRL (0x558 - DM81XX_CM_DEFAULT_OFFSET)
|
||||
#define DM81XX_CM_DEFAULT_SATA_CLKCTRL (0x560 - DM81XX_CM_DEFAULT_OFFSET)
|
||||
|
||||
/* L3 Interconnect entries clocked at 125, 250 and 500MHz */
|
||||
static struct omap_hwmod dm81xx_alwon_l3_slow_hwmod = {
|
||||
|
|
@ -973,6 +974,38 @@ static struct omap_hwmod_ocp_if dm816x_l4_hs__emac1 = {
|
|||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class_sysconfig dm81xx_sata_sysc = {
|
||||
.sysc_offs = 0x1100,
|
||||
.sysc_flags = SYSC_HAS_SIDLEMODE,
|
||||
.idlemodes = SIDLE_FORCE,
|
||||
.sysc_fields = &omap_hwmod_sysc_type3,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class dm81xx_sata_hwmod_class = {
|
||||
.name = "sata",
|
||||
.sysc = &dm81xx_sata_sysc,
|
||||
};
|
||||
|
||||
static struct omap_hwmod dm81xx_sata_hwmod = {
|
||||
.name = "sata",
|
||||
.clkdm_name = "default_sata_clkdm",
|
||||
.flags = HWMOD_NO_IDLEST,
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = DM81XX_CM_DEFAULT_SATA_CLKCTRL,
|
||||
.modulemode = MODULEMODE_SWCTRL,
|
||||
},
|
||||
},
|
||||
.class = &dm81xx_sata_hwmod_class,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if dm81xx_l4_hs__sata = {
|
||||
.master = &dm81xx_l4_hs_hwmod,
|
||||
.slave = &dm81xx_sata_hwmod,
|
||||
.clk = "sysclk5_ck",
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class_sysconfig dm81xx_mmc_sysc = {
|
||||
.rev_offs = 0x0,
|
||||
.sysc_offs = 0x110,
|
||||
|
|
@ -1474,6 +1507,7 @@ static struct omap_hwmod_ocp_if *dm816x_hwmod_ocp_ifs[] __initdata = {
|
|||
&dm81xx_l4_hs__emac0,
|
||||
&dm81xx_emac0__mdio,
|
||||
&dm816x_l4_hs__emac1,
|
||||
&dm81xx_l4_hs__sata,
|
||||
&dm81xx_alwon_l3_fast__tpcc,
|
||||
&dm81xx_alwon_l3_fast__tptc0,
|
||||
&dm81xx_alwon_l3_fast__tptc1,
|
||||
|
|
|
|||
|
|
@ -163,7 +163,6 @@ static int omap_pm_enter(suspend_state_t suspend_state)
|
|||
return -ENOENT; /* XXX doublecheck */
|
||||
|
||||
switch (suspend_state) {
|
||||
case PM_SUSPEND_STANDBY:
|
||||
case PM_SUSPEND_MEM:
|
||||
ret = omap_pm_suspend();
|
||||
break;
|
||||
|
|
|
|||
Loading…
Reference in a new issue