From 59cbbf640b1a26fdf19362cc72591132b3614db9 Mon Sep 17 00:00:00 2001 From: Jinwei Chen Date: Mon, 21 Dec 2020 05:18:55 -0800 Subject: [PATCH] qcacld-3.0: support fisa fse cache flushing disable/enable FISA FSE cache flushing is not allowed after PCIe bus suspended, add function to support FISA FSE cache flushing disable/enable. Change-Id: I4371e2941a4d2b590fa66db8390135f2620b54a3 CRs-Fixed: 2841740 --- core/dp/txrx3.0/dp_fisa_rx.c | 28 ++++++++++++++++++++++++++++ core/dp/txrx3.0/dp_fisa_rx.h | 16 ++++++++++++++++ core/dp/txrx3.0/dp_rx_fst.c | 4 +++- 3 files changed, 47 insertions(+), 1 deletion(-) diff --git a/core/dp/txrx3.0/dp_fisa_rx.c b/core/dp/txrx3.0/dp_fisa_rx.c index 388426826b99..7212f08789da 100644 --- a/core/dp/txrx3.0/dp_fisa_rx.c +++ b/core/dp/txrx3.0/dp_fisa_rx.c @@ -510,6 +510,7 @@ dp_rx_fisa_add_ft_entry(struct dp_rx_fst *fisa_hdl, * reflect the flow update */ if (is_fst_updated && + fisa_hdl->fse_cache_flush_allow && (qdf_atomic_inc_return(&fisa_hdl->fse_cache_flush_posted) == 1)) { /* return 1 after increment implies FSE cache flush message * already posted. so start restart the timer @@ -1913,3 +1914,30 @@ void dp_set_fisa_disallowed_for_vdev(struct cdp_soc_t *cdp_soc, uint8_t vdev_id, vdev->fisa_disallowed[rx_ctx_id] = val; dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX); } + +void dp_suspend_fse_cache_flush(struct dp_soc *soc) +{ + struct dp_rx_fst *dp_fst; + + dp_fst = soc->rx_fst; + if (dp_fst) { + if (qdf_atomic_read(&dp_fst->fse_cache_flush_posted)) + qdf_timer_sync_cancel(&dp_fst->fse_cache_flush_timer); + dp_fst->fse_cache_flush_allow = false; + } + + dp_info("fse cache flush suspended"); +} + +void dp_resume_fse_cache_flush(struct dp_soc *soc) +{ + struct dp_rx_fst *dp_fst; + + dp_fst = soc->rx_fst; + if (dp_fst) { + qdf_atomic_set(&dp_fst->fse_cache_flush_posted, 0); + dp_fst->fse_cache_flush_allow = true; + } + + dp_info("fse cache flush resumed"); +} diff --git a/core/dp/txrx3.0/dp_fisa_rx.h b/core/dp/txrx3.0/dp_fisa_rx.h index cda4471a5b7c..f3b7cb860b1d 100644 --- a/core/dp/txrx3.0/dp_fisa_rx.h +++ b/core/dp/txrx3.0/dp_fisa_rx.h @@ -125,6 +125,22 @@ void dp_set_fisa_disallowed_for_vdev(struct cdp_soc_t *cdp_soc, uint8_t vdev_id, * Return: None */ void dp_fisa_rx_fst_update_work(void *arg); + +/** + * dp_suspend_fse_cache_flush() - Suspend FSE cache flush + * @soc: core txrx main context + * + * Return: None + */ +void dp_suspend_fse_cache_flush(struct dp_soc *soc); + +/** + * dp_resume_fse_cache_flush() - Resume FSE cache flush + * @soc: core txrx main context + * + * Return: None + */ +void dp_resume_fse_cache_flush(struct dp_soc *soc); #else static QDF_STATUS dp_rx_dump_fisa_stats(struct dp_soc *soc) { diff --git a/core/dp/txrx3.0/dp_rx_fst.c b/core/dp/txrx3.0/dp_rx_fst.c index 6e5a0af6df2c..252340f46ca9 100644 --- a/core/dp/txrx3.0/dp_rx_fst.c +++ b/core/dp/txrx3.0/dp_rx_fst.c @@ -112,7 +112,6 @@ static void dp_fisa_fse_cache_flush_timer(void *arg) dp_info("FSE cache flush for %d flows", fse_cache_flush_rec->flows_added); - qdf_atomic_set(&fisa_hdl->fse_cache_flush_posted, 0); status = dp_rx_flow_send_htt_operation_cmd(soc->pdev_list[0], DP_HTT_FST_CACHE_INVALIDATE_FULL, @@ -123,6 +122,8 @@ static void dp_fisa_fse_cache_flush_timer(void *arg) * Not big impact cache entry gets updated later */ } + + qdf_atomic_set(&fisa_hdl->fse_cache_flush_posted, 0); } /** @@ -266,6 +267,7 @@ QDF_STATUS dp_rx_fst_attach(struct dp_soc *soc, struct dp_pdev *pdev) qdf_atomic_init(&fst->fse_cache_flush_posted); + fst->fse_cache_flush_allow = true; fst->soc_hdl = soc; soc->rx_fst = fst; soc->fisa_enable = true;