mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-24 13:44:26 -04:00
Merge branch 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6
* 'drm-core-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (390 commits) drm/radeon/kms: disable underscan by default drm/radeon/kms: only enable hdmi features if the monitor supports audio drm: Restore the old_fb upon modeset failure drm/nouveau: fix hwmon device binding radeon: consolidate asic-specific function decls for pre-r600 vga_switcheroo: comparing too few characters in strncmp() drm/radeon/kms: add NI pci ids drm/radeon/kms: don't enable pcie gen2 on NI yet drm/radeon/kms: add radeon_asic struct for NI asics drm/radeon/kms/ni: load default sclk/mclk/vddc at pm init drm/radeon/kms: add ucode loader for NI drm/radeon/kms: add support for DCE5 display LUTs drm/radeon/kms: add ni_reg.h drm/radeon/kms: add bo blit support for NI drm/radeon/kms: always use writeback/events for fences on NI drm/radeon/kms: adjust default clock/vddc tracking for pm on DCE5 drm/radeon/kms: add backend map workaround for barts drm/radeon/kms: fill gpu init for NI asics drm/radeon/kms: add disabled vbios accessor for NI asics drm/radeon/kms: handle NI thermal controller ...
This commit is contained in:
Linus Torvalds
commit
5b2eef966c
187 changed files with 24886 additions and 10827 deletions
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@ -683,6 +683,21 @@ struct drm_master {
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void *driver_priv; /**< Private structure for driver to use */
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};
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/* Size of ringbuffer for vblank timestamps. Just double-buffer
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* in initial implementation.
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*/
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#define DRM_VBLANKTIME_RBSIZE 2
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/* Flags and return codes for get_vblank_timestamp() driver function. */
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#define DRM_CALLED_FROM_VBLIRQ 1
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#define DRM_VBLANKTIME_SCANOUTPOS_METHOD (1 << 0)
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#define DRM_VBLANKTIME_INVBL (1 << 1)
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/* get_scanout_position() return flags */
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#define DRM_SCANOUTPOS_VALID (1 << 0)
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#define DRM_SCANOUTPOS_INVBL (1 << 1)
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#define DRM_SCANOUTPOS_ACCURATE (1 << 2)
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/**
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* DRM driver structure. This structure represent the common code for
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* a family of cards. There will one drm_device for each card present
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@ -760,6 +775,68 @@ struct drm_driver {
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*/
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int (*device_is_agp) (struct drm_device *dev);
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/**
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* Called by vblank timestamping code.
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*
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* Return the current display scanout position from a crtc.
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*
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* \param dev DRM device.
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* \param crtc Id of the crtc to query.
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* \param *vpos Target location for current vertical scanout position.
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* \param *hpos Target location for current horizontal scanout position.
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*
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* Returns vpos as a positive number while in active scanout area.
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* Returns vpos as a negative number inside vblank, counting the number
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* of scanlines to go until end of vblank, e.g., -1 means "one scanline
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* until start of active scanout / end of vblank."
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*
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* \return Flags, or'ed together as follows:
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*
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* DRM_SCANOUTPOS_VALID = Query successfull.
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* DRM_SCANOUTPOS_INVBL = Inside vblank.
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* DRM_SCANOUTPOS_ACCURATE = Returned position is accurate. A lack of
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* this flag means that returned position may be offset by a constant
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* but unknown small number of scanlines wrt. real scanout position.
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*
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*/
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int (*get_scanout_position) (struct drm_device *dev, int crtc,
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int *vpos, int *hpos);
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/**
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* Called by \c drm_get_last_vbltimestamp. Should return a precise
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* timestamp when the most recent VBLANK interval ended or will end.
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*
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* Specifically, the timestamp in @vblank_time should correspond as
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* closely as possible to the time when the first video scanline of
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* the video frame after the end of VBLANK will start scanning out,
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* the time immmediately after end of the VBLANK interval. If the
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* @crtc is currently inside VBLANK, this will be a time in the future.
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* If the @crtc is currently scanning out a frame, this will be the
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* past start time of the current scanout. This is meant to adhere
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* to the OpenML OML_sync_control extension specification.
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*
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* \param dev dev DRM device handle.
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* \param crtc crtc for which timestamp should be returned.
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* \param *max_error Maximum allowable timestamp error in nanoseconds.
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* Implementation should strive to provide timestamp
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* with an error of at most *max_error nanoseconds.
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* Returns true upper bound on error for timestamp.
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* \param *vblank_time Target location for returned vblank timestamp.
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* \param flags 0 = Defaults, no special treatment needed.
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* \param DRM_CALLED_FROM_VBLIRQ = Function is called from vblank
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* irq handler. Some drivers need to apply some workarounds
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* for gpu-specific vblank irq quirks if flag is set.
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*
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* \returns
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* Zero if timestamping isn't supported in current display mode or a
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* negative number on failure. A positive status code on success,
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* which describes how the vblank_time timestamp was computed.
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*/
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int (*get_vblank_timestamp) (struct drm_device *dev, int crtc,
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int *max_error,
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struct timeval *vblank_time,
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unsigned flags);
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/* these have to be filled in */
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irqreturn_t(*irq_handler) (DRM_IRQ_ARGS);
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@ -983,6 +1060,8 @@ struct drm_device {
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wait_queue_head_t *vbl_queue; /**< VBLANK wait queue */
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atomic_t *_vblank_count; /**< number of VBLANK interrupts (driver must alloc the right number of counters) */
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struct timeval *_vblank_time; /**< timestamp of current vblank_count (drivers must alloc right number of fields) */
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spinlock_t vblank_time_lock; /**< Protects vblank count and time updates during vblank enable/disable */
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spinlock_t vbl_lock;
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atomic_t *vblank_refcount; /* number of users of vblank interruptsper crtc */
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u32 *last_vblank; /* protected by dev->vbl_lock, used */
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@ -1041,12 +1120,14 @@ struct drm_device {
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/*@{ */
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spinlock_t object_name_lock;
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struct idr object_name_idr;
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uint32_t invalidate_domains; /* domains pending invalidation */
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uint32_t flush_domains; /* domains pending flush */
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/*@} */
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int switch_power_state;
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};
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#define DRM_SWITCH_POWER_ON 0
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#define DRM_SWITCH_POWER_OFF 1
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#define DRM_SWITCH_POWER_CHANGING 2
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static __inline__ int drm_core_check_feature(struct drm_device *dev,
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int feature)
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{
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@ -1284,11 +1365,22 @@ extern int drm_wait_vblank(struct drm_device *dev, void *data,
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struct drm_file *filp);
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extern int drm_vblank_wait(struct drm_device *dev, unsigned int *vbl_seq);
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extern u32 drm_vblank_count(struct drm_device *dev, int crtc);
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extern u32 drm_vblank_count_and_time(struct drm_device *dev, int crtc,
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struct timeval *vblanktime);
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extern void drm_handle_vblank(struct drm_device *dev, int crtc);
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extern int drm_vblank_get(struct drm_device *dev, int crtc);
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extern void drm_vblank_put(struct drm_device *dev, int crtc);
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extern void drm_vblank_off(struct drm_device *dev, int crtc);
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extern void drm_vblank_cleanup(struct drm_device *dev);
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extern u32 drm_get_last_vbltimestamp(struct drm_device *dev, int crtc,
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struct timeval *tvblank, unsigned flags);
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extern int drm_calc_vbltimestamp_from_scanoutpos(struct drm_device *dev,
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int crtc, int *max_error,
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struct timeval *vblank_time,
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unsigned flags,
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struct drm_crtc *refcrtc);
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extern void drm_calc_timestamping_constants(struct drm_crtc *crtc);
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/* Modesetting support */
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extern void drm_vblank_pre_modeset(struct drm_device *dev, int crtc);
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extern void drm_vblank_post_modeset(struct drm_device *dev, int crtc);
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@ -1321,7 +1413,6 @@ extern int drm_agp_unbind_ioctl(struct drm_device *dev, void *data,
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extern int drm_agp_bind(struct drm_device *dev, struct drm_agp_binding *request);
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extern int drm_agp_bind_ioctl(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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extern void drm_agp_chipset_flush(struct drm_device *dev);
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/* Stub support (drm_stub.h) */
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extern int drm_setmaster_ioctl(struct drm_device *dev, void *data,
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@ -1340,6 +1431,9 @@ extern void drm_put_dev(struct drm_device *dev);
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extern int drm_put_minor(struct drm_minor **minor);
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extern unsigned int drm_debug;
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extern unsigned int drm_vblank_offdelay;
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extern unsigned int drm_timestamp_precision;
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extern struct class *drm_class;
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extern struct proc_dir_entry *drm_proc_root;
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extern struct dentry *drm_debugfs_root;
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@ -351,8 +351,14 @@ struct drm_crtc {
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bool enabled;
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/* Requested mode from modesetting. */
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struct drm_display_mode mode;
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/* Programmed mode in hw, after adjustments for encoders,
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* crtc, panel scaling etc. Needed for timestamping etc.
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*/
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struct drm_display_mode hwmode;
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int x, y;
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const struct drm_crtc_funcs *funcs;
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@ -360,6 +366,9 @@ struct drm_crtc {
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uint32_t gamma_size;
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uint16_t *gamma_store;
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/* Constants needed for precise vblank and swap timestamping. */
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s64 framedur_ns, linedur_ns, pixeldur_ns;
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/* if you are using the helper */
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void *helper_private;
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};
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@ -121,9 +121,6 @@ int drm_fb_helper_setcolreg(unsigned regno,
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void drm_fb_helper_restore(void);
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void drm_fb_helper_fill_var(struct fb_info *info, struct drm_fb_helper *fb_helper,
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uint32_t fb_width, uint32_t fb_height);
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void drm_fb_helper_fill_fix(struct fb_info *info, uint32_t pitch,
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uint32_t depth);
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int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info);
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bool drm_fb_helper_hotplug_event(struct drm_fb_helper *fb_helper);
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@ -62,11 +62,14 @@ struct drm_mm {
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struct list_head unused_nodes;
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int num_unused;
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spinlock_t unused_lock;
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unsigned int scan_check_range : 1;
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unsigned scan_alignment;
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unsigned long scan_size;
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unsigned long scan_hit_start;
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unsigned scan_hit_size;
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unsigned scanned_blocks;
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unsigned long scan_start;
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unsigned long scan_end;
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};
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/*
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@ -145,6 +148,10 @@ static inline struct drm_mm *drm_get_mm(struct drm_mm_node *block)
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void drm_mm_init_scan(struct drm_mm *mm, unsigned long size,
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unsigned alignment);
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void drm_mm_init_scan_with_range(struct drm_mm *mm, unsigned long size,
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unsigned alignment,
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unsigned long start,
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unsigned long end);
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int drm_mm_scan_add_block(struct drm_mm_node *node);
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int drm_mm_scan_remove_block(struct drm_mm_node *node);
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@ -142,6 +142,42 @@
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{0x1002, 0x5e4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x5e4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x5e4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6720, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6721, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6722, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6723, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6725, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6726, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6727, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6728, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6729, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6738, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6739, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6740, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6741, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
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{0x1002, 0x6742, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6743, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
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{0x1002, 0x6744, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
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{0x1002, 0x6745, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
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{0x1002, 0x6746, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
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{0x1002, 0x6747, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
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{0x1002, 0x6748, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
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{0x1002, 0x6749, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
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{0x1002, 0x6750, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
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{0x1002, 0x6758, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
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{0x1002, 0x6759, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \
|
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{0x1002, 0x6760, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
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{0x1002, 0x6761, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
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{0x1002, 0x6762, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \
|
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{0x1002, 0x6763, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \
|
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{0x1002, 0x6764, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6765, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6766, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6767, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6768, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6770, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6779, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6880, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6888, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \
|
||||
{0x1002, 0x6889, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \
|
||||
|
|
@ -419,6 +455,10 @@
|
|||
{0x1002, 0x9713, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0x1002, 0x9714, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0x1002, 0x9715, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0x1002, 0x9802, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0x1002, 0x9803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0x1002, 0x9804, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0x1002, 0x9805, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
|
||||
{0, 0, 0}
|
||||
|
||||
#define r128_PCI_IDS \
|
||||
|
|
|
|||
|
|
@ -289,6 +289,7 @@ typedef struct drm_i915_irq_wait {
|
|||
#define I915_PARAM_HAS_BLT 11
|
||||
#define I915_PARAM_HAS_RELAXED_FENCING 12
|
||||
#define I915_PARAM_HAS_COHERENT_RINGS 13
|
||||
#define I915_PARAM_HAS_EXEC_CONSTANTS 14
|
||||
|
||||
typedef struct drm_i915_getparam {
|
||||
int param;
|
||||
|
|
@ -635,6 +636,17 @@ struct drm_i915_gem_execbuffer2 {
|
|||
#define I915_EXEC_RENDER (1<<0)
|
||||
#define I915_EXEC_BSD (2<<0)
|
||||
#define I915_EXEC_BLT (3<<0)
|
||||
|
||||
/* Used for switching the constants addressing mode on gen4+ RENDER ring.
|
||||
* Gen6+ only supports relative addressing to dynamic state (default) and
|
||||
* absolute addressing.
|
||||
*
|
||||
* These flags are ignored for the BSD and BLT rings.
|
||||
*/
|
||||
#define I915_EXEC_CONSTANTS_MASK (3<<6)
|
||||
#define I915_EXEC_CONSTANTS_REL_GENERAL (0<<6) /* default */
|
||||
#define I915_EXEC_CONSTANTS_ABSOLUTE (1<<6)
|
||||
#define I915_EXEC_CONSTANTS_REL_SURFACE (2<<6) /* gen4/5 only */
|
||||
__u64 flags;
|
||||
__u64 rsvd1;
|
||||
__u64 rsvd2;
|
||||
|
|
|
|||
|
|
@ -2,17 +2,40 @@
|
|||
|
||||
#ifndef _DRM_INTEL_GTT_H
|
||||
#define _DRM_INTEL_GTT_H
|
||||
struct intel_gtt {
|
||||
/* Number of stolen gtt entries at the beginning. */
|
||||
unsigned int gtt_stolen_entries;
|
||||
|
||||
const struct intel_gtt {
|
||||
/* Size of memory reserved for graphics by the BIOS */
|
||||
unsigned int stolen_size;
|
||||
/* Total number of gtt entries. */
|
||||
unsigned int gtt_total_entries;
|
||||
/* Part of the gtt that is mappable by the cpu, for those chips where
|
||||
* this is not the full gtt. */
|
||||
unsigned int gtt_mappable_entries;
|
||||
};
|
||||
/* Whether i915 needs to use the dmar apis or not. */
|
||||
unsigned int needs_dmar : 1;
|
||||
} *intel_gtt_get(void);
|
||||
|
||||
struct intel_gtt *intel_gtt_get(void);
|
||||
void intel_gtt_chipset_flush(void);
|
||||
void intel_gtt_unmap_memory(struct scatterlist *sg_list, int num_sg);
|
||||
void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries);
|
||||
int intel_gtt_map_memory(struct page **pages, unsigned int num_entries,
|
||||
struct scatterlist **sg_list, int *num_sg);
|
||||
void intel_gtt_insert_sg_entries(struct scatterlist *sg_list,
|
||||
unsigned int sg_len,
|
||||
unsigned int pg_start,
|
||||
unsigned int flags);
|
||||
void intel_gtt_insert_pages(unsigned int first_entry, unsigned int num_entries,
|
||||
struct page **pages, unsigned int flags);
|
||||
|
||||
/* Special gtt memory types */
|
||||
#define AGP_DCACHE_MEMORY 1
|
||||
#define AGP_PHYS_MEMORY 2
|
||||
|
||||
/* New caching attributes for gen6/sandybridge */
|
||||
#define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2)
|
||||
#define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4)
|
||||
|
||||
/* flag for GFDT type */
|
||||
#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -71,16 +71,14 @@ struct drm_nouveau_gpuobj_free {
|
|||
#define NOUVEAU_GETPARAM_PCI_VENDOR 3
|
||||
#define NOUVEAU_GETPARAM_PCI_DEVICE 4
|
||||
#define NOUVEAU_GETPARAM_BUS_TYPE 5
|
||||
#define NOUVEAU_GETPARAM_FB_PHYSICAL 6
|
||||
#define NOUVEAU_GETPARAM_AGP_PHYSICAL 7
|
||||
#define NOUVEAU_GETPARAM_FB_SIZE 8
|
||||
#define NOUVEAU_GETPARAM_AGP_SIZE 9
|
||||
#define NOUVEAU_GETPARAM_PCI_PHYSICAL 10
|
||||
#define NOUVEAU_GETPARAM_CHIPSET_ID 11
|
||||
#define NOUVEAU_GETPARAM_VM_VRAM_BASE 12
|
||||
#define NOUVEAU_GETPARAM_GRAPH_UNITS 13
|
||||
#define NOUVEAU_GETPARAM_PTIMER_TIME 14
|
||||
#define NOUVEAU_GETPARAM_HAS_BO_USAGE 15
|
||||
#define NOUVEAU_GETPARAM_HAS_PAGEFLIP 16
|
||||
struct drm_nouveau_getparam {
|
||||
uint64_t param;
|
||||
uint64_t value;
|
||||
|
|
@ -171,7 +169,6 @@ struct drm_nouveau_gem_pushbuf {
|
|||
};
|
||||
|
||||
#define NOUVEAU_GEM_CPU_PREP_NOWAIT 0x00000001
|
||||
#define NOUVEAU_GEM_CPU_PREP_NOBLOCK 0x00000002
|
||||
#define NOUVEAU_GEM_CPU_PREP_WRITE 0x00000004
|
||||
struct drm_nouveau_gem_cpu_prep {
|
||||
uint32_t handle;
|
||||
|
|
|
|||
|
|
@ -906,6 +906,7 @@ struct drm_radeon_cs {
|
|||
#define RADEON_INFO_ACCEL_WORKING2 0x05
|
||||
#define RADEON_INFO_TILING_CONFIG 0x06
|
||||
#define RADEON_INFO_WANT_HYPERZ 0x07
|
||||
#define RADEON_INFO_WANT_CMASK 0x08 /* get access to CMASK on r300 */
|
||||
|
||||
struct drm_radeon_info {
|
||||
uint32_t request;
|
||||
|
|
|
|||
|
|
@ -74,6 +74,8 @@ struct ttm_placement {
|
|||
* @is_iomem: is this io memory ?
|
||||
* @size: size in byte
|
||||
* @offset: offset from the base address
|
||||
* @io_reserved_vm: The VM system has a refcount in @io_reserved_count
|
||||
* @io_reserved_count: Refcounting the numbers of callers to ttm_mem_io_reserve
|
||||
*
|
||||
* Structure indicating the bus placement of an object.
|
||||
*/
|
||||
|
|
@ -83,7 +85,8 @@ struct ttm_bus_placement {
|
|||
unsigned long size;
|
||||
unsigned long offset;
|
||||
bool is_iomem;
|
||||
bool io_reserved;
|
||||
bool io_reserved_vm;
|
||||
uint64_t io_reserved_count;
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -154,7 +157,6 @@ struct ttm_tt;
|
|||
* keeps one refcount. When this refcount reaches zero,
|
||||
* the object is destroyed.
|
||||
* @event_queue: Queue for processes waiting on buffer object status change.
|
||||
* @lock: spinlock protecting mostly synchronization members.
|
||||
* @mem: structure describing current placement.
|
||||
* @persistant_swap_storage: Usually the swap storage is deleted for buffers
|
||||
* pinned in physical memory. If this behaviour is not desired, this member
|
||||
|
|
@ -213,7 +215,6 @@ struct ttm_buffer_object {
|
|||
struct kref kref;
|
||||
struct kref list_kref;
|
||||
wait_queue_head_t event_queue;
|
||||
spinlock_t lock;
|
||||
|
||||
/**
|
||||
* Members protected by the bo::reserved lock.
|
||||
|
|
@ -237,6 +238,7 @@ struct ttm_buffer_object {
|
|||
struct list_head lru;
|
||||
struct list_head ddestroy;
|
||||
struct list_head swap;
|
||||
struct list_head io_reserve_lru;
|
||||
uint32_t val_seq;
|
||||
bool seq_valid;
|
||||
|
||||
|
|
@ -248,10 +250,10 @@ struct ttm_buffer_object {
|
|||
atomic_t reserved;
|
||||
|
||||
/**
|
||||
* Members protected by the bo::lock
|
||||
* Members protected by struct buffer_object_device::fence_lock
|
||||
* In addition, setting sync_obj to anything else
|
||||
* than NULL requires bo::reserved to be held. This allows for
|
||||
* checking NULL while reserved but not holding bo::lock.
|
||||
* checking NULL while reserved but not holding the mentioned lock.
|
||||
*/
|
||||
|
||||
void *sync_obj_arg;
|
||||
|
|
@ -364,6 +366,44 @@ extern int ttm_bo_validate(struct ttm_buffer_object *bo,
|
|||
*/
|
||||
extern void ttm_bo_unref(struct ttm_buffer_object **bo);
|
||||
|
||||
|
||||
/**
|
||||
* ttm_bo_list_ref_sub
|
||||
*
|
||||
* @bo: The buffer object.
|
||||
* @count: The number of references with which to decrease @bo::list_kref;
|
||||
* @never_free: The refcount should not reach zero with this operation.
|
||||
*
|
||||
* Release @count lru list references to this buffer object.
|
||||
*/
|
||||
extern void ttm_bo_list_ref_sub(struct ttm_buffer_object *bo, int count,
|
||||
bool never_free);
|
||||
|
||||
/**
|
||||
* ttm_bo_add_to_lru
|
||||
*
|
||||
* @bo: The buffer object.
|
||||
*
|
||||
* Add this bo to the relevant mem type lru and, if it's backed by
|
||||
* system pages (ttms) to the swap list.
|
||||
* This function must be called with struct ttm_bo_global::lru_lock held, and
|
||||
* is typically called immediately prior to unreserving a bo.
|
||||
*/
|
||||
extern void ttm_bo_add_to_lru(struct ttm_buffer_object *bo);
|
||||
|
||||
/**
|
||||
* ttm_bo_del_from_lru
|
||||
*
|
||||
* @bo: The buffer object.
|
||||
*
|
||||
* Remove this bo from all lru lists used to lookup and reserve an object.
|
||||
* This function must be called with struct ttm_bo_global::lru_lock held,
|
||||
* and is usually called just immediately after the bo has been reserved to
|
||||
* avoid recursive reservation from lru lists.
|
||||
*/
|
||||
extern int ttm_bo_del_from_lru(struct ttm_buffer_object *bo);
|
||||
|
||||
|
||||
/**
|
||||
* ttm_bo_lock_delayed_workqueue
|
||||
*
|
||||
|
|
|
|||
|
|
@ -179,30 +179,6 @@ struct ttm_tt {
|
|||
#define TTM_MEMTYPE_FLAG_MAPPABLE (1 << 1) /* Memory mappable */
|
||||
#define TTM_MEMTYPE_FLAG_CMA (1 << 3) /* Can't map aperture */
|
||||
|
||||
/**
|
||||
* struct ttm_mem_type_manager
|
||||
*
|
||||
* @has_type: The memory type has been initialized.
|
||||
* @use_type: The memory type is enabled.
|
||||
* @flags: TTM_MEMTYPE_XX flags identifying the traits of the memory
|
||||
* managed by this memory type.
|
||||
* @gpu_offset: If used, the GPU offset of the first managed page of
|
||||
* fixed memory or the first managed location in an aperture.
|
||||
* @size: Size of the managed region.
|
||||
* @available_caching: A mask of available caching types, TTM_PL_FLAG_XX,
|
||||
* as defined in ttm_placement_common.h
|
||||
* @default_caching: The default caching policy used for a buffer object
|
||||
* placed in this memory type if the user doesn't provide one.
|
||||
* @manager: The range manager used for this memory type. FIXME: If the aperture
|
||||
* has a page size different from the underlying system, the granularity
|
||||
* of this manager should take care of this. But the range allocating code
|
||||
* in ttm_bo.c needs to be modified for this.
|
||||
* @lru: The lru list for this memory type.
|
||||
*
|
||||
* This structure is used to identify and manage memory types for a device.
|
||||
* It's set up by the ttm_bo_driver::init_mem_type method.
|
||||
*/
|
||||
|
||||
struct ttm_mem_type_manager;
|
||||
|
||||
struct ttm_mem_type_manager_func {
|
||||
|
|
@ -287,6 +263,36 @@ struct ttm_mem_type_manager_func {
|
|||
void (*debug)(struct ttm_mem_type_manager *man, const char *prefix);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ttm_mem_type_manager
|
||||
*
|
||||
* @has_type: The memory type has been initialized.
|
||||
* @use_type: The memory type is enabled.
|
||||
* @flags: TTM_MEMTYPE_XX flags identifying the traits of the memory
|
||||
* managed by this memory type.
|
||||
* @gpu_offset: If used, the GPU offset of the first managed page of
|
||||
* fixed memory or the first managed location in an aperture.
|
||||
* @size: Size of the managed region.
|
||||
* @available_caching: A mask of available caching types, TTM_PL_FLAG_XX,
|
||||
* as defined in ttm_placement_common.h
|
||||
* @default_caching: The default caching policy used for a buffer object
|
||||
* placed in this memory type if the user doesn't provide one.
|
||||
* @func: structure pointer implementing the range manager. See above
|
||||
* @priv: Driver private closure for @func.
|
||||
* @io_reserve_mutex: Mutex optionally protecting shared io_reserve structures
|
||||
* @use_io_reserve_lru: Use an lru list to try to unreserve io_mem_regions
|
||||
* reserved by the TTM vm system.
|
||||
* @io_reserve_lru: Optional lru list for unreserving io mem regions.
|
||||
* @io_reserve_fastpath: Only use bdev::driver::io_mem_reserve to obtain
|
||||
* static information. bdev::driver::io_mem_free is never used.
|
||||
* @lru: The lru list for this memory type.
|
||||
*
|
||||
* This structure is used to identify and manage memory types for a device.
|
||||
* It's set up by the ttm_bo_driver::init_mem_type method.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
struct ttm_mem_type_manager {
|
||||
struct ttm_bo_device *bdev;
|
||||
|
||||
|
|
@ -303,6 +309,15 @@ struct ttm_mem_type_manager {
|
|||
uint32_t default_caching;
|
||||
const struct ttm_mem_type_manager_func *func;
|
||||
void *priv;
|
||||
struct mutex io_reserve_mutex;
|
||||
bool use_io_reserve_lru;
|
||||
bool io_reserve_fastpath;
|
||||
|
||||
/*
|
||||
* Protected by @io_reserve_mutex:
|
||||
*/
|
||||
|
||||
struct list_head io_reserve_lru;
|
||||
|
||||
/*
|
||||
* Protected by the global->lru_lock.
|
||||
|
|
@ -510,9 +525,12 @@ struct ttm_bo_global {
|
|||
*
|
||||
* @driver: Pointer to a struct ttm_bo_driver struct setup by the driver.
|
||||
* @man: An array of mem_type_managers.
|
||||
* @fence_lock: Protects the synchronizing members on *all* bos belonging
|
||||
* to this device.
|
||||
* @addr_space_mm: Range manager for the device address space.
|
||||
* lru_lock: Spinlock that protects the buffer+device lru lists and
|
||||
* ddestroy lists.
|
||||
* @val_seq: Current validation sequence.
|
||||
* @nice_mode: Try nicely to wait for buffer idle when cleaning a manager.
|
||||
* If a GPU lockup has been detected, this is forced to 0.
|
||||
* @dev_mapping: A pointer to the struct address_space representing the
|
||||
|
|
@ -531,6 +549,7 @@ struct ttm_bo_device {
|
|||
struct ttm_bo_driver *driver;
|
||||
rwlock_t vm_lock;
|
||||
struct ttm_mem_type_manager man[TTM_NUM_MEM_TYPES];
|
||||
spinlock_t fence_lock;
|
||||
/*
|
||||
* Protected by the vm lock.
|
||||
*/
|
||||
|
|
@ -541,6 +560,7 @@ struct ttm_bo_device {
|
|||
* Protected by the global:lru lock.
|
||||
*/
|
||||
struct list_head ddestroy;
|
||||
uint32_t val_seq;
|
||||
|
||||
/*
|
||||
* Protected by load / firstopen / lastclose /unload sync.
|
||||
|
|
@ -753,31 +773,6 @@ extern void ttm_bo_mem_put_locked(struct ttm_buffer_object *bo,
|
|||
|
||||
extern int ttm_bo_wait_cpu(struct ttm_buffer_object *bo, bool no_wait);
|
||||
|
||||
/**
|
||||
* ttm_bo_pci_offset - Get the PCI offset for the buffer object memory.
|
||||
*
|
||||
* @bo Pointer to a struct ttm_buffer_object.
|
||||
* @bus_base On return the base of the PCI region
|
||||
* @bus_offset On return the byte offset into the PCI region
|
||||
* @bus_size On return the byte size of the buffer object or zero if
|
||||
* the buffer object memory is not accessible through a PCI region.
|
||||
*
|
||||
* Returns:
|
||||
* -EINVAL if the buffer object is currently not mappable.
|
||||
* 0 otherwise.
|
||||
*/
|
||||
|
||||
extern int ttm_bo_pci_offset(struct ttm_bo_device *bdev,
|
||||
struct ttm_mem_reg *mem,
|
||||
unsigned long *bus_base,
|
||||
unsigned long *bus_offset,
|
||||
unsigned long *bus_size);
|
||||
|
||||
extern int ttm_mem_io_reserve(struct ttm_bo_device *bdev,
|
||||
struct ttm_mem_reg *mem);
|
||||
extern void ttm_mem_io_free(struct ttm_bo_device *bdev,
|
||||
struct ttm_mem_reg *mem);
|
||||
|
||||
extern void ttm_bo_global_release(struct drm_global_reference *ref);
|
||||
extern int ttm_bo_global_init(struct drm_global_reference *ref);
|
||||
|
||||
|
|
@ -809,6 +804,22 @@ extern int ttm_bo_device_init(struct ttm_bo_device *bdev,
|
|||
*/
|
||||
extern void ttm_bo_unmap_virtual(struct ttm_buffer_object *bo);
|
||||
|
||||
/**
|
||||
* ttm_bo_unmap_virtual
|
||||
*
|
||||
* @bo: tear down the virtual mappings for this BO
|
||||
*
|
||||
* The caller must take ttm_mem_io_lock before calling this function.
|
||||
*/
|
||||
extern void ttm_bo_unmap_virtual_locked(struct ttm_buffer_object *bo);
|
||||
|
||||
extern int ttm_mem_io_reserve_vm(struct ttm_buffer_object *bo);
|
||||
extern void ttm_mem_io_free_vm(struct ttm_buffer_object *bo);
|
||||
extern int ttm_mem_io_lock(struct ttm_mem_type_manager *man,
|
||||
bool interruptible);
|
||||
extern void ttm_mem_io_unlock(struct ttm_mem_type_manager *man);
|
||||
|
||||
|
||||
/**
|
||||
* ttm_bo_reserve:
|
||||
*
|
||||
|
|
@ -859,11 +870,44 @@ extern void ttm_bo_unmap_virtual(struct ttm_buffer_object *bo);
|
|||
* try again. (only if use_sequence == 1).
|
||||
* -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by
|
||||
* a signal. Release all buffer reservations and return to user-space.
|
||||
* -EBUSY: The function needed to sleep, but @no_wait was true
|
||||
* -EDEADLK: Bo already reserved using @sequence. This error code will only
|
||||
* be returned if @use_sequence is set to true.
|
||||
*/
|
||||
extern int ttm_bo_reserve(struct ttm_buffer_object *bo,
|
||||
bool interruptible,
|
||||
bool no_wait, bool use_sequence, uint32_t sequence);
|
||||
|
||||
|
||||
/**
|
||||
* ttm_bo_reserve_locked:
|
||||
*
|
||||
* @bo: A pointer to a struct ttm_buffer_object.
|
||||
* @interruptible: Sleep interruptible if waiting.
|
||||
* @no_wait: Don't sleep while trying to reserve, rather return -EBUSY.
|
||||
* @use_sequence: If @bo is already reserved, Only sleep waiting for
|
||||
* it to become unreserved if @sequence < (@bo)->sequence.
|
||||
*
|
||||
* Must be called with struct ttm_bo_global::lru_lock held,
|
||||
* and will not remove reserved buffers from the lru lists.
|
||||
* The function may release the LRU spinlock if it needs to sleep.
|
||||
* Otherwise identical to ttm_bo_reserve.
|
||||
*
|
||||
* Returns:
|
||||
* -EAGAIN: The reservation may cause a deadlock.
|
||||
* Release all buffer reservations, wait for @bo to become unreserved and
|
||||
* try again. (only if use_sequence == 1).
|
||||
* -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by
|
||||
* a signal. Release all buffer reservations and return to user-space.
|
||||
* -EBUSY: The function needed to sleep, but @no_wait was true
|
||||
* -EDEADLK: Bo already reserved using @sequence. This error code will only
|
||||
* be returned if @use_sequence is set to true.
|
||||
*/
|
||||
extern int ttm_bo_reserve_locked(struct ttm_buffer_object *bo,
|
||||
bool interruptible,
|
||||
bool no_wait, bool use_sequence,
|
||||
uint32_t sequence);
|
||||
|
||||
/**
|
||||
* ttm_bo_unreserve
|
||||
*
|
||||
|
|
@ -873,6 +917,16 @@ extern int ttm_bo_reserve(struct ttm_buffer_object *bo,
|
|||
*/
|
||||
extern void ttm_bo_unreserve(struct ttm_buffer_object *bo);
|
||||
|
||||
/**
|
||||
* ttm_bo_unreserve_locked
|
||||
*
|
||||
* @bo: A pointer to a struct ttm_buffer_object.
|
||||
*
|
||||
* Unreserve a previous reservation of @bo.
|
||||
* Needs to be called with struct ttm_bo_global::lru_lock held.
|
||||
*/
|
||||
extern void ttm_bo_unreserve_locked(struct ttm_buffer_object *bo);
|
||||
|
||||
/**
|
||||
* ttm_bo_wait_unreserved
|
||||
*
|
||||
|
|
|
|||
|
|
@ -41,7 +41,10 @@
|
|||
* @bo: refcounted buffer object pointer.
|
||||
* @new_sync_obj_arg: New sync_obj_arg for @bo, to be used once
|
||||
* adding a new sync object.
|
||||
* @reservied: Indicates whether @bo has been reserved for validation.
|
||||
* @reserved: Indicates whether @bo has been reserved for validation.
|
||||
* @removed: Indicates whether @bo has been removed from lru lists.
|
||||
* @put_count: Number of outstanding references on bo::list_kref.
|
||||
* @old_sync_obj: Pointer to a sync object about to be unreferenced
|
||||
*/
|
||||
|
||||
struct ttm_validate_buffer {
|
||||
|
|
@ -49,6 +52,9 @@ struct ttm_validate_buffer {
|
|||
struct ttm_buffer_object *bo;
|
||||
void *new_sync_obj_arg;
|
||||
bool reserved;
|
||||
bool removed;
|
||||
int put_count;
|
||||
void *old_sync_obj;
|
||||
};
|
||||
|
||||
/**
|
||||
|
|
@ -66,7 +72,6 @@ extern void ttm_eu_backoff_reservation(struct list_head *list);
|
|||
* function ttm_eu_reserve_buffers
|
||||
*
|
||||
* @list: thread private list of ttm_validate_buffer structs.
|
||||
* @val_seq: A unique sequence number.
|
||||
*
|
||||
* Tries to reserve bos pointed to by the list entries for validation.
|
||||
* If the function returns 0, all buffers are marked as "unfenced",
|
||||
|
|
@ -88,7 +93,7 @@ extern void ttm_eu_backoff_reservation(struct list_head *list);
|
|||
* has failed.
|
||||
*/
|
||||
|
||||
extern int ttm_eu_reserve_buffers(struct list_head *list, uint32_t val_seq);
|
||||
extern int ttm_eu_reserve_buffers(struct list_head *list);
|
||||
|
||||
/**
|
||||
* function ttm_eu_fence_buffer_objects.
|
||||
|
|
|
|||
|
|
@ -102,10 +102,8 @@ extern struct agp_memory *agp_allocate_memory(struct agp_bridge_data *, size_t,
|
|||
extern int agp_copy_info(struct agp_bridge_data *, struct agp_kern_info *);
|
||||
extern int agp_bind_memory(struct agp_memory *, off_t);
|
||||
extern int agp_unbind_memory(struct agp_memory *);
|
||||
extern int agp_rebind_memory(void);
|
||||
extern void agp_enable(struct agp_bridge_data *, u32);
|
||||
extern struct agp_bridge_data *agp_backend_acquire(struct pci_dev *);
|
||||
extern void agp_backend_release(struct agp_bridge_data *);
|
||||
extern void agp_flush_chipset(struct agp_bridge_data *);
|
||||
|
||||
#endif /* _AGP_BACKEND_H */
|
||||
|
|
|
|||
|
|
@ -1,20 +0,0 @@
|
|||
/*
|
||||
* Common Intel AGPGART and GTT definitions.
|
||||
*/
|
||||
#ifndef _INTEL_GTT_H
|
||||
#define _INTEL_GTT_H
|
||||
|
||||
#include <linux/agp_backend.h>
|
||||
|
||||
/* This is for Intel only GTT controls.
|
||||
*
|
||||
* Sandybridge: AGP_USER_CACHED_MEMORY default to LLC only
|
||||
*/
|
||||
|
||||
#define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2)
|
||||
#define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4)
|
||||
|
||||
/* flag for GFDT type */
|
||||
#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
|
||||
|
||||
#endif
|
||||
|
|
@ -24,5 +24,7 @@ struct kref {
|
|||
void kref_init(struct kref *kref);
|
||||
void kref_get(struct kref *kref);
|
||||
int kref_put(struct kref *kref, void (*release) (struct kref *kref));
|
||||
int kref_sub(struct kref *kref, unsigned int count,
|
||||
void (*release) (struct kref *kref));
|
||||
|
||||
#endif /* _KREF_H_ */
|
||||
|
|
|
|||
|
|
@ -33,6 +33,7 @@ struct vga_switcheroo_handler {
|
|||
void vga_switcheroo_unregister_client(struct pci_dev *dev);
|
||||
int vga_switcheroo_register_client(struct pci_dev *dev,
|
||||
void (*set_gpu_state)(struct pci_dev *dev, enum vga_switcheroo_state),
|
||||
void (*reprobe)(struct pci_dev *dev),
|
||||
bool (*can_switch)(struct pci_dev *dev));
|
||||
|
||||
void vga_switcheroo_client_fb_set(struct pci_dev *dev,
|
||||
|
|
@ -48,6 +49,7 @@ int vga_switcheroo_process_delayed_switch(void);
|
|||
static inline void vga_switcheroo_unregister_client(struct pci_dev *dev) {}
|
||||
static inline int vga_switcheroo_register_client(struct pci_dev *dev,
|
||||
void (*set_gpu_state)(struct pci_dev *dev, enum vga_switcheroo_state),
|
||||
void (*reprobe)(struct pci_dev *dev),
|
||||
bool (*can_switch)(struct pci_dev *dev)) { return 0; }
|
||||
static inline void vga_switcheroo_client_fb_set(struct pci_dev *dev, struct fb_info *info) {}
|
||||
static inline int vga_switcheroo_register_handler(struct vga_switcheroo_handler *handler) { return 0; }
|
||||
|
|
|
|||
Loading…
Reference in a new issue