From 5b4355dbc4568f7c7ddfd24681a276b7d8ea6eda Mon Sep 17 00:00:00 2001 From: Harshdeep Dhatt Date: Tue, 10 Mar 2020 17:23:10 -0600 Subject: [PATCH] msm: kgsl: Fix GPU UBWC setting for DDR 5 It needs to be 16 instead of 15. Change-Id: I14e56bfd0b86aa6f3e38af2fc4fa7c1c30adac2e Signed-off-by: Harshdeep Dhatt --- drivers/gpu/msm/adreno-gpulist.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/msm/adreno-gpulist.h b/drivers/gpu/msm/adreno-gpulist.h index e43e1b97dc9c..8d0a41a16cf1 100644 --- a/drivers/gpu/msm/adreno-gpulist.h +++ b/drivers/gpu/msm/adreno-gpulist.h @@ -1516,7 +1516,7 @@ static const struct adreno_a6xx_core adreno_gpu_core_a660 = { .veto_fal10 = true, .protected_regs = a620_protected_regs, .disable_tseskip = true, - .highest_bank_bit = 15, + .highest_bank_bit = 16, .pdc_in_aop = true, };