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smcinvoke: Add explicit cache flush during CB req from TZ
Change: During Callback request from TZ, out and in buffers needed explicit cache coherency to be performed. Change-Id: I2b2aee7dce3d75dc07576079f4b0d268488c5951 Signed-off-by: Nitesh Gupta <quic_nitegupt@quicinc.com>
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1 changed files with 7 additions and 0 deletions
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@ -1,6 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#define pr_fmt(fmt) "smcinvoke: %s: " fmt, __func__
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@ -1042,8 +1043,14 @@ static int invoke_cmd_handler(int cmd, phys_addr_t in_paddr, size_t in_buf_len,
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break;
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case SMCINVOKE_CB_RSP_CMD:
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if (legacy_smc_call)
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qtee_shmbridge_flush_shm_buf(out_shm);
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ret = qcom_scm_invoke_callback_response(virt_to_phys(out_buf), out_buf_len,
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result, response_type, data);
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if (legacy_smc_call) {
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qtee_shmbridge_inv_shm_buf(in_shm);
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qtee_shmbridge_inv_shm_buf(out_shm);
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}
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break;
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default:
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