Merge "ARM: dts: msm: Export qfprom cell to userspace for Shima"

bindings/arm/msm/qcom,qfprom-sys.yaml

@@ -0,0 +1,36 @@
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bindings/arm/msm/qcom,qfprom-sys.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. QFPROM_SYS driver binding
+
+maintainers:
+
+description: |+
+  QFPROM_SYS provides access to the nvmem cells to the user space.
+  The driver exports the cell values as sysfs entries.
+
+properties:
+  compatible:
+    const: qcom,qfprom-sys
+
+  nvmem-cell-name:
+    description: array of strings for cell names
+
+  nvmem-cells:
+    description: phandle to particular cell from provider
+
+required:
+  - compatible
+  - nvmem-cell-name
+  - nvmem-cells
+
+example:
+  - |
+    qfprom@0 {
+        compatible = "qcom,qfprom-sys";
+        nvmem-cells = <&tsens_calibration1>, <&tsens_calibration2>;
+        nvmem-cell-names = "calibration1", "calibration2";
+    };
+...

qcom/holi.dtsi

@@ -2737,6 +2737,21 @@
 			reg = <0x6028 0x4>;
 		};
 	};
+
+	qfprom_sys: qfprom@0 {
+		compatible = "qcom,qfprom-sys";
+
+		nvmem-cells = <&gpu_speed_bin>,
+			      <&adsp_variant>,
+			      <&feat_conf8>,
+			      <&gpu_gaming_bin>,
+			      <&feat_conf9>;
+		nvmem-cell-names = "gpu_speed_bin",
+				   "adsp_variant",
+				   "feat_conf8",
+				   "gpu_gaming_bin",
+				   "feat_conf9";
+	};
 };
 
 #include "holi-gpu.dtsi"

qcom/shima.dtsi

@@ -3467,6 +3467,21 @@
 		};
 	};
 
+	qfprom_sys: qfprom@0 {
+		compatible = "qcom,qfprom-sys";
+
+		nvmem-cells = <&gpu_speed_bin>,
+			      <&gpu_gaming_bin>,
+			      <&adsp_variant>,
+			      <&feat_conf_m7>,
+			      <&feat_conf_qc_spare_20_lsb>;
+		nvmem-cell-names = "gpu_speed_bin",
+				   "gpu_gaming_bin",
+				   "adsp_variant",
+				   "feat_conf_m7",
+				   "feat_conf_qc_spare_20_lsb";
+	};
+
 	wlan: qcom,cnss-qca6490@b0000000 {
 		compatible = "qcom,cnss-qca6490";
 		reg = <0xb0000000 0x10000>;