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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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[PATCH] powerpc: merge align.c
This patch merges align.c, the result isn't quite what was in ppc64 nor what was in ppc32 :) It should implement all the functionalities of both though. Kumar, since you played with that in the past, I suppose you have some test cases for verifying that it works properly before I dig out the 601 machine ? :) Since it's likely that I won't be able to test all scenario, code inspection is much welcome. Signed-off-by: Benjamin Herrenschmidt <[email protected]> Signed-off-by: Paul Mackerras <[email protected]>
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6 changed files with 280 additions and 554 deletions
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@ -90,6 +90,7 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
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#define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000)
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#define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000)
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#define CPU_FTR_BIG_PHYS ASM_CONST(0x0000000000080000)
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#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000)
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#ifdef __powerpc64__
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/* Add the 64b processor unique features in the top half of the word */
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@ -97,7 +98,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
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#define CPU_FTR_16M_PAGE ASM_CONST(0x0000000200000000)
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#define CPU_FTR_TLBIEL ASM_CONST(0x0000000400000000)
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#define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000800000000)
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#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000001000000000)
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#define CPU_FTR_IABR ASM_CONST(0x0000002000000000)
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#define CPU_FTR_MMCRA ASM_CONST(0x0000004000000000)
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#define CPU_FTR_CTRL ASM_CONST(0x0000008000000000)
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@ -113,7 +113,6 @@ extern void do_cpu_ftr_fixups(unsigned long offset);
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#define CPU_FTR_16M_PAGE ASM_CONST(0x0)
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#define CPU_FTR_TLBIEL ASM_CONST(0x0)
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#define CPU_FTR_NOEXECUTE ASM_CONST(0x0)
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#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0)
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#define CPU_FTR_IABR ASM_CONST(0x0)
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#define CPU_FTR_MMCRA ASM_CONST(0x0)
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#define CPU_FTR_CTRL ASM_CONST(0x0)
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@ -273,18 +272,21 @@ enum {
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CPU_FTRS_POWER3_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
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CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
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CPU_FTRS_POWER4_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
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CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE,
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CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_NODSISRALIGN,
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CPU_FTRS_970_32 = CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE |
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CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_ALTIVEC_COMP |
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CPU_FTR_MAYBE_CAN_NAP,
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CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN,
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CPU_FTRS_8XX = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
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CPU_FTRS_40X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
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CPU_FTRS_44X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
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CPU_FTRS_E200 = CPU_FTR_USE_TB,
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CPU_FTRS_E500 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
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CPU_FTRS_40X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
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CPU_FTR_NODSISRALIGN,
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CPU_FTRS_44X = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
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CPU_FTR_NODSISRALIGN,
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CPU_FTRS_E200 = CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN,
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CPU_FTRS_E500 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
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CPU_FTR_NODSISRALIGN,
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CPU_FTRS_E500_2 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
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CPU_FTR_BIG_PHYS,
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CPU_FTRS_GENERIC_32 = CPU_FTR_COMMON,
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CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN,
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CPU_FTRS_GENERIC_32 = CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN,
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#ifdef __powerpc64__
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CPU_FTRS_POWER3 = CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
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CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
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