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clk: gxbb: expose USB clocks
USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs. Expose these clocks to DT and comment out in clk driver. Signed-off-by: Martin Blumenstingl <[email protected]> Signed-off-by: Jerome Brunet <[email protected]> Acked-by: Stephen Boyd <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
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2 changed files with 10 additions and 5 deletions
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@ -218,12 +218,12 @@
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#define CLKID_AIU 47
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#define CLKID_UART1 48
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#define CLKID_G2D 49
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#define CLKID_USB0 50
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#define CLKID_USB1 51
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/* CLKID_USB0 */
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/* CLKID_USB1 */
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#define CLKID_RESET 52
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#define CLKID_NAND 53
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#define CLKID_DOS_PARSER 54
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#define CLKID_USB 55
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/* CLKID_USB */
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#define CLKID_VDIN1 56
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#define CLKID_AHB_ARB0 57
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#define CLKID_EFUSE 58
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@ -232,8 +232,8 @@
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#define CLKID_AHB_CTRL_BUS 61
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#define CLKID_HDMI_INTR_SYNC 62
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#define CLKID_HDMI_PCLK 63
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#define CLKID_USB1_DDR_BRIDGE 64
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#define CLKID_USB0_DDR_BRIDGE 65
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/* CLKID_USB1_DDR_BRIDGE */
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/* CLKID_USB0_DDR_BRIDGE */
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#define CLKID_MMC_PCLK 66
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#define CLKID_DVIN 67
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#define CLKID_UART2 68
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