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clk: gxbb: expose USB clocks
USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs. Expose these clocks to DT and comment out in clk driver. Signed-off-by: Martin Blumenstingl <[email protected]> Signed-off-by: Jerome Brunet <[email protected]> Acked-by: Stephen Boyd <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
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2 changed files with 10 additions and 5 deletions
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@ -14,6 +14,11 @@
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#define CLKID_MPLL2 15
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#define CLKID_SPI 34
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#define CLKID_ETH 36
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#define CLKID_USB0 50
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#define CLKID_USB1 51
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#define CLKID_USB 55
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#define CLKID_USB1_DDR_BRIDGE 64
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#define CLKID_USB0_DDR_BRIDGE 65
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#define CLKID_SD_EMMC_A 94
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#define CLKID_SD_EMMC_B 95
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#define CLKID_SD_EMMC_C 96
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