clk: gxbb: expose USB clocks

USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
Expose these clocks to DT and comment out in clk driver.

Signed-off-by: Martin Blumenstingl <[email protected]>
Signed-off-by: Jerome Brunet <[email protected]>
Acked-by: Stephen Boyd <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
This commit is contained in:
Martin Blumenstingl 2016-09-04 23:31:46 +02:00 • committed by Kevin Hilman
commit 5dbe7890e6
2 changed files with 10 additions and 5 deletions

View file

@ -14,6 +14,11 @@
#define CLKID_MPLL2 15
#define CLKID_SPI 34
#define CLKID_ETH 36
#define CLKID_USB0 50
#define CLKID_USB1 51
#define CLKID_USB 55
#define CLKID_USB1_DDR_BRIDGE 64
#define CLKID_USB0_DDR_BRIDGE 65
#define CLKID_SD_EMMC_A 94
#define CLKID_SD_EMMC_B 95
#define CLKID_SD_EMMC_C 96