disp: msm: sde: modify vig pipe linewidth

As per hardware recommendation, DMA pipe
width is reduced to 2880, while vig
pipewidth is 4096.

Change-Id: I70dbd44b4883f49879686003ba1fe9694434daab
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
This commit is contained in:
Jayaprakash 2019-06-12 14:08:47 +05:30
commit 5dff7b8301
2 changed files with 10 additions and 0 deletions

View file

@ -161,6 +161,7 @@ enum sde_prop {
SDE_OFF,
SDE_LEN,
SSPP_LINEWIDTH,
VIG_SSPP_LINEWIDTH,
MIXER_LINEWIDTH,
MIXER_BLEND,
WB_LINEWIDTH,
@ -450,6 +451,7 @@ static struct sde_prop_type sde_prop[] = {
{SDE_OFF, "qcom,sde-off", true, PROP_TYPE_U32},
{SDE_LEN, "qcom,sde-len", false, PROP_TYPE_U32},
{SSPP_LINEWIDTH, "qcom,sde-sspp-linewidth", false, PROP_TYPE_U32},
{VIG_SSPP_LINEWIDTH, "qcom,sde-vig-sspp-linewidth", false, PROP_TYPE_U32},
{MIXER_LINEWIDTH, "qcom,sde-mixer-linewidth", false, PROP_TYPE_U32},
{MIXER_BLEND, "qcom,sde-mixer-blendstages", false, PROP_TYPE_U32},
{WB_LINEWIDTH, "qcom,sde-wb-linewidth", false, PROP_TYPE_U32},
@ -1037,6 +1039,7 @@ static void _sde_sspp_setup_vig(struct sde_mdss_cfg *sde_cfg,
struct sde_sspp_cfg *sspp, struct sde_sspp_sub_blks *sblk,
bool *prop_exists, struct sde_prop_value *prop_value, u32 *vig_count)
{
sblk->maxlinewidth = sde_cfg->vig_sspp_linewidth;
sblk->maxupscale = MAX_UPSCALE_RATIO;
sblk->maxdwnscale = MAX_DOWNSCALE_RATIO;
sspp->id = SSPP_VIG0 + *vig_count;
@ -3057,6 +3060,11 @@ static int _sde_parse_prop_check(struct sde_mdss_cfg *cfg,
if (!prop_exists[SSPP_LINEWIDTH])
cfg->max_sspp_linewidth = DEFAULT_SDE_LINE_WIDTH;
cfg->vig_sspp_linewidth = PROP_VALUE_ACCESS(prop_value,
VIG_SSPP_LINEWIDTH, 0);
if (!prop_exists[VIG_SSPP_LINEWIDTH])
cfg->vig_sspp_linewidth = cfg->max_sspp_linewidth;
cfg->max_mixer_width = PROP_VALUE_ACCESS(prop_value,
MIXER_LINEWIDTH, 0);
if (!prop_exists[MIXER_LINEWIDTH])

View file

@ -1185,6 +1185,7 @@ struct sde_perf_cfg {
* register offsets, capabilities of the all MDSS HW sub-blocks.
*
* @max_sspp_linewidth max source pipe line width support.
* @vig_sspp_linewidth max vig source pipe line width support.
* @max_mixer_width max layer mixer line width support.
* @max_mixer_blendstages max layer mixer blend stages or
* supported z order
@ -1251,6 +1252,7 @@ struct sde_mdss_cfg {
u32 hwversion;
u32 max_sspp_linewidth;
u32 vig_sspp_linewidth;
u32 max_mixer_width;
u32 max_mixer_blendstages;
u32 max_wb_linewidth;