From 5eaef715d72c5bf7f6a42ed5e5724b487e9f6df5 Mon Sep 17 00:00:00 2001 From: aishpras Date: Thu, 1 Apr 2021 17:53:26 +0530 Subject: [PATCH] ARM: dts: qcom: Add qti-can device tree node Add qti-can device node for sa8195 and sa6155. Change-Id: I1dce510c999e8015104df5b4fa47939723f892c5 --- qcom/sa6155-adp-common.dtsi | 15 +++++++++++++++ qcom/sa8195p-adp-common.dtsi | 19 +++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/qcom/sa6155-adp-common.dtsi b/qcom/sa6155-adp-common.dtsi index 1b00deb39e43..8550b2ac1915 100644 --- a/qcom/sa6155-adp-common.dtsi +++ b/qcom/sa6155-adp-common.dtsi @@ -5,6 +5,21 @@ status = "ok"; }; +&qupv3_se6_spi { + status = "ok"; + can-controller@0 { + compatible = "qcom,nxp,mpc5746c"; + reg = <0>; + interrupt-parent = <&tlmm>; + interrupts = <40 0>; + spi-max-frequency = <5000000>; + qcom,clk-freq-mhz = <40000000>; + qcom,max-can-channels = <1>; + qcom,bits-per-word = <8>; + qcom,support-can-fd; + }; +}; + &soc { qcom,lpass@62400000 { status = "ok"; diff --git a/qcom/sa8195p-adp-common.dtsi b/qcom/sa8195p-adp-common.dtsi index 198a39402a3e..f15744799179 100644 --- a/qcom/sa8195p-adp-common.dtsi +++ b/qcom/sa8195p-adp-common.dtsi @@ -7,6 +7,25 @@ status = "ok"; }; +&qupv3_se0_spi { +status = "ok"; + +#address-cells = <1>; +#size-cells = <0>; + + can-controller@0 { + compatible = "qcom,nxp,mpc5746c"; + reg = <0>; + interrupt-parent = <&tlmm>; + interrupts = <38 0>; + spi-max-frequency = <5000000>; + qcom,clk-freq-mhz = <40000000>; + qcom,max-can-channels = <1>; + qcom,bits-per-word = <8>; + qcom,support-can-fd; + }; +}; + &qupv3_se12_2uart { status = "ok"; };