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iommu/arm-smmu: update debug logs for qsmmuv2 sync timeout
Add debug registers to dump in the event of sync timeout for qsmmuv2. Change-Id: I18cc3296e74ca0e2cb6f68f8aca67032d493410b Signed-off-by: Prakash Gupta <guptap@codeaurora.org>
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1 changed files with 12 additions and 1 deletions
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
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* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
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*/
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#include <linux/bitfield.h>
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@ -20,6 +20,8 @@
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#include <linux/uaccess.h>
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#define IMPL_DEF4_MICRO_MMU_CTRL 0
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#define IMPL_DEF4_CLK_ON_STATUS 0x50
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#define IMPL_DEF4_CLK_ON_CLIENT_STATUS 0x54
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#define MICRO_MMU_CTRL_LOCAL_HALT_REQ BIT(2)
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#define MICRO_MMU_CTRL_IDLE BIT(3)
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@ -193,8 +195,17 @@ static phys_addr_t qsmmuv2_iova_to_phys_hard(
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static void qsmmuv2_tlb_sync_timeout(struct arm_smmu_device *smmu)
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{
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u32 clk_on, clk_on_client;
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dev_err_ratelimited(smmu->dev,
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"TLB sync timed out -- SMMU may be deadlocked\n");
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clk_on = arm_smmu_readl(smmu, ARM_SMMU_IMPL_DEF4,
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IMPL_DEF4_CLK_ON_STATUS);
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clk_on_client = arm_smmu_readl(smmu, ARM_SMMU_IMPL_DEF4,
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IMPL_DEF4_CLK_ON_CLIENT_STATUS);
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dev_err_ratelimited(smmu->dev,
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"clk on 0x%x, clk on client 0x%x status\n",
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clk_on, clk_on_client);
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BUG_ON(IS_ENABLED(CONFIG_IOMMU_TLBSYNC_DEBUG));
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}
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