diff --git a/drivers/gpu/msm/adreno_dispatch.c b/drivers/gpu/msm/adreno_dispatch.c
index 81a3a0330905..32c42c75204d 100644
--- a/drivers/gpu/msm/adreno_dispatch.c
+++ b/drivers/gpu/msm/adreno_dispatch.c
@@ -301,7 +301,8 @@ static void _retire_timestamp(struct kgsl_drawobj *drawobj)
 
 	msm_perf_events_update(MSM_PERF_GFX, MSM_PERF_RETIRED,
 				pid_nr(context->proc_priv->pid),
-				context->id, drawobj->timestamp);
+				context->id, drawobj->timestamp,
+				!!(drawobj->flags & KGSL_DRAWOBJ_END_OF_FRAME));
 
 	/*
 	 * For A3xx we still get the rptr from the CP_RB_RPTR instead of
@@ -697,7 +698,8 @@ static int sendcmd(struct adreno_device *adreno_dev,
 
 	msm_perf_events_update(MSM_PERF_GFX, MSM_PERF_SUBMIT,
 			       pid_nr(context->proc_priv->pid),
-			       context->id, drawobj->timestamp);
+			       context->id, drawobj->timestamp,
+			       !!(drawobj->flags & KGSL_DRAWOBJ_END_OF_FRAME));
 
 	trace_adreno_cmdbatch_submitted(drawobj, &info,
 			time.ticks, (unsigned long) secs, nsecs / 1000,
@@ -1220,7 +1222,8 @@ static void _queue_drawobj(struct adreno_context *drawctxt,
 	drawctxt->queued++;
 	msm_perf_events_update(MSM_PERF_GFX, MSM_PERF_QUEUE,
 				pid_nr(context->proc_priv->pid),
-				context->id, drawobj->timestamp);
+				context->id, drawobj->timestamp,
+				!!(drawobj->flags & KGSL_DRAWOBJ_END_OF_FRAME));
 	trace_adreno_cmdbatch_queued(drawobj, drawctxt->queued);
 }
 
@@ -2341,7 +2344,8 @@ static void retire_cmdobj(struct adreno_device *adreno_dev,
 
 	msm_perf_events_update(MSM_PERF_GFX, MSM_PERF_RETIRED,
 			       pid_nr(context->proc_priv->pid),
-			       context->id, drawobj->timestamp);
+			       context->id, drawobj->timestamp,
+			       !!(drawobj->flags & KGSL_DRAWOBJ_END_OF_FRAME));
 
 	/*
 	 * For A3xx we still get the rptr from the CP_RB_RPTR instead of
diff --git a/drivers/soc/qcom/msm_performance.c b/drivers/soc/qcom/msm_performance.c
index 57aa185ac6e4..506bbdf5ce2d 100644
--- a/drivers/soc/qcom/msm_performance.c
+++ b/drivers/soc/qcom/msm_performance.c
@@ -877,7 +877,7 @@ module_param_cb(core_ctl_register, &param_ops_cc_register,
 
 void  msm_perf_events_update(enum evt_update_t update_typ,
 			enum gfx_evt_t evt_typ, pid_t pid,
-			uint32_t ctx_id, uint32_t timestamp)
+			uint32_t ctx_id, uint32_t timestamp, bool end_of_frame)
 {
 	unsigned long flags;
 	int idx = 0;
@@ -885,7 +885,8 @@ void  msm_perf_events_update(enum evt_update_t update_typ,
 	if (update_typ != MSM_PERF_GFX)
 		return;
 
-	if (pid != atomic_read(&game_status_pid) || (timestamp == 0))
+	if (pid != atomic_read(&game_status_pid) || (timestamp == 0)
+		|| !(end_of_frame))
 		return;
 
 	spin_lock_irqsave(&gfx_circ_buff_lock, flags);
diff --git a/include/soc/qcom/msm_performance.h b/include/soc/qcom/msm_performance.h
index 455d2c2b0af8..f07db6dbb5b5 100644
--- a/include/soc/qcom/msm_performance.h
+++ b/include/soc/qcom/msm_performance.h
@@ -20,10 +20,10 @@ enum evt_update_t {
 #if IS_ENABLED(CONFIG_MSM_PERFORMANCE) && IS_ENABLED(CONFIG_MSM_PERFORMANCE_QGKI)
 void msm_perf_events_update(enum evt_update_t update_typ,
 			enum gfx_evt_t evt_typ, pid_t pid,
-			uint32_t ctx_id, uint32_t timestamp);
+			uint32_t ctx_id, uint32_t timestamp, bool end_of_frame);
 #else
 static inline void msm_perf_events_update(enum evt_update_t update_typ,
 			enum gfx_evt_t evt_typ, pid_t pid,
-			uint32_t ctx_id, uint32_t timestamp){}
+			uint32_t ctx_id, uint32_t timestamp, bool end_of_frame){}
 #endif
 #endif