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ARM: dts: msm: Define console before other QUP devices

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QUP core clock is shared among all the SE drivers, during earlybootup
if any SE driver turn off the clock before real console gets probe,
the device will crash because of unclocked access by earlycon.

In order to fix this move the console device definition up in DT file
this ensures that console probe is called before other SE drivers.

Change-Id: I341940fd56890b9c6b316fd767eb79d384948efd
This commit is contained in:
Akash Asthana 2020-08-15 17:05:27 +05:30
commit 6018a83564
1 changed files with 17 additions and 17 deletions
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34
qcom/holi-qupv3.dtsi
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@ -56,6 +56,23 @@
status = "ok"
};
/* Debug UART Instance */
qupv3_se9_2uart: qcom,qup_uart@4c8c000 {
compatible = "qcom,msm-geni-console";
reg = <0x4c8c000 0x4000>;
reg-names = "se_phys";
interrupts = <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "se-clk", "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>,
<&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se9_2uart_active>;
pinctrl-1 = <&qupv3_se9_2uart_sleep>;
qcom,wrapper-core = <&qupv3_1>;
status = "disabled";
};
qupv3_se0_i2c: i2c@4a80000 {
compatible = "qcom,i2c-geni";
reg = <0x4a80000 0x4000>;
@ -285,23 +302,6 @@
status = "disabled";
};
/* Debug UART Instance */
qupv3_se9_2uart: qcom,qup_uart@4c8c000 {
compatible = "qcom,msm-geni-console";
reg = <0x4c8c000 0x4000>;
reg-names = "se_phys";
interrupts = <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "se-clk", "m-ahb", "s-ahb";
clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>,
<&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qupv3_se9_2uart_active>;
pinctrl-1 = <&qupv3_se9_2uart_sleep>;
qcom,wrapper-core = <&qupv3_1>;
status = "disabled";
};
qupv3_se10_i2c: i2c@4c90000 {
compatible = "qcom,i2c-geni";
reg = <0x4c90000 0x4000>;