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ahci: qoriq: correct the sata ecc setting error
Sata ecc is controlled by only 1 bit which is 24bit in big-endian in ecc register. So only setting 24bit to disable sata ecc prevents other bits from being overwritten in ecc register. Signed-off-by: Tang Yuantian <[email protected]> Signed-off-by: Tejun Heo <[email protected]>
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parent
0580b762a4
commit
6022c5cadf
1 changed files with 4 additions and 2 deletions
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@ -177,7 +177,8 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
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case AHCI_LS1043A:
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if (!qpriv->ecc_addr)
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return -EINVAL;
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writel(ECC_DIS_ARMV8_CH2, qpriv->ecc_addr);
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writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2,
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qpriv->ecc_addr);
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writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
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writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
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if (qpriv->is_dmacoherent)
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@ -194,7 +195,8 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
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case AHCI_LS1046A:
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if (!qpriv->ecc_addr)
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return -EINVAL;
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writel(ECC_DIS_ARMV8_CH2, qpriv->ecc_addr);
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writel(readl(qpriv->ecc_addr) | ECC_DIS_ARMV8_CH2,
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qpriv->ecc_addr);
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writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
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writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
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if (qpriv->is_dmacoherent)
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