From 606af3eccbbed72e13aa9762fbe5a85969cae01a Mon Sep 17 00:00:00 2001 From: Prasada Rao Durvasula Date: Wed, 18 Sep 2019 20:00:48 +0530 Subject: [PATCH] soc: qcom: Add add cpu idle v7 support for mdm9607 This is snapshot of idle v7 as of msm-3.18.c8. 'commit 69da6b6721b'. Change-Id: I01adeac3d8b53b855300a3a12714e035b758a8c4 Signed-off-by: Prasada Rao Durvasula Signed-off-by: Suresh Kumar Allam Signed-off-by: Shiva Niranjan Signed-off-by: Sivasri Kumar Vanka Signed-off-by: Raghavendra Kakarla Signed-off-by: Tushar Nimkar --- drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/idle-v7.S | 57 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 58 insertions(+) create mode 100644 drivers/soc/qcom/idle-v7.S diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index 16eb908971bf..4793fa130fbe 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -113,3 +113,4 @@ obj-$(CONFIG_QCOM_ADSP_MANUAL_VOTE) += adsp_vote_qmi.o adsp_lpm_voting_v01.o obj-$(CONFIG_MSM_SLATECOM) += slatecom_spi.o obj-$(CONFIG_MSM_SLATECOM_INTERFACE) += slatecom_interface.o obj-$(CONFIG_QCOM_AOP_SET_DDR) += aop-set-ddr.o +obj-$(CONFIG_CPU_V7) += idle-v7.o diff --git a/drivers/soc/qcom/idle-v7.S b/drivers/soc/qcom/idle-v7.S new file mode 100644 index 000000000000..b6a8f00ed90e --- /dev/null +++ b/drivers/soc/qcom/idle-v7.S @@ -0,0 +1,57 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2007 Google, Inc. + * Copyright (c) 2007-2009, 2011-2014, 2019, 2021 The Linux Foundation. All rights reserved. + */ + +#include +#include +#include + + .arm +ENTRY(msm_pm_boot_entry) +THUMB( adr r9, BSYM(2f) ) /* Kernel is always entered in ARM. */ +THUMB( bx r9 ) /* If this is a Thumb-2 kernel, */ +THUMB( .thumb ) /* switch to Thumb now. */ +THUMB(2: ) + mrc p15, 0, r0, c0, c0, 5 /* MPIDR */ + bic r0, #0xff000000 /* what CPU am I */ + bic r0, #0x00ff0000 /* clear bits 31-16 */ + + adr r3, 3f + ldr r1, [r3] + sub r3, r1, r3 /* r3 holds the virt to phy offset */ + ldr r1, =msm_pc_debug_counters_phys /* phys addr for IMEM reg */ + sub r1, r1, r3 /* translate virt to phys */ + ldr r1,[r1] + cmp r1, #0 + beq skip_pc_debug3 + mov r2, r0, lsr #8 /* get cluster num */ + add r1, r1, r2, lsl #6 /* get offset of cluster */ + and r2, r0, #0xff + add r1, r1, r2, lsl #4 /* get offset for the cpu */ + add r1, #4 /* warmboot entry counter */ + ldr r2, [r1] + add r2, #1 + str r2, [r1] +skip_pc_debug3: + ldr r1, =msm_pm_boot_vector + sub r1, r1, r3 /* translate virt to phys */ + mov r2, r0, lsr #8 /* get cluster num */ + add r1, r1, r2, lsl #4 /* Get offset for the cluster */ + and r0, r0, #0xff /* cpu id */ + add r1, r1, r0, lsl #2 /* Get offset for the cpu */ + ldr pc, [r1] /* jump */ +ENDPROC(msm_pm_boot_entry) + +3: .long . + + .data + + .globl msm_pm_boot_vector +msm_pm_boot_vector: + .space 4 * 4 * 4 + + .globl msm_pc_debug_counters_phys +msm_pc_debug_counters_phys: + .long 0x0