diff --git a/qcom/scuba-iot.dtsi b/qcom/scuba-iot.dtsi
index 4e20bf61373f..b60a58d63561 100644
--- a/qcom/scuba-iot.dtsi
+++ b/qcom/scuba-iot.dtsi
@@ -1004,6 +1004,31 @@ dcc: dcc_v2@1be2000 {
 		qcom,ea-pc = <0x360>;
 		status = "ok";
 	};
+	qcom,venus@5ab0000 {
+		compatible = "qcom,pil-tz-generic";
+		reg = <0x5ab0000 0x20000>;
+
+		vdd-supply = <&gcc_venus_gdsc>;
+		qcom,proxy-reg-names = "vdd";
+
+		clocks = <&gcc GCC_VIDEO_VENUS_CTL_CLK>,
+			<&gcc GCC_VENUS_CTL_AXI_CLK>,
+			<&gcc GCC_VIDEO_AHB_CLK>,
+			<&gcc GCC_VIDEO_THROTTLE_CORE_CLK>;
+		clock-names = "core_clk", "bus_clk", "iface_clk", "throttle_clk";
+		qcom,proxy-clock-names = "core_clk", "bus_clk", "iface_clk", "throttle_clk";
+
+		qcom,core-freq = <240000000>;
+		qcom,ahb-freq = <240000000>;
+
+		qcom,pas-id = <9>;
+		interconnect-names = "pil-venus";
+		interconnects = <&mmnrt_virt MASTER_VIDEO_P0
+					&bimc SLAVE_EBI_CH0>;
+		qcom,proxy-timeout-ms = <100>;
+		qcom,firmware-name = "venus";
+		memory-region = <&pil_video_mem>;
+	};
 };
 
 #include "pm2250.dtsi"
@@ -1013,6 +1038,7 @@ dcc: dcc_v2@1be2000 {
 #include "scuba-ion.dtsi"
 #include "msm-arm-smmu-scuba.dtsi"
 #include "scuba-audio.dtsi"
+#include "scuba-vidc.dtsi"
 
 &qupv3_se1_i2c {
 	#address-cells = <1>;
diff --git a/qcom/scuba-vidc.dtsi b/qcom/scuba-vidc.dtsi
new file mode 100644
index 000000000000..faa99d78252a
--- /dev/null
+++ b/qcom/scuba-vidc.dtsi
@@ -0,0 +1,88 @@
+&soc {
+	msm_vidc: qcom,vidc@5a00000 {
+		compatible = "qcom,msm-vidc", "qcom,scuba-vidc";
+		status = "ok";
+		reg = <0x5a00000 0x200000>;
+		interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
+
+		/* Supply */
+		venus-supply = <&gcc_venus_gdsc>;
+		venus-core0-supply = <&gcc_vcodec0_gdsc>;
+
+		/* Clocks */
+		clock-names = "core_clk", "iface_clk", "bus_clk",
+			"core0_clk", "core0_bus_clk", "throttle_clk";
+		clocks = <&gcc GCC_VIDEO_VENUS_CTL_CLK>,
+			<&gcc GCC_VIDEO_AHB_CLK>,
+			<&gcc GCC_VENUS_CTL_AXI_CLK>,
+			<&gcc GCC_VIDEO_VCODEC0_SYS_CLK>,
+			<&gcc GCC_VCODEC0_AXI_CLK>,
+			<&gcc GCC_VIDEO_THROTTLE_CORE_CLK>;
+		qcom,proxy-clock-names = "core_clk", "iface_clk", "bus_clk",
+			"core0_clk", "core0_bus_clk", "throttle_clk";
+		qcom,clock-configs = <0x1 0x0 0x0 0x1 0x0 0x0>;
+		qcom,allowed-clock-rates = <133330000 240000000>;
+
+		/* Bus Interconnects */
+		interconnect-names = "venus-cnoc", "venus-ddr";
+		interconnects = <&bimc MASTER_AMPSS_M0
+			&config_noc SLAVE_VENUS_CFG>,
+			<&mmnrt_virt MASTER_VIDEO_P0
+			&bimc SLAVE_EBI_CH0>;
+
+		/* Bus BW range (low, high) for each bus */
+		qcom,bus-range-kbps = <1000 1000
+					1000 2128000>;
+		/* MMUs */
+		non_secure_cb {
+			compatible = "qcom,msm-vidc,context-bank";
+			label = "venus_ns";
+			iommus =
+				<&apps_smmu 0x860 0x00>,
+				<&apps_smmu 0x880 0x00>;
+			qcom,iommu-dma-addr-pool = <0x70800000 0x6f800000>;
+			qcom,iommu-faults = "non-fatal";
+			buffer-types = <0xfff>;
+			virtual-addr-pool = <0x70800000 0x6f800000>;
+		};
+
+		secure_bitstream_cb {
+			compatible = "qcom,msm-vidc,context-bank";
+			label = "venus_sec_bitstream";
+			iommus =
+				<&apps_smmu 0x861 0x04>;
+			qcom,iommu-dma-addr-pool = <0x4b000000 0x25800000>;
+			qcom,iommu-faults = "non-fatal";
+			qcom,iommu-vmid = <0x9>; /*VMID_CP_BITSTREAM*/
+			buffer-types = <0x241>;
+			virtual-addr-pool = <0x4b000000 0x25800000>;
+			qcom,secure-context-bank;
+		};
+
+		secure_pixel_cb {
+			compatible = "qcom,msm-vidc,context-bank";
+			label = "venus_sec_pixel";
+			iommus =
+				<&apps_smmu 0x863 0x0>;
+			qcom,iommu-dma-addr-pool = <0x25800000 0x25800000>;
+			qcom,iommu-faults = "non-fatal";
+			qcom,iommu-vmid = <0xA>; /*VMID_CP_PIXEL*/
+			buffer-types = <0x106>;
+			virtual-addr-pool = <0x25800000 0x25800000>;
+			qcom,secure-context-bank;
+		};
+
+		secure_non_pixel_cb {
+			compatible = "qcom,msm-vidc,context-bank";
+			label = "venus_sec_non_pixel";
+			iommus =
+				<&apps_smmu 0x804 0xE0>;
+			qcom,iommu-dma-addr-pool = <0x1000000 0x24800000>;
+			qcom,iommu-faults = "non-fatal";
+			qcom,iommu-vmid = <0xB>; /*VMID_CP_NON_PIXEL*/
+			buffer-types = <0x480>;
+			virtual-addr-pool = <0x1000000 0x24800000>;
+			qcom,secure-context-bank;
+		};
+	};
+};