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ARM: dts: msm: Enable smmu s1 for blsp bam on sdxlemur V2

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Enable smmu s1 for blsp bam DMA engine on sdxlemur V2.

Change-Id: I66b47f45832d4ce748d1badae685ed20a0da10c5
This commit is contained in:
Anvesh Salveru 2021-10-16 22:33:48 +05:30 • committed by Gerrit - the friendly Code Review server
commit 6204011840
1 changed files with 14 additions and 0 deletions
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14
qcom/sdxlemur-v2.dtsi
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@ -6,6 +6,20 @@
qcom,msm-id = <458 0x20000>, <483 0x20000>, <509 0x20000>;
};
/* Overriding the BAM node to enable SMMU S1 support in sdxlemur V2
* Adding i2c SID's in BAM node, as descriptors buffers for i2c
* usecase are allocated in BAM DMA driver.
*/
&dma_blsp1 {
iommus = <&apps_smmu 0x148 0x1>,
<&apps_smmu 0x14a 0x1>,
<&apps_smmu 0x14c 0x1>,
<&apps_smmu 0x14e 0x1>;
qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;
qcom,iommu-geometry = <0x40000000 0x10000000>;
qcom,iommu-dma = "fastmap";
};
&i2c_1 {
iommus = <&apps_smmu 0x148 0x1>;
qcom,iommu-dma-addr-pool = <0x40000000 0x10000000>;