ARM: dts: msm: add interconnect devices for sm8150

Add stub interconnect devices for aggre1_noc, aggre2_noc,
camnoc_virt, compute_noc, config_noc, dc_noc, gem_noc,
ipa_virt, mc_virt, mmss_noc, system_noc, gem_noc_display,
mc_virt_display, mmss_noc_display. This will allow consumers
to get their path and set bandwidth constraints on them.
And add bcm voter devices that live under RSC devices
to allow interconnect providers to target their votes
for meeting bandwidth constraints.

Change-Id: I6c46d36928ecfbeaa5b568a61d3dfee9e9e0349d
This commit is contained in:
Veera Vegivada 2020-03-02 16:08:59 +05:30
commit 6236ec35c7

View file

@ -6,6 +6,8 @@
#include <dt-bindings/clock/qcom,npucc-sm8150.h>
#include <dt-bindings/clock/qcom,scc-sm8150.h>
#include <dt-bindings/clock/qcom,videocc-sm8150.h>
#include <dt-bindings/interconnect/qcom,icc.h>
#include <dt-bindings/interconnect/qcom,sm8150.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/clock/qcom,rpmh.h>
@ -681,6 +683,10 @@
<WAKE_TCS 3>,
<CONTROL_TCS 1>;
apps_bcm_voter: bcm_voter {
compatible = "qcom,bcm-voter";
};
rpmhcc: clock-controller {
compatible = "qcom,sm8150-rpmh-clk";
#clock-cells = <1>;
@ -707,6 +713,11 @@
<ACTIVE_TCS 2>,
<CONTROL_TCS 0>;
disp_bcm_voter: bcm_voter {
compatible = "qcom,bcm-voter";
qcom,tcs-wait = <QCOM_ICC_TAG_AMC>;
};
};
aopcc: qcom,aopcc {
@ -835,6 +846,94 @@
#clock-cells = <1>;
};
config_noc: interconnect@1500000 {
reg = <0x1500000 0x7400>;
compatible = "qcom,sm8150-config_noc";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
system_noc: interconnect@1620000 {
reg = <0x1620000 0x19400>;
compatible = "qcom,sm8150-system_noc";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
camnoc_virt: interconnect@1630000 {
compatible = "qcom,sm8150-camnoc_virt";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
ipa_virt: interconnect@1640000 {
compatible = "qcom,sm8150-ipa_virt";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc: interconnect@16e0000 {
reg = <0x16E0000 0xD080>;
compatible = "qcom,sm8150-aggre1_noc";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
<&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>;
};
aggre2_noc: interconnect@1700000 {
reg = <0x1700000 0x3B100>;
compatible = "qcom,sm8150-aggre2_noc";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
compute_noc: interconnect@1710000 {
compatible = "qcom,sm8150-compute_noc";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
mmss_noc: interconnect@1740000 {
reg = <0x1740000 0x1C100>;
compatible = "qcom,sm8150-mmss_noc";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos", "disp";
qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;
};
dc_noc: interconnect@9160000 {
reg = <0x9160000 0x3200>;
compatible = "qcom,sm8150-dc_noc";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos";
qcom,bcm-voters = <&apps_bcm_voter>;
};
gem_noc: interconnect@9680000 {
reg = <0x9680000 0x3E200>;
compatible = "qcom,sm8150-gem_noc";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos", "disp";
qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;
};
mc_virt: interconnect@9690000 {
compatible = "qcom,sm8150-mc_virt";
#interconnect-cells = <1>;
qcom,bcm-voter-names = "hlos", "disp";
qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;
};
qupv3_id_1: geniqup@ac0000 {
compatible = "qcom,geni-se-qup";
reg = <0x00ac0000 0x6000>;