ARM: dts: msm: update ddr mapping table for shima target

Update ddr mapping table for cpu7 latfloor and cpu0-llcc-ddr-lat
voting device.

Change-Id: I9f2249bb7ae44665627379bb887a2490d2882d01
This commit is contained in:
Santosh Mardi 2020-10-12 17:49:15 +05:30 • committed by Gerrit - the friendly Code Review server
commit 624a78e9e3

View file

@ -2550,7 +2550,6 @@
ddr4-map {
qcom,ddr-type = <DDR_TYPE_LPDDR4X>;
qcom,core-dev-table =
< 691200 MHZ_TO_MBPS( 300, 4) >,
< 940800 MHZ_TO_MBPS( 451, 4) >,
< 1171200 MHZ_TO_MBPS( 547, 4) >,
< 1516800 MHZ_TO_MBPS( 768, 4) >,
@ -2560,7 +2559,6 @@
ddr5-map {
qcom,ddr-type = <DDR_TYPE_LPDDR5>;
qcom,core-dev-table =
< 691200 MHZ_TO_MBPS( 300, 4) >,
< 940800 MHZ_TO_MBPS( 451, 4) >,
< 1171200 MHZ_TO_MBPS( 547, 4) >,
< 1516800 MHZ_TO_MBPS( 768, 4) >,
@ -2667,14 +2665,14 @@
ddr4-map {
qcom,ddr-type = <DDR_TYPE_LPDDR4X>;
qcom,core-dev-table =
< 2361600 MHZ_TO_MBPS( 300, 4) >,
< 2361600 MHZ_TO_MBPS( 451, 4) >,
< 2707200 MHZ_TO_MBPS(2133, 4) >;
};
ddr5-map {
qcom,ddr-type = <DDR_TYPE_LPDDR5>;
qcom,core-dev-table =
< 2361600 MHZ_TO_MBPS( 300, 4) >,
< 2361600 MHZ_TO_MBPS( 451, 4) >,
< 2707200 MHZ_TO_MBPS(3196, 4) >;
};
};