mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-14 00:24:41 -04:00
qcacld-3.0: Add ini keys for WRR tx scheduler tuning
qcacld-2.0 to qcacld-3.0 propagation Add below four keys to allow user to tune WRR TX scheduler params. Each key is mapping to one AC defined in data path module through OL_TX_SCHED_WRR_ADV_CAT_CFG_SPEC. gEnableTxSchedWrrBE gEnableTxSchedWrrBK gEnableTxSchedWrrVI gEnableTxSchedWrrVO Change-Id: I5c34b604297d83673ea065243cc58c3f2180ff3e CRs-Fixed: 1020141
This commit is contained in:
parent
bfaf75019b
commit
62edd7e2db
9 changed files with 465 additions and 0 deletions
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@ -27,6 +27,9 @@
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#if !defined(__CDS_CONFIG_H)
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#define __CDS_CONFIG_H
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#include "osdep.h"
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#include "cdp_txrx_mob_def.h"
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/**
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* enum driver_type - Indicate the driver type to the cds, and based on this
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* do appropriate initialization.
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@ -148,5 +151,7 @@ struct cds_config_info {
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bool flow_steering_enabled;
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bool self_recovery_enabled;
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bool fw_timeout_crash;
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struct ol_tx_sched_wrr_ac_specs_t ac_specs[TX_WMM_AC_NUM];
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};
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#endif /* !defined( __CDS_CONFIG_H ) */
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@ -243,6 +243,8 @@ typedef struct _cds_context_type {
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/* This is to track if HW mode change is in progress */
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uint32_t hw_mode_change_in_progress;
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struct ol_tx_sched_wrr_ac_specs_t ac_specs[TX_WMM_AC_NUM];
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} cds_context_type, *p_cds_contextType;
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/*---------------------------------------------------------------------------
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@ -169,6 +169,39 @@ void cds_tdls_tx_rx_mgmt_event(uint8_t event_id, uint8_t tx_rx,
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}
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#endif
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/**
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* cds_cfg_update_ac_specs_params() - update ac_specs params
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* @olcfg: cfg handle
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* @mac_params: mac params
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*
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* Return: none
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*/
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static void
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cds_cfg_update_ac_specs_params(struct txrx_pdev_cfg_param_t *olcfg,
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struct cds_config_info *cds_cfg)
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{
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int i;
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if (NULL == olcfg)
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return;
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if (NULL == cds_cfg)
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return;
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for (i = 0; i < OL_TX_NUM_WMM_AC; i++) {
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olcfg->ac_specs[i].wrr_skip_weight =
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cds_cfg->ac_specs[i].wrr_skip_weight;
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olcfg->ac_specs[i].credit_threshold =
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cds_cfg->ac_specs[i].credit_threshold;
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olcfg->ac_specs[i].send_limit =
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cds_cfg->ac_specs[i].send_limit;
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olcfg->ac_specs[i].credit_reserve =
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cds_cfg->ac_specs[i].credit_reserve;
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olcfg->ac_specs[i].discard_weight =
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cds_cfg->ac_specs[i].discard_weight;
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}
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}
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/**
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* cds_cdp_cfg_attach() - attach data path config module
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* @cds_cfg: generic platform level config instance
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@ -191,6 +224,7 @@ static void cds_cdp_cfg_attach(struct cds_config_info *cds_cfg)
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cds_cfg->ip_tcp_udp_checksum_offload;
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cdp_cfg.ce_classify_enabled = cds_cfg->ce_classify_enabled;
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cds_cfg_update_ac_specs_params(&cdp_cfg, cds_cfg);
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gp_cds_context->cfg_ctx = cdp_cfg_attach(soc, gp_cds_context->qdf_ctx,
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(void *)(&cdp_cfg));
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if (!gp_cds_context->cfg_ctx) {
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@ -259,6 +293,35 @@ static QDF_STATUS cds_deregister_all_modules(void)
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return status;
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}
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/**
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* cds_set_ac_specs_params() - set ac_specs params in cds_config_info
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* @cds_cfg: Pointer to cds_config_info
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* @hdd_ctx: Pointer to hdd context
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*
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* Return: none
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*/
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static void
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cds_set_ac_specs_params(struct cds_config_info *cds_cfg)
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{
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int i;
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cds_context_type *cds_ctx;
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if (NULL == cds_cfg)
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return;
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cds_ctx = cds_get_context(QDF_MODULE_ID_QDF);
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if (!cds_ctx) {
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QDF_TRACE(QDF_MODULE_ID_QDF, QDF_TRACE_LEVEL_ERROR,
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"Invalid CDS Context");
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return;
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}
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for (i = 0; i < OL_TX_NUM_WMM_AC; i++) {
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cds_cfg->ac_specs[i] = cds_ctx->ac_specs[i];
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}
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}
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/**
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* cds_open() - open the CDS Module
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*
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@ -452,6 +515,8 @@ QDF_STATUS cds_open(struct wlan_objmgr_psoc *psoc)
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gp_cds_context->htc_ctx, gp_cds_context->qdf_ctx,
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&dp_ol_if_ops);
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cds_set_ac_specs_params(cds_cfg);
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cds_cdp_cfg_attach(cds_cfg);
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/* Now proceed to open the MAC */
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@ -39,6 +39,7 @@
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#endif
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#include "ol_txrx_ctrl_api.h" /* txrx_pdev_cfg_param_t */
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#include <cdp_txrx_handle.h>
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/**
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* @brief format of data frames delivered to/from the WLAN driver by/to the OS
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*/
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@ -94,6 +95,8 @@ struct txrx_pdev_cfg_t {
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uint32_t tx_flow_start_queue_offset;
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#endif
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bool flow_steering_enabled;
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struct ol_tx_sched_wrr_ac_specs_t ac_specs[TX_WMM_AC_NUM];
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};
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/**
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@ -637,4 +640,49 @@ static inline uint8_t ol_cfg_is_flow_steering_enabled(struct cdp_cfg *cfg_pdev)
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return cfg->flow_steering_enabled;
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}
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/**
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* ol_cfg_get_wrr_skip_weight() - brief Query for the param of wrr_skip_weight
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* @pdev: handle to the physical device.
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* @ac: access control, it will be BE, BK, VI, VO
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*
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* Return: wrr_skip_weight for specified ac.
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*/
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int ol_cfg_get_wrr_skip_weight(ol_pdev_handle pdev, int ac);
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/**
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* ol_cfg_get_credit_threshold() - Query for the param of credit_threshold
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* @pdev: handle to the physical device.
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* @ac: access control, it will be BE, BK, VI, VO
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*
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* Return: credit_threshold for specified ac.
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*/
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uint32_t ol_cfg_get_credit_threshold(ol_pdev_handle pdev, int ac);
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/**
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* ol_cfg_get_send_limit() - Query for the param of send_limit
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* @pdev: handle to the physical device.
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* @ac: access control, it will be BE, BK, VI, VO
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*
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* Return: send_limit for specified ac.
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*/
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uint16_t ol_cfg_get_send_limit(ol_pdev_handle pdev, int ac);
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/**
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* ol_cfg_get_credit_reserve() - Query for the param of credit_reserve
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* @pdev: handle to the physical device.
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* @ac: access control, it will be BE, BK, VI, VO
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*
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* Return: credit_reserve for specified ac.
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*/
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int ol_cfg_get_credit_reserve(ol_pdev_handle pdev, int ac);
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/**
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* ol_cfg_get_discard_weight() - Query for the param of discard_weight
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* @pdev: handle to the physical device.
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* @ac: access control, it will be BE, BK, VI, VO
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*
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* Return: discard_weight for specified ac.
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*/
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int ol_cfg_get_discard_weight(ol_pdev_handle pdev, int ac);
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#endif /* _OL_CFG__H_ */
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@ -103,6 +103,7 @@ struct cdp_cfg *ol_pdev_cfg_attach(qdf_device_t osdev, void *pcfg_param)
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{
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struct txrx_pdev_cfg_param_t *cfg_param = pcfg_param;
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struct txrx_pdev_cfg_t *cfg_ctx;
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int i;
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cfg_ctx = qdf_mem_malloc(sizeof(*cfg_ctx));
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if (!cfg_ctx) {
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@ -144,6 +145,20 @@ struct cdp_cfg *ol_pdev_cfg_attach(qdf_device_t osdev, void *pcfg_param)
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cfg_ctx->ce_classify_enabled = cfg_param->ce_classify_enabled;
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ol_tx_set_flow_control_parameters((struct cdp_cfg *)cfg_ctx, cfg_param);
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for (i = 0; i < OL_TX_NUM_WMM_AC; i++) {
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cfg_ctx->ac_specs[i].wrr_skip_weight =
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cfg_param->ac_specs[i].wrr_skip_weight;
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cfg_ctx->ac_specs[i].credit_threshold =
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cfg_param->ac_specs[i].credit_threshold;
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cfg_ctx->ac_specs[i].send_limit =
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cfg_param->ac_specs[i].send_limit;
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cfg_ctx->ac_specs[i].credit_reserve =
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cfg_param->ac_specs[i].credit_reserve;
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cfg_ctx->ac_specs[i].discard_weight =
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cfg_param->ac_specs[i].discard_weight;
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}
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return (struct cdp_cfg *)cfg_ctx;
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}
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@ -388,3 +403,88 @@ bool ol_cfg_is_ce_classify_enabled(struct cdp_cfg *cfg_pdev)
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struct txrx_pdev_cfg_t *cfg = (struct txrx_pdev_cfg_t *)cfg_pdev;
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return cfg->ce_classify_enabled;
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}
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/**
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* ol_cfg_get_wrr_skip_weight() - brief Query for the param of wrr_skip_weight
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* @pdev: handle to the physical device.
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* @ac: access control, it will be BE, BK, VI, VO
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*
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* Return: wrr_skip_weight for specified ac.
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*/
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int ol_cfg_get_wrr_skip_weight(ol_pdev_handle pdev, int ac)
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{
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struct txrx_pdev_cfg_t *cfg = (struct txrx_pdev_cfg_t *)pdev;
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if (ac >= OL_TX_WMM_AC_BE && ac <= OL_TX_WMM_AC_VO)
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return cfg->ac_specs[ac].wrr_skip_weight;
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return 0;
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}
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/**
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* ol_cfg_get_credit_threshold() - Query for the param of credit_threshold
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* @pdev: handle to the physical device.
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* @ac: access control, it will be BE, BK, VI, VO
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*
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* Return: credit_threshold for specified ac.
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*/
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uint32_t ol_cfg_get_credit_threshold(ol_pdev_handle pdev, int ac)
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{
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struct txrx_pdev_cfg_t *cfg = (struct txrx_pdev_cfg_t *)pdev;
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if (ac >= OL_TX_WMM_AC_BE && ac <= OL_TX_WMM_AC_VO)
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return cfg->ac_specs[ac].credit_threshold;
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return 0;
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}
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/**
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* ol_cfg_get_send_limit() - Query for the param of send_limit
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* @pdev: handle to the physical device.
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* @ac: access control, it will be BE, BK, VI, VO
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*
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* Return: send_limit for specified ac.
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*/
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uint16_t ol_cfg_get_send_limit(ol_pdev_handle pdev, int ac)
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{
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struct txrx_pdev_cfg_t *cfg = (struct txrx_pdev_cfg_t *)pdev;
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if (ac >= OL_TX_WMM_AC_BE && ac <= OL_TX_WMM_AC_VO)
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return cfg->ac_specs[ac].send_limit;
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return 0;
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}
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/**
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* ol_cfg_get_credit_reserve() - Query for the param of credit_reserve
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* @pdev: handle to the physical device.
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* @ac: access control, it will be BE, BK, VI, VO
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*
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* Return: credit_reserve for specified ac.
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*/
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int ol_cfg_get_credit_reserve(ol_pdev_handle pdev, int ac)
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{
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struct txrx_pdev_cfg_t *cfg = (struct txrx_pdev_cfg_t *)pdev;
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if (ac >= OL_TX_WMM_AC_BE && ac <= OL_TX_WMM_AC_VO)
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return cfg->ac_specs[ac].credit_reserve;
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return 0;
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}
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/**
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* ol_cfg_get_discard_weight() - Query for the param of discard_weight
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* @pdev: handle to the physical device.
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* @ac: access control, it will be BE, BK, VI, VO
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*
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* Return: discard_weight for specified ac.
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*/
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int ol_cfg_get_discard_weight(ol_pdev_handle pdev, int ac)
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{
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struct txrx_pdev_cfg_t *cfg = (struct txrx_pdev_cfg_t *)pdev;
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if (ac >= OL_TX_WMM_AC_BE && ac <= OL_TX_WMM_AC_VO)
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return cfg->ac_specs[ac].discard_weight;
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return 0;
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}
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@ -1009,6 +1009,72 @@ ol_tx_sched_category_info_wrr_adv(
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*bytes = category->state.bytes;
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}
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/**
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* ol_tx_sched_wrr_param_update() - update the WRR TX sched params
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* @pdev: Pointer to PDEV structure.
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* @scheduler: Pointer to tx scheduler.
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*
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* Update the WRR TX schedule parameters for each category if it is
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* specified in the ini file by user.
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*
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* Return: none
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*/
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void ol_tx_sched_wrr_param_update(struct ol_txrx_pdev_t *pdev,
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struct ol_tx_sched_wrr_adv_t *scheduler)
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{
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int i;
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static const char * const tx_sched_wrr_name[4] = {
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"BE",
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"BK",
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"VI",
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"VO"
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};
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if (NULL == scheduler)
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return;
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QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
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"%s: Tuning the TX scheduler wrr parameters by ini file:",
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__func__);
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QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
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" skip credit limit credit disc");
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for (i = OL_TX_SCHED_WRR_ADV_CAT_BE;
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i <= OL_TX_SCHED_WRR_ADV_CAT_VO; i++) {
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if (ol_cfg_get_wrr_skip_weight(pdev->ctrl_pdev, i)) {
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scheduler->categories[i].specs.wrr_skip_weight =
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ol_cfg_get_wrr_skip_weight(pdev->ctrl_pdev, i);
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scheduler->categories[i].specs.credit_threshold =
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ol_cfg_get_credit_threshold(pdev->ctrl_pdev, i);
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scheduler->categories[i].specs.send_limit =
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ol_cfg_get_send_limit(pdev->ctrl_pdev, i);
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scheduler->categories[i].specs.credit_reserve =
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ol_cfg_get_credit_reserve(pdev->ctrl_pdev, i);
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scheduler->categories[i].specs.discard_weight =
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ol_cfg_get_discard_weight(pdev->ctrl_pdev, i);
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QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
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"%s-update: %d, %d, %d, %d, %d",
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tx_sched_wrr_name[i],
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scheduler->categories[i].specs.wrr_skip_weight,
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scheduler->categories[i].specs.credit_threshold,
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scheduler->categories[i].specs.send_limit,
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scheduler->categories[i].specs.credit_reserve,
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scheduler->categories[i].specs.discard_weight);
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} else {
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QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO,
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"%s-orig: %d, %d, %d, %d, %d",
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tx_sched_wrr_name[i],
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scheduler->categories[i].specs.wrr_skip_weight,
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scheduler->categories[i].specs.credit_threshold,
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scheduler->categories[i].specs.send_limit,
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scheduler->categories[i].specs.credit_reserve,
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scheduler->categories[i].specs.discard_weight);
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}
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}
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}
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void *
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ol_tx_sched_init_wrr_adv(
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struct ol_txrx_pdev_t *pdev)
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@ -1030,6 +1096,8 @@ ol_tx_sched_init_wrr_adv(
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OL_TX_SCHED_WRR_ADV_CAT_CFG_STORE(MCAST_DATA, scheduler);
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OL_TX_SCHED_WRR_ADV_CAT_CFG_STORE(MCAST_MGMT, scheduler);
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ol_tx_sched_wrr_param_update(pdev, scheduler);
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for (i = 0; i < OL_TX_SCHED_WRR_ADV_NUM_CATEGORIES; i++) {
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scheduler->categories[i].state.active = 0;
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scheduler->categories[i].state.frms = 0;
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@ -47,6 +47,8 @@
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#include <wmi_unified.h>
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#define FW_MODULE_LOG_LEVEL_STRING_LENGTH (255)
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#define TX_SCHED_WRR_PARAM_STRING_LENGTH (50)
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#define TX_SCHED_WRR_PARAMS_NUM (5)
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#define CFG_ENABLE_RX_THREAD (1 << 0)
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#define CFG_ENABLE_RPS (1 << 1)
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@ -7816,6 +7818,58 @@ enum dot11p_mode {
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#define CFG_EDCA_BE_AIFS_VALUE_MAX (15)
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#define CFG_EDCA_BE_AIFS_VALUE_DEFAULT (3)
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/*
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* <ini>
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* gEnableTxSchedWrrVO - Set TX sched parameters for VO
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* @Default:
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*
|
||||
* This key is mapping to VO defined in data path module through
|
||||
* OL_TX_SCHED_WRR_ADV_CAT_CFG_SPEC. The user can tune the
|
||||
* WRR TX sched parameters such as skip, credit, limit, credit, disc for VO.
|
||||
* e.g., gEnableTxSchedWrrVO = 10, 9, 8, 1, 8
|
||||
*/
|
||||
#define CFG_ENABLE_TX_SCHED_WRR_VO_NAME "gEnableTxSchedWrrVO"
|
||||
#define CFG_ENABLE_TX_SCHED_WRR_VO_DEFAULT ""
|
||||
|
||||
/*
|
||||
* <ini>
|
||||
* gEnableTxSchedWrrVI - Set TX sched parameters for VI
|
||||
* @Default:
|
||||
*
|
||||
* This key is mapping to VI defined in data path module through
|
||||
* OL_TX_SCHED_WRR_ADV_CAT_CFG_SPEC. The user can tune the
|
||||
* WRR TX sched parameters such as skip, credit, limit, credit, disc for VI.
|
||||
* e.g., gEnableTxSchedWrrVI = 10, 9, 8, 1, 8
|
||||
*/
|
||||
#define CFG_ENABLE_TX_SCHED_WRR_VI_NAME "gEnableTxSchedWrrVI"
|
||||
#define CFG_ENABLE_TX_SCHED_WRR_VI_DEFAULT ""
|
||||
|
||||
/*
|
||||
* <ini>
|
||||
* gEnableTxSchedWrrBE - Set TX sched parameters for BE
|
||||
* @Default:
|
||||
*
|
||||
* This key is mapping to BE defined in data path module through
|
||||
* OL_TX_SCHED_WRR_ADV_CAT_CFG_SPEC. The user can tune the
|
||||
* WRR TX sched parameters such as skip, credit, limit, credit, disc for BE.
|
||||
* e.g., gEnableTxSchedWrrBE = 10, 9, 8, 1, 8
|
||||
*/
|
||||
#define CFG_ENABLE_TX_SCHED_WRR_BE_NAME "gEnableTxSchedWrrBE"
|
||||
#define CFG_ENABLE_TX_SCHED_WRR_BE_DEFAULT ""
|
||||
|
||||
/*
|
||||
* <ini>
|
||||
* gEnableTxSchedWrrBK - Set TX sched parameters for BK
|
||||
* @Default:
|
||||
*
|
||||
* This key is mapping to BK defined in data path module through
|
||||
* OL_TX_SCHED_WRR_ADV_CAT_CFG_SPEC. The user can tune the
|
||||
* WRR TX sched parameters such as skip, credit, limit, credit, disc for BK.
|
||||
* e.g., gEnableTxSchedWrrBK = 10, 9, 8, 1, 8
|
||||
*/
|
||||
#define CFG_ENABLE_TX_SCHED_WRR_BK_NAME "gEnableTxSchedWrrBK"
|
||||
#define CFG_ENABLE_TX_SCHED_WRR_BK_DEFAULT ""
|
||||
|
||||
/*
|
||||
* Enable/disable DPTRACE
|
||||
* Enabling this might have performace impact.
|
||||
|
|
@ -9439,6 +9493,16 @@ struct hdd_config {
|
|||
uint32_t edca_vi_aifs;
|
||||
uint32_t edca_bk_aifs;
|
||||
uint32_t edca_be_aifs;
|
||||
|
||||
/* Tuning TX sched parameters for VO (skip credit limit credit disc) */
|
||||
uint8_t tx_sched_wrr_vo[TX_SCHED_WRR_PARAM_STRING_LENGTH];
|
||||
/* Tuning TX sched parameters for VI (skip credit limit credit disc) */
|
||||
uint8_t tx_sched_wrr_vi[TX_SCHED_WRR_PARAM_STRING_LENGTH];
|
||||
/* Tuning TX sched parameters for BE (skip credit limit credit disc) */
|
||||
uint8_t tx_sched_wrr_be[TX_SCHED_WRR_PARAM_STRING_LENGTH];
|
||||
/* Tuning TX sched parameters for BK (skip credit limit credit disc) */
|
||||
uint8_t tx_sched_wrr_bk[TX_SCHED_WRR_PARAM_STRING_LENGTH];
|
||||
|
||||
bool enable_fatal_event;
|
||||
bool bpf_enabled;
|
||||
bool enable_dp_trace;
|
||||
|
|
|
|||
|
|
@ -3927,6 +3927,31 @@ REG_TABLE_ENTRY g_registry_table[] = {
|
|||
CFG_EDCA_BE_AIFS_VALUE_DEFAULT,
|
||||
CFG_EDCA_BE_AIFS_VALUE_MIN,
|
||||
CFG_EDCA_BE_AIFS_VALUE_MAX),
|
||||
|
||||
REG_VARIABLE_STRING(CFG_ENABLE_TX_SCHED_WRR_VO_NAME,
|
||||
WLAN_PARAM_String,
|
||||
struct hdd_config, tx_sched_wrr_vo,
|
||||
VAR_FLAGS_OPTIONAL,
|
||||
(void *) CFG_ENABLE_TX_SCHED_WRR_VO_DEFAULT),
|
||||
|
||||
REG_VARIABLE_STRING(CFG_ENABLE_TX_SCHED_WRR_VI_NAME,
|
||||
WLAN_PARAM_String,
|
||||
struct hdd_config, tx_sched_wrr_vi,
|
||||
VAR_FLAGS_OPTIONAL,
|
||||
(void *) CFG_ENABLE_TX_SCHED_WRR_VI_DEFAULT),
|
||||
|
||||
REG_VARIABLE_STRING(CFG_ENABLE_TX_SCHED_WRR_BE_NAME,
|
||||
WLAN_PARAM_String,
|
||||
struct hdd_config, tx_sched_wrr_be,
|
||||
VAR_FLAGS_OPTIONAL,
|
||||
(void *) CFG_ENABLE_TX_SCHED_WRR_BE_DEFAULT),
|
||||
|
||||
REG_VARIABLE_STRING(CFG_ENABLE_TX_SCHED_WRR_BK_NAME,
|
||||
WLAN_PARAM_String,
|
||||
struct hdd_config, tx_sched_wrr_bk,
|
||||
VAR_FLAGS_OPTIONAL,
|
||||
(void *) CFG_ENABLE_TX_SCHED_WRR_BK_DEFAULT),
|
||||
|
||||
#ifdef WLAN_FEATURE_NAN_DATAPATH
|
||||
REG_VARIABLE(CFG_ENABLE_NAN_DATAPATH_NAME, WLAN_PARAM_Integer,
|
||||
struct hdd_config, enable_nan_datapath,
|
||||
|
|
@ -5548,6 +5573,20 @@ void hdd_cfg_print(hdd_context_t *pHddCtx)
|
|||
hdd_info("Name = [%s] Value = [%u]",
|
||||
CFG_EDCA_BE_AIFS_VALUE_NAME,
|
||||
pHddCtx->config->edca_be_aifs);
|
||||
|
||||
hdd_info("Name = [%s] Value = [%s]",
|
||||
CFG_ENABLE_TX_SCHED_WRR_VO_NAME,
|
||||
pHddCtx->config->tx_sched_wrr_vo);
|
||||
hdd_info("Name = [%s] Value = [%s]",
|
||||
CFG_ENABLE_TX_SCHED_WRR_VI_NAME,
|
||||
pHddCtx->config->tx_sched_wrr_vi);
|
||||
hdd_info("Name = [%s] Value = [%s]",
|
||||
CFG_ENABLE_TX_SCHED_WRR_BK_NAME,
|
||||
pHddCtx->config->tx_sched_wrr_bk);
|
||||
hdd_info("Name = [%s] Value = [%s]",
|
||||
CFG_ENABLE_TX_SCHED_WRR_BE_NAME,
|
||||
pHddCtx->config->tx_sched_wrr_be);
|
||||
|
||||
hdd_info("Name = [%s] Value = [%u]",
|
||||
CFG_ENABLE_DP_TRACE,
|
||||
pHddCtx->config->enable_dp_trace);
|
||||
|
|
|
|||
|
|
@ -1735,6 +1735,78 @@ static void hdd_update_hw_sw_info(hdd_context_t *hdd_ctx)
|
|||
return;
|
||||
}
|
||||
|
||||
/**
|
||||
* hdd_update_cds_ac_specs_params() - update cds ac_specs params
|
||||
* @hdd_ctx: Pointer to hdd context
|
||||
*
|
||||
* Return: none
|
||||
*/
|
||||
static void
|
||||
hdd_update_cds_ac_specs_params(hdd_context_t *hdd_ctx)
|
||||
{
|
||||
uint8_t num_entries = 0;
|
||||
uint8_t tx_sched_wrr_param[TX_SCHED_WRR_PARAMS_NUM];
|
||||
uint8_t *tx_sched_wrr_ac;
|
||||
int i;
|
||||
cds_context_type *cds_ctx;
|
||||
|
||||
if (NULL == hdd_ctx)
|
||||
return;
|
||||
|
||||
if (NULL == hdd_ctx->config) {
|
||||
/* Do nothing if hdd_ctx is invalid */
|
||||
hdd_err("%s: Warning: hdd_ctx->cfg_ini is NULL", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
cds_ctx = cds_get_context(QDF_MODULE_ID_QDF);
|
||||
|
||||
if (!cds_ctx) {
|
||||
hdd_err("Invalid CDS Context");
|
||||
return;
|
||||
}
|
||||
|
||||
for (i = 0; i < OL_TX_NUM_WMM_AC; i++) {
|
||||
switch (i) {
|
||||
case OL_TX_WMM_AC_BE:
|
||||
tx_sched_wrr_ac = hdd_ctx->config->tx_sched_wrr_be;
|
||||
break;
|
||||
case OL_TX_WMM_AC_BK:
|
||||
tx_sched_wrr_ac = hdd_ctx->config->tx_sched_wrr_bk;
|
||||
break;
|
||||
case OL_TX_WMM_AC_VI:
|
||||
tx_sched_wrr_ac = hdd_ctx->config->tx_sched_wrr_vi;
|
||||
break;
|
||||
case OL_TX_WMM_AC_VO:
|
||||
tx_sched_wrr_ac = hdd_ctx->config->tx_sched_wrr_vo;
|
||||
break;
|
||||
default:
|
||||
tx_sched_wrr_ac = NULL;
|
||||
break;
|
||||
}
|
||||
|
||||
hdd_string_to_u8_array(tx_sched_wrr_ac,
|
||||
tx_sched_wrr_param,
|
||||
&num_entries,
|
||||
sizeof(tx_sched_wrr_param));
|
||||
|
||||
if (num_entries == TX_SCHED_WRR_PARAMS_NUM) {
|
||||
cds_ctx->ac_specs[i].wrr_skip_weight =
|
||||
tx_sched_wrr_param[0];
|
||||
cds_ctx->ac_specs[i].credit_threshold =
|
||||
tx_sched_wrr_param[1];
|
||||
cds_ctx->ac_specs[i].send_limit =
|
||||
tx_sched_wrr_param[2];
|
||||
cds_ctx->ac_specs[i].credit_reserve =
|
||||
tx_sched_wrr_param[3];
|
||||
cds_ctx->ac_specs[i].discard_weight =
|
||||
tx_sched_wrr_param[4];
|
||||
}
|
||||
|
||||
num_entries = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* hdd_wlan_start_modules() - Single driver state machine for starting modules
|
||||
* @hdd_ctx: HDD context
|
||||
|
|
@ -1831,6 +1903,8 @@ int hdd_wlan_start_modules(hdd_context_t *hdd_ctx, hdd_adapter_t *adapter,
|
|||
goto destroy_psoc_object;
|
||||
}
|
||||
|
||||
hdd_update_cds_ac_specs_params(hdd_ctx);
|
||||
|
||||
status = cds_open(hdd_ctx->hdd_psoc);
|
||||
if (!QDF_IS_STATUS_SUCCESS(status)) {
|
||||
hdd_err("Failed to Open CDS: %d", status);
|
||||
|
|
|
|||
Loading…
Reference in a new issue