mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-29 03:01:39 -04:00
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (226 commits)
ARM: 6323/1: cam60: don't use __init for cam60_spi_{flash_platform_data,partitions}
ARM: 6324/1: cam60: move cam60_spi_devices to .init.data
ARM: 6322/1: imx/pca100: Fix name of spi platform data
ARM: 6321/1: fix syntax error in main Kconfig file
ARM: 6297/1: move U300 timer to dynamic clock lookup
ARM: 6296/1: clock U300 intcon and timer properly
ARM: 6295/1: fix U300 apb_pclk split
ARM: 6306/1: fix inverted MMC card detect in U300
ARM: 6299/1: errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID
ARM: 6294/1: etm: do a dummy read from OSSRR during initialization
ARM: 6292/1: coresight: add ETM management registers
ARM: 6288/1: ftrace: document mcount formats
ARM: 6287/1: ftrace: clean up mcount assembly indentation
ARM: 6286/1: fix Thumb-2 decompressor broken by "Auto calculate ZRELADDR"
ARM: 6281/1: video/imxfb.c: allow usage without BACKLIGHT_CLASS_DEVICE
ARM: 6280/1: imx: Fix build failure when including <mach/gpio.h> without <linux/spinlock.h>
ARM: S5PV210: Fix on missing s3c-sdhci card detection method for hsmmc3
ARM: S5P: Fix on missing S5P_DEV_FIMC in plat-s5p/Kconfig
ARM: S5PV210: Override FIMC driver name on Aquila board
ARM: S5PC100: enable FIMC on SMDKC100
...
Fix up conflicts in arch/arm/mach-{s5pc100,s5pv210}/cpu.c due to
different subsystem 'setname' calls, and trivial port types in
include/linux/serial_core.h
This commit is contained in:
Linus Torvalds
commit
636d17427b
307 changed files with 16336 additions and 4847 deletions
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@ -1896,6 +1896,13 @@ config FB_W100
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|||
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If unsure, say N.
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config SH_MIPI_DSI
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tristate
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depends on (SUPERH || ARCH_SHMOBILE) && HAVE_CLK
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config SH_LCD_MIPI_DSI
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bool
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config FB_SH_MOBILE_LCDC
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tristate "SuperH Mobile LCDC framebuffer support"
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depends on FB && (SUPERH || ARCH_SHMOBILE) && HAVE_CLK
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@ -1904,9 +1911,17 @@ config FB_SH_MOBILE_LCDC
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select FB_SYS_IMAGEBLIT
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select FB_SYS_FOPS
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select FB_DEFERRED_IO
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select SH_MIPI_DSI if SH_LCD_MIPI_DSI
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---help---
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Frame buffer driver for the on-chip SH-Mobile LCD controller.
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config FB_SH_MOBILE_HDMI
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tristate "SuperH Mobile HDMI controller support"
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depends on FB_SH_MOBILE_LCDC
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select FB_MODE_HELPERS
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---help---
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Driver for the on-chip SH-Mobile HDMI controller.
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config FB_TMIO
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tristate "Toshiba Mobile IO FrameBuffer support"
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depends on FB && MFD_CORE
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@ -123,6 +123,8 @@ obj-$(CONFIG_FB_IBM_GXT4500) += gxt4500.o
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obj-$(CONFIG_FB_PS3) += ps3fb.o
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obj-$(CONFIG_FB_SM501) += sm501fb.o
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obj-$(CONFIG_FB_XILINX) += xilinxfb.o
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obj-$(CONFIG_SH_MIPI_DSI) += sh_mipi_dsi.o
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obj-$(CONFIG_FB_SH_MOBILE_HDMI) += sh_mobile_hdmi.o
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obj-$(CONFIG_FB_SH_MOBILE_LCDC) += sh_mobile_lcdcfb.o
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obj-$(CONFIG_FB_OMAP) += omap/
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obj-y += omap2/
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@ -40,6 +40,12 @@
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*/
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#define DEBUG_VAR 1
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#if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || \
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(defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE) && \
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defined(CONFIG_FB_IMX_MODULE))
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#define PWMR_BACKLIGHT_AVAILABLE
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#endif
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#define DRIVER_NAME "imx-fb"
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#define LCDC_SSA 0x00
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@ -175,7 +181,9 @@ struct imxfb_info {
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struct imx_fb_videomode *mode;
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int num_modes;
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#ifdef PWMR_BACKLIGHT_AVAILABLE
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struct backlight_device *bl;
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#endif
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void (*lcd_power)(int);
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void (*backlight_power)(int);
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@ -450,8 +458,7 @@ static int imxfb_set_par(struct fb_info *info)
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return 0;
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}
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#ifdef PWMR_BACKLIGHT_AVAILABLE
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static int imxfb_bl_get_brightness(struct backlight_device *bl)
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{
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struct imxfb_info *fbi = bl_get_data(bl);
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@ -516,6 +523,7 @@ static void imxfb_exit_backlight(struct imxfb_info *fbi)
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if (fbi->bl)
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backlight_device_unregister(fbi->bl);
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}
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#endif
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static void imxfb_enable_controller(struct imxfb_info *fbi)
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{
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@ -647,6 +655,9 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf
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fbi->regs + LCDC_SIZE);
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writel(fbi->pcr, fbi->regs + LCDC_PCR);
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#ifndef PWMR_BACKLIGHT_AVAILABLE
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writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
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#endif
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writel(fbi->lscr1, fbi->regs + LCDC_LSCR1);
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writel(fbi->dmacr, fbi->regs + LCDC_DMACR);
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@ -847,7 +858,9 @@ static int __init imxfb_probe(struct platform_device *pdev)
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imxfb_enable_controller(fbi);
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fbi->pdev = pdev;
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#ifdef PWMR_BACKLIGHT_AVAILABLE
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imxfb_init_backlight(fbi);
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#endif
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return 0;
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@ -885,7 +898,9 @@ static int __devexit imxfb_remove(struct platform_device *pdev)
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imxfb_disable_controller(fbi);
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#ifdef PWMR_BACKLIGHT_AVAILABLE
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imxfb_exit_backlight(fbi);
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#endif
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unregister_framebuffer(info);
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pdata = pdev->dev.platform_data;
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505
drivers/video/sh_mipi_dsi.c
Normal file
505
drivers/video/sh_mipi_dsi.c
Normal file
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@ -0,0 +1,505 @@
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/*
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* Renesas SH-mobile MIPI DSI support
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*
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* Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <video/mipi_display.h>
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#include <video/sh_mipi_dsi.h>
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#include <video/sh_mobile_lcdc.h>
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#define CMTSRTCTR 0x80d0
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#define CMTSRTREQ 0x8070
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#define DSIINTE 0x0060
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/* E.g., sh7372 has 2 MIPI-DSIs - one for each LCDC */
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#define MAX_SH_MIPI_DSI 2
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struct sh_mipi {
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void __iomem *base;
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struct clk *dsit_clk;
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struct clk *dsip_clk;
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};
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static struct sh_mipi *mipi_dsi[MAX_SH_MIPI_DSI];
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/* Protect the above array */
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static DEFINE_MUTEX(array_lock);
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static struct sh_mipi *sh_mipi_by_handle(int handle)
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{
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if (handle >= ARRAY_SIZE(mipi_dsi) || handle < 0)
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return NULL;
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return mipi_dsi[handle];
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}
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static int sh_mipi_send_short(struct sh_mipi *mipi, u8 dsi_cmd,
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u8 cmd, u8 param)
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{
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u32 data = (dsi_cmd << 24) | (cmd << 16) | (param << 8);
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int cnt = 100;
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/* transmit a short packet to LCD panel */
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iowrite32(1 | data, mipi->base + 0x80d0); /* CMTSRTCTR */
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iowrite32(1, mipi->base + 0x8070); /* CMTSRTREQ */
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while ((ioread32(mipi->base + 0x8070) & 1) && --cnt)
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udelay(1);
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return cnt ? 0 : -ETIMEDOUT;
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}
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#define LCD_CHAN2MIPI(c) ((c) < LCDC_CHAN_MAINLCD || (c) > LCDC_CHAN_SUBLCD ? \
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-EINVAL : (c) - 1)
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static int sh_mipi_dcs(int handle, u8 cmd)
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{
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struct sh_mipi *mipi = sh_mipi_by_handle(LCD_CHAN2MIPI(handle));
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if (!mipi)
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return -ENODEV;
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return sh_mipi_send_short(mipi, MIPI_DSI_DCS_SHORT_WRITE, cmd, 0);
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}
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static int sh_mipi_dcs_param(int handle, u8 cmd, u8 param)
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{
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struct sh_mipi *mipi = sh_mipi_by_handle(LCD_CHAN2MIPI(handle));
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if (!mipi)
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return -ENODEV;
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return sh_mipi_send_short(mipi, MIPI_DSI_DCS_SHORT_WRITE_PARAM, cmd,
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param);
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}
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static void sh_mipi_dsi_enable(struct sh_mipi *mipi, bool enable)
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{
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/*
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* enable LCDC data tx, transition to LPS after completion of each HS
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* packet
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*/
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iowrite32(0x00000002 | enable, mipi->base + 0x8000); /* DTCTR */
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}
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static void sh_mipi_shutdown(struct platform_device *pdev)
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{
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struct sh_mipi *mipi = platform_get_drvdata(pdev);
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sh_mipi_dsi_enable(mipi, false);
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}
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static void mipi_display_on(void *arg, struct fb_info *info)
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{
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struct sh_mipi *mipi = arg;
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sh_mipi_dsi_enable(mipi, true);
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}
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static void mipi_display_off(void *arg)
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{
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struct sh_mipi *mipi = arg;
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sh_mipi_dsi_enable(mipi, false);
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}
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static int __init sh_mipi_setup(struct sh_mipi *mipi,
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struct sh_mipi_dsi_info *pdata)
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{
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void __iomem *base = mipi->base;
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struct sh_mobile_lcdc_chan_cfg *ch = pdata->lcd_chan;
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u32 pctype, datatype, pixfmt;
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u32 linelength;
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bool yuv;
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/* Select data format */
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switch (pdata->data_format) {
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case MIPI_RGB888:
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pctype = 0;
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datatype = MIPI_DSI_PACKED_PIXEL_STREAM_24;
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pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
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linelength = ch->lcd_cfg.xres * 3;
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yuv = false;
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break;
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case MIPI_RGB565:
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pctype = 1;
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datatype = MIPI_DSI_PACKED_PIXEL_STREAM_16;
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pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
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linelength = ch->lcd_cfg.xres * 2;
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yuv = false;
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break;
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case MIPI_RGB666_LP:
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pctype = 2;
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datatype = MIPI_DSI_PIXEL_STREAM_3BYTE_18;
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pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
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linelength = ch->lcd_cfg.xres * 3;
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yuv = false;
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break;
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case MIPI_RGB666:
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pctype = 3;
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datatype = MIPI_DSI_PACKED_PIXEL_STREAM_18;
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pixfmt = MIPI_DCS_PIXEL_FMT_18BIT;
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linelength = (ch->lcd_cfg.xres * 18 + 7) / 8;
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yuv = false;
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break;
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case MIPI_BGR888:
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pctype = 8;
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datatype = MIPI_DSI_PACKED_PIXEL_STREAM_24;
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pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
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linelength = ch->lcd_cfg.xres * 3;
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yuv = false;
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||||
break;
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||||
case MIPI_BGR565:
|
||||
pctype = 9;
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||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_16;
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||||
pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
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linelength = ch->lcd_cfg.xres * 2;
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yuv = false;
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||||
break;
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case MIPI_BGR666_LP:
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pctype = 0xa;
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||||
datatype = MIPI_DSI_PIXEL_STREAM_3BYTE_18;
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||||
pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
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||||
linelength = ch->lcd_cfg.xres * 3;
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||||
yuv = false;
|
||||
break;
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||||
case MIPI_BGR666:
|
||||
pctype = 0xb;
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||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_18;
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||||
pixfmt = MIPI_DCS_PIXEL_FMT_18BIT;
|
||||
linelength = (ch->lcd_cfg.xres * 18 + 7) / 8;
|
||||
yuv = false;
|
||||
break;
|
||||
case MIPI_YUYV:
|
||||
pctype = 4;
|
||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
|
||||
linelength = ch->lcd_cfg.xres * 2;
|
||||
yuv = true;
|
||||
break;
|
||||
case MIPI_UYVY:
|
||||
pctype = 5;
|
||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
|
||||
linelength = ch->lcd_cfg.xres * 2;
|
||||
yuv = true;
|
||||
break;
|
||||
case MIPI_YUV420_L:
|
||||
pctype = 6;
|
||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_12BIT;
|
||||
linelength = (ch->lcd_cfg.xres * 12 + 7) / 8;
|
||||
yuv = true;
|
||||
break;
|
||||
case MIPI_YUV420:
|
||||
pctype = 7;
|
||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_12BIT;
|
||||
/* Length of U/V line */
|
||||
linelength = (ch->lcd_cfg.xres + 1) / 2;
|
||||
yuv = true;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if ((yuv && ch->interface_type != YUV422) ||
|
||||
(!yuv && ch->interface_type != RGB24))
|
||||
return -EINVAL;
|
||||
|
||||
/* reset DSI link */
|
||||
iowrite32(0x00000001, base); /* SYSCTRL */
|
||||
/* Hold reset for 100 cycles of the slowest of bus, HS byte and LP clock */
|
||||
udelay(50);
|
||||
iowrite32(0x00000000, base); /* SYSCTRL */
|
||||
|
||||
/* setup DSI link */
|
||||
|
||||
/*
|
||||
* Default = ULPS enable |
|
||||
* Contention detection enabled |
|
||||
* EoT packet transmission enable |
|
||||
* CRC check enable |
|
||||
* ECC check enable
|
||||
* additionally enable first two lanes
|
||||
*/
|
||||
iowrite32(0x00003703, base + 0x04); /* SYSCONF */
|
||||
/*
|
||||
* T_wakeup = 0x7000
|
||||
* T_hs-trail = 3
|
||||
* T_hs-prepare = 3
|
||||
* T_clk-trail = 3
|
||||
* T_clk-prepare = 2
|
||||
*/
|
||||
iowrite32(0x70003332, base + 0x08); /* TIMSET */
|
||||
/* no responses requested */
|
||||
iowrite32(0x00000000, base + 0x18); /* RESREQSET0 */
|
||||
/* request response to packets of type 0x28 */
|
||||
iowrite32(0x00000100, base + 0x1c); /* RESREQSET1 */
|
||||
/* High-speed transmission timeout, default 0xffffffff */
|
||||
iowrite32(0x0fffffff, base + 0x20); /* HSTTOVSET */
|
||||
/* LP reception timeout, default 0xffffffff */
|
||||
iowrite32(0x0fffffff, base + 0x24); /* LPRTOVSET */
|
||||
/* Turn-around timeout, default 0xffffffff */
|
||||
iowrite32(0x0fffffff, base + 0x28); /* TATOVSET */
|
||||
/* Peripheral reset timeout, default 0xffffffff */
|
||||
iowrite32(0x0fffffff, base + 0x2c); /* PRTOVSET */
|
||||
/* Enable timeout counters */
|
||||
iowrite32(0x00000f00, base + 0x30); /* DSICTRL */
|
||||
/* Interrupts not used, disable all */
|
||||
iowrite32(0, base + DSIINTE);
|
||||
/* DSI-Tx bias on */
|
||||
iowrite32(0x00000001, base + 0x70); /* PHYCTRL */
|
||||
udelay(200);
|
||||
/* Deassert resets, power on, set multiplier */
|
||||
iowrite32(0x03070b01, base + 0x70); /* PHYCTRL */
|
||||
|
||||
/* setup l-bridge */
|
||||
|
||||
/*
|
||||
* Enable transmission of all packets,
|
||||
* transmit LPS after each HS packet completion
|
||||
*/
|
||||
iowrite32(0x00000006, base + 0x8000); /* DTCTR */
|
||||
/* VSYNC width = 2 (<< 17) */
|
||||
iowrite32(0x00040000 | (pctype << 12) | datatype, base + 0x8020); /* VMCTR1 */
|
||||
/*
|
||||
* Non-burst mode with sync pulses: VSE and HSE are output,
|
||||
* HSA period allowed, no commands in LP
|
||||
*/
|
||||
iowrite32(0x00e00000, base + 0x8024); /* VMCTR2 */
|
||||
/*
|
||||
* 0x660 = 1632 bytes per line (RGB24, 544 pixels: see
|
||||
* sh_mobile_lcdc_info.ch[0].lcd_cfg.xres), HSALEN = 1 - default
|
||||
* (unused, since VMCTR2[HSABM] = 0)
|
||||
*/
|
||||
iowrite32(1 | (linelength << 16), base + 0x8028); /* VMLEN1 */
|
||||
|
||||
msleep(5);
|
||||
|
||||
/* setup LCD panel */
|
||||
|
||||
/* cf. drivers/video/omap/lcd_mipid.c */
|
||||
sh_mipi_dcs(ch->chan, MIPI_DCS_EXIT_SLEEP_MODE);
|
||||
msleep(120);
|
||||
/*
|
||||
* [7] - Page Address Mode
|
||||
* [6] - Column Address Mode
|
||||
* [5] - Page / Column Address Mode
|
||||
* [4] - Display Device Line Refresh Order
|
||||
* [3] - RGB/BGR Order
|
||||
* [2] - Display Data Latch Data Order
|
||||
* [1] - Flip Horizontal
|
||||
* [0] - Flip Vertical
|
||||
*/
|
||||
sh_mipi_dcs_param(ch->chan, MIPI_DCS_SET_ADDRESS_MODE, 0x00);
|
||||
/* cf. set_data_lines() */
|
||||
sh_mipi_dcs_param(ch->chan, MIPI_DCS_SET_PIXEL_FORMAT,
|
||||
pixfmt << 4);
|
||||
sh_mipi_dcs(ch->chan, MIPI_DCS_SET_DISPLAY_ON);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init sh_mipi_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct sh_mipi *mipi;
|
||||
struct sh_mipi_dsi_info *pdata = pdev->dev.platform_data;
|
||||
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
unsigned long rate, f_current;
|
||||
int idx = pdev->id, ret;
|
||||
char dsip_clk[] = "dsi.p_clk";
|
||||
|
||||
if (!res || idx >= ARRAY_SIZE(mipi_dsi) || !pdata)
|
||||
return -ENODEV;
|
||||
|
||||
mutex_lock(&array_lock);
|
||||
if (idx < 0)
|
||||
for (idx = 0; idx < ARRAY_SIZE(mipi_dsi) && mipi_dsi[idx]; idx++)
|
||||
;
|
||||
|
||||
if (idx == ARRAY_SIZE(mipi_dsi)) {
|
||||
ret = -EBUSY;
|
||||
goto efindslot;
|
||||
}
|
||||
|
||||
mipi = kzalloc(sizeof(*mipi), GFP_KERNEL);
|
||||
if (!mipi) {
|
||||
ret = -ENOMEM;
|
||||
goto ealloc;
|
||||
}
|
||||
|
||||
if (!request_mem_region(res->start, resource_size(res), pdev->name)) {
|
||||
dev_err(&pdev->dev, "MIPI register region already claimed\n");
|
||||
ret = -EBUSY;
|
||||
goto ereqreg;
|
||||
}
|
||||
|
||||
mipi->base = ioremap(res->start, resource_size(res));
|
||||
if (!mipi->base) {
|
||||
ret = -ENOMEM;
|
||||
goto emap;
|
||||
}
|
||||
|
||||
mipi->dsit_clk = clk_get(&pdev->dev, "dsit_clk");
|
||||
if (IS_ERR(mipi->dsit_clk)) {
|
||||
ret = PTR_ERR(mipi->dsit_clk);
|
||||
goto eclktget;
|
||||
}
|
||||
|
||||
f_current = clk_get_rate(mipi->dsit_clk);
|
||||
/* 80MHz required by the datasheet */
|
||||
rate = clk_round_rate(mipi->dsit_clk, 80000000);
|
||||
if (rate > 0 && rate != f_current)
|
||||
ret = clk_set_rate(mipi->dsit_clk, rate);
|
||||
else
|
||||
ret = rate;
|
||||
if (ret < 0)
|
||||
goto esettrate;
|
||||
|
||||
dev_dbg(&pdev->dev, "DSI-T clk %lu -> %lu\n", f_current, rate);
|
||||
|
||||
sprintf(dsip_clk, "dsi%1.1dp_clk", idx);
|
||||
mipi->dsip_clk = clk_get(&pdev->dev, dsip_clk);
|
||||
if (IS_ERR(mipi->dsip_clk)) {
|
||||
ret = PTR_ERR(mipi->dsip_clk);
|
||||
goto eclkpget;
|
||||
}
|
||||
|
||||
f_current = clk_get_rate(mipi->dsip_clk);
|
||||
/* Between 10 and 50MHz */
|
||||
rate = clk_round_rate(mipi->dsip_clk, 24000000);
|
||||
if (rate > 0 && rate != f_current)
|
||||
ret = clk_set_rate(mipi->dsip_clk, rate);
|
||||
else
|
||||
ret = rate;
|
||||
if (ret < 0)
|
||||
goto esetprate;
|
||||
|
||||
dev_dbg(&pdev->dev, "DSI-P clk %lu -> %lu\n", f_current, rate);
|
||||
|
||||
msleep(10);
|
||||
|
||||
ret = clk_enable(mipi->dsit_clk);
|
||||
if (ret < 0)
|
||||
goto eclkton;
|
||||
|
||||
ret = clk_enable(mipi->dsip_clk);
|
||||
if (ret < 0)
|
||||
goto eclkpon;
|
||||
|
||||
mipi_dsi[idx] = mipi;
|
||||
|
||||
ret = sh_mipi_setup(mipi, pdata);
|
||||
if (ret < 0)
|
||||
goto emipisetup;
|
||||
|
||||
mutex_unlock(&array_lock);
|
||||
platform_set_drvdata(pdev, mipi);
|
||||
|
||||
/* Set up LCDC callbacks */
|
||||
pdata->lcd_chan->board_cfg.board_data = mipi;
|
||||
pdata->lcd_chan->board_cfg.display_on = mipi_display_on;
|
||||
pdata->lcd_chan->board_cfg.display_off = mipi_display_off;
|
||||
|
||||
return 0;
|
||||
|
||||
emipisetup:
|
||||
mipi_dsi[idx] = NULL;
|
||||
clk_disable(mipi->dsip_clk);
|
||||
eclkpon:
|
||||
clk_disable(mipi->dsit_clk);
|
||||
eclkton:
|
||||
esetprate:
|
||||
clk_put(mipi->dsip_clk);
|
||||
eclkpget:
|
||||
esettrate:
|
||||
clk_put(mipi->dsit_clk);
|
||||
eclktget:
|
||||
iounmap(mipi->base);
|
||||
emap:
|
||||
release_mem_region(res->start, resource_size(res));
|
||||
ereqreg:
|
||||
kfree(mipi);
|
||||
ealloc:
|
||||
efindslot:
|
||||
mutex_unlock(&array_lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __exit sh_mipi_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct sh_mipi_dsi_info *pdata = pdev->dev.platform_data;
|
||||
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
struct sh_mipi *mipi = platform_get_drvdata(pdev);
|
||||
int i, ret;
|
||||
|
||||
mutex_lock(&array_lock);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mipi_dsi) && mipi_dsi[i] != mipi; i++)
|
||||
;
|
||||
|
||||
if (i == ARRAY_SIZE(mipi_dsi)) {
|
||||
ret = -EINVAL;
|
||||
} else {
|
||||
ret = 0;
|
||||
mipi_dsi[i] = NULL;
|
||||
}
|
||||
|
||||
mutex_unlock(&array_lock);
|
||||
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
pdata->lcd_chan->board_cfg.display_on = NULL;
|
||||
pdata->lcd_chan->board_cfg.display_off = NULL;
|
||||
pdata->lcd_chan->board_cfg.board_data = NULL;
|
||||
|
||||
clk_disable(mipi->dsip_clk);
|
||||
clk_disable(mipi->dsit_clk);
|
||||
clk_put(mipi->dsit_clk);
|
||||
clk_put(mipi->dsip_clk);
|
||||
iounmap(mipi->base);
|
||||
if (res)
|
||||
release_mem_region(res->start, resource_size(res));
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
kfree(mipi);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver sh_mipi_driver = {
|
||||
.remove = __exit_p(sh_mipi_remove),
|
||||
.shutdown = sh_mipi_shutdown,
|
||||
.driver = {
|
||||
.name = "sh-mipi-dsi",
|
||||
},
|
||||
};
|
||||
|
||||
static int __init sh_mipi_init(void)
|
||||
{
|
||||
return platform_driver_probe(&sh_mipi_driver, sh_mipi_probe);
|
||||
}
|
||||
module_init(sh_mipi_init);
|
||||
|
||||
static void __exit sh_mipi_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&sh_mipi_driver);
|
||||
}
|
||||
module_exit(sh_mipi_exit);
|
||||
|
||||
MODULE_AUTHOR("Guennadi Liakhovetski <[email protected]>");
|
||||
MODULE_DESCRIPTION("SuperH / ARM-shmobile MIPI DSI driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
1028
drivers/video/sh_mobile_hdmi.c
Normal file
1028
drivers/video/sh_mobile_hdmi.c
Normal file
File diff suppressed because it is too large
Load diff
|
|
@ -56,6 +56,7 @@ static int lcdc_shared_regs[] = {
|
|||
/* per-channel registers */
|
||||
enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R,
|
||||
LDSM2R, LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR,
|
||||
LDHAJR,
|
||||
NR_CH_REGS };
|
||||
|
||||
static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
|
||||
|
|
@ -74,6 +75,7 @@ static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
|
|||
[LDVLNR] = 0x450,
|
||||
[LDVSYNR] = 0x454,
|
||||
[LDPMR] = 0x460,
|
||||
[LDHAJR] = 0x4a0,
|
||||
};
|
||||
|
||||
static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
|
||||
|
|
@ -137,6 +139,7 @@ struct sh_mobile_lcdc_priv {
|
|||
struct clk *dot_clk;
|
||||
unsigned long lddckr;
|
||||
struct sh_mobile_lcdc_chan ch[2];
|
||||
struct notifier_block notifier;
|
||||
unsigned long saved_shared_regs[NR_SHARED_REGS];
|
||||
int started;
|
||||
};
|
||||
|
|
@ -404,6 +407,56 @@ static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
|
|||
lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
|
||||
}
|
||||
|
||||
static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
|
||||
{
|
||||
struct fb_var_screeninfo *var = &ch->info->var;
|
||||
unsigned long h_total, hsync_pos;
|
||||
u32 tmp;
|
||||
|
||||
tmp = ch->ldmt1r_value;
|
||||
tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1 << 28;
|
||||
tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1 << 27;
|
||||
tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? 1 << 26 : 0;
|
||||
tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? 1 << 25 : 0;
|
||||
tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? 1 << 24 : 0;
|
||||
tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? 1 << 17 : 0;
|
||||
tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? 1 << 16 : 0;
|
||||
lcdc_write_chan(ch, LDMT1R, tmp);
|
||||
|
||||
/* setup SYS bus */
|
||||
lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
|
||||
lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
|
||||
|
||||
/* horizontal configuration */
|
||||
h_total = var->xres + var->hsync_len +
|
||||
var->left_margin + var->right_margin;
|
||||
tmp = h_total / 8; /* HTCN */
|
||||
tmp |= (var->xres / 8) << 16; /* HDCN */
|
||||
lcdc_write_chan(ch, LDHCNR, tmp);
|
||||
|
||||
hsync_pos = var->xres + var->right_margin;
|
||||
tmp = hsync_pos / 8; /* HSYNP */
|
||||
tmp |= (var->hsync_len / 8) << 16; /* HSYNW */
|
||||
lcdc_write_chan(ch, LDHSYNR, tmp);
|
||||
|
||||
/* vertical configuration */
|
||||
tmp = var->yres + var->vsync_len +
|
||||
var->upper_margin + var->lower_margin; /* VTLN */
|
||||
tmp |= var->yres << 16; /* VDLN */
|
||||
lcdc_write_chan(ch, LDVLNR, tmp);
|
||||
|
||||
tmp = var->yres + var->lower_margin; /* VSYNP */
|
||||
tmp |= var->vsync_len << 16; /* VSYNW */
|
||||
lcdc_write_chan(ch, LDVSYNR, tmp);
|
||||
|
||||
/* Adjust horizontal synchronisation for HDMI */
|
||||
tmp = ((var->xres & 7) << 24) |
|
||||
((h_total & 7) << 16) |
|
||||
((var->hsync_len & 7) << 8) |
|
||||
hsync_pos;
|
||||
lcdc_write_chan(ch, LDHAJR, tmp);
|
||||
}
|
||||
|
||||
static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
|
||||
{
|
||||
struct sh_mobile_lcdc_chan *ch;
|
||||
|
|
@ -470,49 +523,11 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
|
|||
if (!ch->enabled)
|
||||
continue;
|
||||
|
||||
tmp = ch->ldmt1r_value;
|
||||
tmp |= (lcd_cfg->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1 << 28;
|
||||
tmp |= (lcd_cfg->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1 << 27;
|
||||
tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? 1 << 26 : 0;
|
||||
tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? 1 << 25 : 0;
|
||||
tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? 1 << 24 : 0;
|
||||
tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? 1 << 17 : 0;
|
||||
tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? 1 << 16 : 0;
|
||||
lcdc_write_chan(ch, LDMT1R, tmp);
|
||||
|
||||
/* setup SYS bus */
|
||||
lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
|
||||
lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);
|
||||
|
||||
/* horizontal configuration */
|
||||
tmp = lcd_cfg->xres + lcd_cfg->hsync_len;
|
||||
tmp += lcd_cfg->left_margin;
|
||||
tmp += lcd_cfg->right_margin;
|
||||
tmp /= 8; /* HTCN */
|
||||
tmp |= (lcd_cfg->xres / 8) << 16; /* HDCN */
|
||||
lcdc_write_chan(ch, LDHCNR, tmp);
|
||||
|
||||
tmp = lcd_cfg->xres;
|
||||
tmp += lcd_cfg->right_margin;
|
||||
tmp /= 8; /* HSYNP */
|
||||
tmp |= (lcd_cfg->hsync_len / 8) << 16; /* HSYNW */
|
||||
lcdc_write_chan(ch, LDHSYNR, tmp);
|
||||
sh_mobile_lcdc_geometry(ch);
|
||||
|
||||
/* power supply */
|
||||
lcdc_write_chan(ch, LDPMR, 0);
|
||||
|
||||
/* vertical configuration */
|
||||
tmp = lcd_cfg->yres + lcd_cfg->vsync_len;
|
||||
tmp += lcd_cfg->upper_margin;
|
||||
tmp += lcd_cfg->lower_margin; /* VTLN */
|
||||
tmp |= lcd_cfg->yres << 16; /* VDLN */
|
||||
lcdc_write_chan(ch, LDVLNR, tmp);
|
||||
|
||||
tmp = lcd_cfg->yres;
|
||||
tmp += lcd_cfg->lower_margin; /* VSYNP */
|
||||
tmp |= lcd_cfg->vsync_len << 16; /* VSYNW */
|
||||
lcdc_write_chan(ch, LDVSYNR, tmp);
|
||||
|
||||
board_cfg = &ch->cfg.board_cfg;
|
||||
if (board_cfg->setup_sys)
|
||||
ret = board_cfg->setup_sys(board_cfg->board_data, ch,
|
||||
|
|
@ -577,7 +592,7 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
|
|||
|
||||
board_cfg = &ch->cfg.board_cfg;
|
||||
if (board_cfg->display_on)
|
||||
board_cfg->display_on(board_cfg->board_data);
|
||||
board_cfg->display_on(board_cfg->board_data, ch->info);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -943,6 +958,62 @@ static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
|
|||
.runtime_resume = sh_mobile_lcdc_runtime_resume,
|
||||
};
|
||||
|
||||
static int sh_mobile_lcdc_notify(struct notifier_block *nb,
|
||||
unsigned long action, void *data)
|
||||
{
|
||||
struct fb_event *event = data;
|
||||
struct fb_info *info = event->info;
|
||||
struct sh_mobile_lcdc_chan *ch = info->par;
|
||||
struct sh_mobile_lcdc_board_cfg *board_cfg = &ch->cfg.board_cfg;
|
||||
struct fb_var_screeninfo *var;
|
||||
|
||||
if (&ch->lcdc->notifier != nb)
|
||||
return 0;
|
||||
|
||||
dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
|
||||
__func__, action, event->data);
|
||||
|
||||
switch(action) {
|
||||
case FB_EVENT_SUSPEND:
|
||||
if (board_cfg->display_off)
|
||||
board_cfg->display_off(board_cfg->board_data);
|
||||
pm_runtime_put(info->device);
|
||||
break;
|
||||
case FB_EVENT_RESUME:
|
||||
var = &info->var;
|
||||
|
||||
/* HDMI must be enabled before LCDC configuration */
|
||||
if (board_cfg->display_on)
|
||||
board_cfg->display_on(board_cfg->board_data, ch->info);
|
||||
|
||||
/* Check if the new display is not in our modelist */
|
||||
if (ch->info->modelist.next &&
|
||||
!fb_match_mode(var, &ch->info->modelist)) {
|
||||
struct fb_videomode mode;
|
||||
int ret;
|
||||
|
||||
/* Can we handle this display? */
|
||||
if (var->xres > ch->cfg.lcd_cfg.xres ||
|
||||
var->yres > ch->cfg.lcd_cfg.yres)
|
||||
return -ENOMEM;
|
||||
|
||||
/* Add to the modelist */
|
||||
fb_var_to_videomode(&mode, var);
|
||||
ret = fb_add_videomode(&mode, &ch->info->modelist);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
pm_runtime_get_sync(info->device);
|
||||
|
||||
sh_mobile_lcdc_geometry(ch);
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_mobile_lcdc_remove(struct platform_device *pdev);
|
||||
|
||||
static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
|
||||
|
|
@ -1020,15 +1091,19 @@ static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
|
|||
goto err1;
|
||||
}
|
||||
|
||||
priv->base = ioremap_nocache(res->start, resource_size(res));
|
||||
if (!priv->base)
|
||||
goto err1;
|
||||
|
||||
error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv);
|
||||
if (error) {
|
||||
dev_err(&pdev->dev, "unable to setup clocks\n");
|
||||
goto err1;
|
||||
}
|
||||
|
||||
priv->base = ioremap_nocache(res->start, (res->end - res->start) + 1);
|
||||
|
||||
for (i = 0; i < j; i++) {
|
||||
struct fb_var_screeninfo *var;
|
||||
struct fb_videomode *lcd_cfg;
|
||||
cfg = &priv->ch[i].cfg;
|
||||
|
||||
priv->ch[i].info = framebuffer_alloc(0, &pdev->dev);
|
||||
|
|
@ -1039,22 +1114,33 @@ static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
info = priv->ch[i].info;
|
||||
var = &info->var;
|
||||
lcd_cfg = &cfg->lcd_cfg;
|
||||
info->fbops = &sh_mobile_lcdc_ops;
|
||||
info->var.xres = info->var.xres_virtual = cfg->lcd_cfg.xres;
|
||||
info->var.yres = cfg->lcd_cfg.yres;
|
||||
var->xres = var->xres_virtual = lcd_cfg->xres;
|
||||
var->yres = lcd_cfg->yres;
|
||||
/* Default Y virtual resolution is 2x panel size */
|
||||
info->var.yres_virtual = info->var.yres * 2;
|
||||
info->var.width = cfg->lcd_size_cfg.width;
|
||||
info->var.height = cfg->lcd_size_cfg.height;
|
||||
info->var.activate = FB_ACTIVATE_NOW;
|
||||
error = sh_mobile_lcdc_set_bpp(&info->var, cfg->bpp);
|
||||
var->yres_virtual = var->yres * 2;
|
||||
var->width = cfg->lcd_size_cfg.width;
|
||||
var->height = cfg->lcd_size_cfg.height;
|
||||
var->activate = FB_ACTIVATE_NOW;
|
||||
var->left_margin = lcd_cfg->left_margin;
|
||||
var->right_margin = lcd_cfg->right_margin;
|
||||
var->upper_margin = lcd_cfg->upper_margin;
|
||||
var->lower_margin = lcd_cfg->lower_margin;
|
||||
var->hsync_len = lcd_cfg->hsync_len;
|
||||
var->vsync_len = lcd_cfg->vsync_len;
|
||||
var->sync = lcd_cfg->sync;
|
||||
var->pixclock = lcd_cfg->pixclock;
|
||||
|
||||
error = sh_mobile_lcdc_set_bpp(var, cfg->bpp);
|
||||
if (error)
|
||||
break;
|
||||
|
||||
info->fix = sh_mobile_lcdc_fix;
|
||||
info->fix.line_length = cfg->lcd_cfg.xres * (cfg->bpp / 8);
|
||||
info->fix.line_length = lcd_cfg->xres * (cfg->bpp / 8);
|
||||
info->fix.smem_len = info->fix.line_length *
|
||||
info->var.yres_virtual;
|
||||
var->yres_virtual;
|
||||
|
||||
buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len,
|
||||
&priv->ch[i].dma_handle, GFP_KERNEL);
|
||||
|
|
@ -1119,10 +1205,14 @@ static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
|
|||
ch->cfg.bpp);
|
||||
|
||||
/* deferred io mode: disable clock to save power */
|
||||
if (info->fbdefio)
|
||||
if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
|
||||
sh_mobile_lcdc_clk_off(priv);
|
||||
}
|
||||
|
||||
/* Failure ignored */
|
||||
priv->notifier.notifier_call = sh_mobile_lcdc_notify;
|
||||
fb_register_client(&priv->notifier);
|
||||
|
||||
return 0;
|
||||
err1:
|
||||
sh_mobile_lcdc_remove(pdev);
|
||||
|
|
@ -1136,6 +1226,8 @@ static int sh_mobile_lcdc_remove(struct platform_device *pdev)
|
|||
struct fb_info *info;
|
||||
int i;
|
||||
|
||||
fb_unregister_client(&priv->notifier);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
|
||||
if (priv->ch[i].info && priv->ch[i].info->dev)
|
||||
unregister_framebuffer(priv->ch[i].info);
|
||||
|
|
|
|||
Loading…
Reference in a new issue