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Merge "ARM: dts: qcom: Update ACD control register values for A660v2"

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qctecmdr 2020-09-13 01:13:30 -07:00 • committed by Gerrit - the friendly Code Review server
commit 63f3882bd4
1 changed files with 14 additions and 6 deletions
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20
qcom/lahaina-v2-gpu.dtsi
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@ -23,7 +23,7 @@
qcom,bus-min-ddr8 = <11>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0x882c5ffd>;
qcom,acd-level = <0x882a5ffd>;
};
qcom,gpu-pwrlevel@1 {
@ -39,7 +39,7 @@
qcom,bus-min-ddr8 = <11>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0xa82d5ffd>;
qcom,acd-level = <0xa82a5ffd>;
};
qcom,gpu-pwrlevel@2 {
@ -55,7 +55,7 @@
qcom,bus-min-ddr8 = <11>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0xa82d5ffd>;
qcom,acd-level = <0xa82a5ffd>;
};
qcom,gpu-pwrlevel@3 {
@ -71,7 +71,7 @@
qcom,bus-min-ddr8 = <10>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0xa82c5ffd>;
qcom,acd-level = <0x882b5ffd>;
};
qcom,gpu-pwrlevel@4 {
@ -87,7 +87,7 @@
qcom,bus-min-ddr8 = <7>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0x882d5ffd>;
qcom,acd-level = <0xa82b5ffd>;
};
qcom,gpu-pwrlevel@5 {
@ -103,7 +103,7 @@
qcom,bus-min-ddr8 = <7>;
qcom,bus-max-ddr8 = <9>;
qcom,acd-level = <0xa82d5ffd>;
qcom,acd-level = <0xa82c5ffd>;
};
qcom,gpu-pwrlevel@6 {
@ -118,6 +118,8 @@
qcom,bus-freq-ddr8 = <7>;
qcom,bus-min-ddr8 = <5>;
qcom,bus-max-ddr8 = <7>;
qcom,acd-level = <0xa82c5ffd>;
};
qcom,gpu-pwrlevel@7 {
@ -132,6 +134,8 @@
qcom,bus-freq-ddr8 = <7>;
qcom,bus-min-ddr8 = <5>;
qcom,bus-max-ddr8 = <7>;
qcom,acd-level = <0xa82d5ffd>;
};
qcom,gpu-pwrlevel@8 {
@ -146,6 +150,8 @@
qcom,bus-freq-ddr8 = <6>;
qcom,bus-min-ddr8 = <5>;
qcom,bus-max-ddr8 = <7>;
qcom,acd-level = <0x882e5ffd>;
};
qcom,gpu-pwrlevel@9 {
@ -160,6 +166,8 @@
qcom,bus-freq-ddr8 = <2>;
qcom,bus-min-ddr8 = <2>;
qcom,bus-max-ddr8 = <7>;
qcom,acd-level = <0x882f5ffd>;
};
};
};