diff --git a/msm/dsi/dsi_panel.c b/msm/dsi/dsi_panel.c
index 0d7eb401c49c..f16644c93c01 100644
--- a/msm/dsi/dsi_panel.c
+++ b/msm/dsi/dsi_panel.c
@@ -715,14 +715,22 @@ static int dsi_panel_update_backlight(struct dsi_panel *panel,
 		dsi->mode_flags |= MIPI_DSI_MODE_LPM;
 	}
 
+       if (panel->bl_config.bl_level_align == DSI_BACKLIGHT_LEVEL_ALIGN_BIT15_8_BIT3_0){
+                DSI_ERR("dsi_panel_update_backlight cqh bl_level_align == DSI_BACKLIGHT_LEVEL_ALIGN_BIT15_8_BIT3_0\n");
+                bl_lvl = ((((bl_lvl >> 3) & 0xff) << 8) | ((bl_lvl << 1) & 0x0e));
+       }
+
 	if (panel->bl_config.bl_inverted_dbv)
+	{
 		bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
+	}
 
         if (bl->bl_2bytes_enable){
                 bl_lvl_2bytes =  ((bl_lvl & 0xff00) >> 8) | ((bl_lvl & 0xff) << 8);
                 rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl_2bytes);
-        }else
+        }else{
 		rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
+	}
 
 	if (rc < 0)
 		DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
@@ -3178,6 +3186,16 @@ static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
 		panel->bl_config.brightness_default_level = val;
 	}
 
+	rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-level-align", &val);
+	if (rc) {
+               DSI_DEBUG("[%s] bl_level_align unspecified, defaulting to normal, no special algin\n",
+                        panel->name);
+               panel->bl_config.bl_level_align = DSI_BACKLIGHT_LEVEL_ALIGN_NORMAL;
+	} else {
+               panel->bl_config.bl_level_align = val;
+               DSI_ERR("dsi_panel_update_backlight cqh bl_level_align = %s \n",val);
+	}
+
 	panel->bl_config.bl_2bytes_enable = utils->read_bool(utils->data,
 			"qcom,bklt-dcs-2bytes-enabled");
 
diff --git a/msm/dsi/dsi_panel.h b/msm/dsi/dsi_panel.h
index 784422840c6b..03922d2bd0c4 100644
--- a/msm/dsi/dsi_panel.h
+++ b/msm/dsi/dsi_panel.h
@@ -92,6 +92,11 @@ enum bl_update_flag {
 	BL_UPDATE_NONE,
 };
 
+enum dsi_backlight_level_align_type {
+       DSI_BACKLIGHT_LEVEL_ALIGN_NORMAL = 0,
+       DSI_BACKLIGHT_LEVEL_ALIGN_BIT15_8_BIT3_0 = 1,
+};
+
 enum {
 	MODE_GPIO_NOT_VALID = 0,
 	MODE_SEL_DUAL_PORT,
@@ -161,6 +166,7 @@ struct dsi_backlight_config {
 	u32 bl_level;
 	u32 bl_scale;
 	u32 bl_scale_sv;
+	u32 bl_level_align;
 	bool bl_inverted_dbv;
 	bool bl_demura_cmd;
 	u32 demura_type;