From 6466772790881deea0c519331d5b23b201786ac3 Mon Sep 17 00:00:00 2001 From: yangmf3 Date: Wed, 15 Jun 2022 16:51:38 +0800 Subject: [PATCH] tundra: Modify the register according to Qcom patch details: 1.refer to Qcom patch for modification,modify two registers 2.slove the signal interference problem Change-Id: I24158814dc56f6ef021b86ff384a589118cc08b4 Signed-off-by: yangmf3 Reviewed-on: https://gerrit.mot.com/2301431 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Tested-by: Jira Key Reviewed-by: Shuo Wang Reviewed-by: Reviewed-by: Long Cheng Reviewed-by: Reviewed-by: Zhichao Chen Submit-Approved: Jira Key --- .../include/cam_csiphy_1_2_3_hwreg.h | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_2_3_hwreg.h b/drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_2_3_hwreg.h index aaa8bae0b667..7dddef775129 100644 --- a/drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_2_3_hwreg.h +++ b/drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_2_3_hwreg.h @@ -376,12 +376,22 @@ struct data_rate_settings_t data_rate_delta_table_1_2_3 = { { .lane_identifier = CPHY_LANE_0, .csiphy_data_rate_regs = { +#ifdef CONFIG_CAM_CTLE_ENABLE + {0x144, 0xB2, 0x00, + CSIPHY_DEFAULT_PARAMS}, +#else {0x144, 0xA2, 0x00, CSIPHY_DEFAULT_PARAMS}, +#endif {0x988, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS}, +#ifdef CONFIG_CAM_CTLE_ENABLE + {0x980, 0x60, 0x00, + CSIPHY_DEFAULT_PARAMS}, +#else {0x980, 0x61, 0x00, CSIPHY_DEFAULT_PARAMS}, +#endif {0x9B4, 0x08, 0x0A, CSIPHY_DEFAULT_PARAMS}, }, @@ -389,12 +399,22 @@ struct data_rate_settings_t data_rate_delta_table_1_2_3 = { { .lane_identifier = CPHY_LANE_1, .csiphy_data_rate_regs = { +#ifdef CONFIG_CAM_CTLE_ENABLE + {0x344, 0xB2, 0x00, + CSIPHY_DEFAULT_PARAMS}, +#else {0x344, 0xA2, 0x00, CSIPHY_DEFAULT_PARAMS}, +#endif {0xA88, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS}, +#ifdef CONFIG_CAM_CTLE_ENABLE + {0xA80, 0x60, 0x00, + CSIPHY_DEFAULT_PARAMS}, +#else {0xA80, 0x61, 0x00, CSIPHY_DEFAULT_PARAMS}, +#endif {0xAB4, 0x08, 0x0A, CSIPHY_DEFAULT_PARAMS}, }, @@ -402,12 +422,22 @@ struct data_rate_settings_t data_rate_delta_table_1_2_3 = { { .lane_identifier = CPHY_LANE_2, .csiphy_data_rate_regs = { +#ifdef CONFIG_CAM_CTLE_ENABLE + {0x544, 0xB2, 0x00, + CSIPHY_DEFAULT_PARAMS}, +#else {0x544, 0xA2, 0x00, CSIPHY_DEFAULT_PARAMS}, +#endif {0xB88, 0x05, 0x00, CSIPHY_DEFAULT_PARAMS}, +#ifdef CONFIG_CAM_CTLE_ENABLE + {0xB80, 0x60, 0x00, + CSIPHY_DEFAULT_PARAMS}, +#else {0xB80, 0x61, 0x00, CSIPHY_DEFAULT_PARAMS}, +#endif {0xBB4, 0x08, 0x0A, CSIPHY_DEFAULT_PARAMS}, },