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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

Browse source 
Conflicts:
	drivers/mtd/mtdcore.c

Merged in order that I can apply the Nomadik nand/onenand support patches.
This commit is contained in:
David Woodhouse 2009-09-20 05:55:36 -07:00
commit 6469f540ea
6530 changed files with 705073 additions and 369766 deletions
Download patch file Download diff file Expand all files Collapse all files

4
include/linux/Kbuild
View file

@ -268,6 +268,10 @@ ifneq ($(wildcard $(srctree)/arch/$(SRCARCH)/include/asm/kvm.h \
$(srctree)/include/asm-$(SRCARCH)/kvm.h),)
unifdef-y += kvm.h
endif
ifneq ($(wildcard $(srctree)/arch/$(SRCARCH)/include/asm/kvm_para.h \
$(srctree)/include/asm-$(SRCARCH)/kvm_para.h),)
unifdef-y += kvm_para.h
endif
unifdef-y += llc.h
unifdef-y += loop.h
unifdef-y += lp.h

5
include/linux/agp_backend.h
View file

@ -79,9 +79,12 @@ struct agp_memory {
u32 physical;
bool is_bound;
bool is_flushed;
bool vmalloc_flag;
bool vmalloc_flag;
/* list of agp_memory mapped to the aperture */
struct list_head mapped_list;
/* DMA-mapped addresses */
struct scatterlist *sg_list;
int num_sg;
};
#define AGP_NORMAL_MEMORY 0

5
include/linux/amba/bus.h
View file

@ -36,6 +36,11 @@ struct amba_driver {
struct amba_id *id_table;
};
enum amba_vendor {
AMBA_VENDOR_ARM = 0x41,
AMBA_VENDOR_ST = 0x80,
};
#define amba_get_drvdata(d) dev_get_drvdata(&d->dev)
#define amba_set_drvdata(d,p) dev_set_drvdata(&d->dev, p)

80
include/linux/amba/pl093.h Normal file
View file

@ -0,0 +1,80 @@
/* linux/amba/pl093.h
*
* Copyright (c) 2008 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* AMBA PL093 SSMC (synchronous static memory controller)
* See DDI0236.pdf (r0p4) for more details
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#define SMB_BANK(x) ((x) * 0x20) /* each bank control set is 0x20 apart */
/* Offsets for SMBxxxxRy registers */
#define SMBIDCYR (0x00)
#define SMBWSTRDR (0x04)
#define SMBWSTWRR (0x08)
#define SMBWSTOENR (0x0C)
#define SMBWSTWENR (0x10)
#define SMBCR (0x14)
#define SMBSR (0x18)
#define SMBWSTBRDR (0x1C)
/* Masks for SMB registers */
#define IDCY_MASK (0xf)
#define WSTRD_MASK (0xf)
#define WSTWR_MASK (0xf)
#define WSTOEN_MASK (0xf)
#define WSTWEN_MASK (0xf)
/* Notes from datasheet:
* WSTOEN <= WSTRD
* WSTWEN <= WSTWR
*
* WSTOEN is not used with nWAIT
*/
/* SMBCR bit definitions */
#define SMBCR_BIWRITEEN (1 << 21)
#define SMBCR_ADDRVALIDWRITEEN (1 << 20)
#define SMBCR_SYNCWRITE (1 << 17)
#define SMBCR_BMWRITE (1 << 16)
#define SMBCR_WRAPREAD (1 << 14)
#define SMBCR_BIREADEN (1 << 13)
#define SMBCR_ADDRVALIDREADEN (1 << 12)
#define SMBCR_SYNCREAD (1 << 9)
#define SMBCR_BMREAD (1 << 8)
#define SMBCR_SMBLSPOL (1 << 6)
#define SMBCR_WP (1 << 3)
#define SMBCR_WAITEN (1 << 2)
#define SMBCR_WAITPOL (1 << 1)
#define SMBCR_RBLE (1 << 0)
#define SMBCR_BURSTLENWRITE_MASK (3 << 18)
#define SMBCR_BURSTLENWRITE_4 (0 << 18)
#define SMBCR_BURSTLENWRITE_8 (1 << 18)
#define SMBCR_BURSTLENWRITE_RESERVED (2 << 18)
#define SMBCR_BURSTLENWRITE_CONTINUOUS (3 << 18)
#define SMBCR_BURSTLENREAD_MASK (3 << 10)
#define SMBCR_BURSTLENREAD_4 (0 << 10)
#define SMBCR_BURSTLENREAD_8 (1 << 10)
#define SMBCR_BURSTLENREAD_16 (2 << 10)
#define SMBCR_BURSTLENREAD_CONTINUOUS (3 << 10)
#define SMBCR_MW_MASK (3 << 4)
#define SMBCR_MW_8BIT (0 << 4)
#define SMBCR_MW_16BIT (1 << 4)
#define SMBCR_MW_M32BIT (2 << 4)
/* SSMC status registers */
#define SSMCCSR (0x200)
#define SSMCCR (0x204)
#define SSMCITCR (0x208)
#define SSMCITIP (0x20C)
#define SSMCITIOP (0x210)

3
include/linux/arcdevice.h
View file

@ -337,7 +337,8 @@ struct net_device *alloc_arcdev(const char *name);
int arcnet_open(struct net_device *dev);
int arcnet_close(struct net_device *dev);
int arcnet_send_packet(struct sk_buff *skb, struct net_device *dev);
netdev_tx_t arcnet_send_packet(struct sk_buff *skb,
struct net_device *dev);
void arcnet_timeout(struct net_device *dev);
#endif /* __KERNEL__ */

36
include/linux/ata.h
View file

@ -210,15 +210,25 @@ enum {
ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
ATA_CMD_EDD = 0x90, /* execute device diagnostic */
ATA_CMD_DOWNLOAD_MICRO = 0x92,
ATA_CMD_NOP = 0x00,
ATA_CMD_FLUSH = 0xE7,
ATA_CMD_FLUSH_EXT = 0xEA,
ATA_CMD_ID_ATA = 0xEC,
ATA_CMD_ID_ATAPI = 0xA1,
ATA_CMD_SERVICE = 0xA2,
ATA_CMD_READ = 0xC8,
ATA_CMD_READ_EXT = 0x25,
ATA_CMD_READ_QUEUED = 0x26,
ATA_CMD_READ_STREAM_EXT = 0x2B,
ATA_CMD_READ_STREAM_DMA_EXT = 0x2A,
ATA_CMD_WRITE = 0xCA,
ATA_CMD_WRITE_EXT = 0x35,
ATA_CMD_WRITE_QUEUED = 0x36,
ATA_CMD_WRITE_STREAM_EXT = 0x3B,
ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A,
ATA_CMD_WRITE_FUA_EXT = 0x3D,
ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E,
ATA_CMD_FPDMA_READ = 0x60,
ATA_CMD_FPDMA_WRITE = 0x61,
ATA_CMD_PIO_READ = 0x20,
@ -235,6 +245,7 @@ enum {
ATA_CMD_PACKET = 0xA0,
ATA_CMD_VERIFY = 0x40,
ATA_CMD_VERIFY_EXT = 0x42,
ATA_CMD_WRITE_UNCORR_EXT = 0x45,
ATA_CMD_STANDBYNOW1 = 0xE0,
ATA_CMD_IDLEIMMEDIATE = 0xE1,
ATA_CMD_SLEEP = 0xE6,
@ -243,15 +254,34 @@ enum {
ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
ATA_CMD_SET_MAX = 0xF9,
ATA_CMD_SET_MAX_EXT = 0x37,
ATA_CMD_READ_LOG_EXT = 0x2f,
ATA_CMD_READ_LOG_EXT = 0x2F,
ATA_CMD_WRITE_LOG_EXT = 0x3F,
ATA_CMD_READ_LOG_DMA_EXT = 0x47,
ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
ATA_CMD_TRUSTED_RCV = 0x5C,
ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
ATA_CMD_TRUSTED_SND = 0x5E,
ATA_CMD_TRUSTED_SND_DMA = 0x5F,
ATA_CMD_PMP_READ = 0xE4,
ATA_CMD_PMP_WRITE = 0xE8,
ATA_CMD_CONF_OVERLAY = 0xB1,
ATA_CMD_SEC_SET_PASS = 0xF1,
ATA_CMD_SEC_UNLOCK = 0xF2,
ATA_CMD_SEC_ERASE_PREP = 0xF3,
ATA_CMD_SEC_ERASE_UNIT = 0xF4,
ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
ATA_CMD_SEC_DISABLE_PASS = 0xF6,
ATA_CMD_CONFIG_STREAM = 0x51,
ATA_CMD_SMART = 0xB0,
ATA_CMD_MEDIA_LOCK = 0xDE,
ATA_CMD_MEDIA_UNLOCK = 0xDF,
ATA_CMD_DSM = 0x06,
ATA_CMD_CHK_MED_CRD_TYP = 0xD1,
ATA_CMD_CFA_REQ_EXT_ERR = 0x03,
ATA_CMD_CFA_WRITE_NE = 0x38,
ATA_CMD_CFA_TRANS_SECT = 0x87,
ATA_CMD_CFA_ERASE = 0xC0,
ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
/* marked obsolete in the ATA/ATAPI-7 spec */
ATA_CMD_RESTORE = 0x10,
@ -306,6 +336,7 @@ enum {
/* SETFEATURE Sector counts for SATA features */
SATA_AN = 0x05, /* Asynchronous Notification */
SATA_DIPM = 0x03, /* Device Initiated Power Management */
SATA_FPDMA_AA = 0x02, /* DMA Setup FIS Auto-Activate */
/* feature values for SET_MAX */
ATA_SET_MAX_ADDR = 0x00,
@ -525,6 +556,9 @@ static inline int ata_is_data(u8 prot)
#define ata_id_has_atapi_AN(id) \
( (((id)[76] != 0x0000) && ((id)[76] != 0xffff)) && \
((id)[78] & (1 << 5)) )
#define ata_id_has_fpdma_aa(id) \
( (((id)[76] != 0x0000) && ((id)[76] != 0xffff)) && \
((id)[78] & (1 << 2)) )
#define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
#define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
#define ata_id_u32(id,n) \

2
include/linux/attribute_container.h
View file

@ -17,7 +17,7 @@ struct attribute_container {
struct list_head node;
struct klist containers;
struct class *class;
struct attribute_group *grp;
const struct attribute_group *grp;
struct device_attribute **attrs;
int (*match)(struct attribute_container *, struct device *);
#define ATTRIBUTE_CONTAINER_NO_CLASSDEVS 0x01

56
include/linux/backing-dev.h
View file

@ -13,6 +13,8 @@
#include <linux/proportions.h>
#include <linux/kernel.h>
#include <linux/fs.h>
#include <linux/sched.h>
#include <linux/writeback.h>
#include <asm/atomic.h>
struct page;
@ -23,9 +25,11 @@ struct dentry;
* Bits in backing_dev_info.state
*/
enum bdi_state {
BDI_pdflush, /* A pdflush thread is working this device */
BDI_pending, /* On its way to being activated */
BDI_wb_alloc, /* Default embedded wb allocated */
BDI_async_congested, /* The async (write) queue is getting full */
BDI_sync_congested, /* The sync queue is getting full */
BDI_registered, /* bdi_register() was done */
BDI_unused, /* Available bits start here */
};
@ -39,7 +43,23 @@ enum bdi_stat_item {
#define BDI_STAT_BATCH (8*(1+ilog2(nr_cpu_ids)))
struct bdi_writeback {
struct list_head list; /* hangs off the bdi */
struct backing_dev_info *bdi; /* our parent bdi */
unsigned int nr;
unsigned long last_old_flush; /* last old data flush */
struct task_struct *task; /* writeback task */
struct list_head b_dirty; /* dirty inodes */
struct list_head b_io; /* parked for writeback */
struct list_head b_more_io; /* parked for more writeback */
};
struct backing_dev_info {
struct list_head bdi_list;
struct rcu_head rcu_head;
unsigned long ra_pages; /* max readahead in PAGE_CACHE_SIZE units */
unsigned long state; /* Always use atomic bitops on this */
unsigned int capabilities; /* Device capabilities */
@ -48,6 +68,8 @@ struct backing_dev_info {
void (*unplug_io_fn)(struct backing_dev_info *, struct page *);
void *unplug_io_data;
char *name;
struct percpu_counter bdi_stat[NR_BDI_STAT_ITEMS];
struct prop_local_percpu completions;
@ -56,6 +78,14 @@ struct backing_dev_info {
unsigned int min_ratio;
unsigned int max_ratio, max_prop_frac;
struct bdi_writeback wb; /* default writeback info for this bdi */
spinlock_t wb_lock; /* protects update side of wb_list */
struct list_head wb_list; /* the flusher threads hanging off this bdi */
unsigned long wb_mask; /* bitmask of registered tasks */
unsigned int wb_cnt; /* number of registered tasks */
struct list_head work_list;
struct device *dev;
#ifdef CONFIG_DEBUG_FS
@ -71,6 +101,19 @@ int bdi_register(struct backing_dev_info *bdi, struct device *parent,
const char *fmt, ...);
int bdi_register_dev(struct backing_dev_info *bdi, dev_t dev);
void bdi_unregister(struct backing_dev_info *bdi);
void bdi_start_writeback(struct backing_dev_info *bdi, long nr_pages);
int bdi_writeback_task(struct bdi_writeback *wb);
int bdi_has_dirty_io(struct backing_dev_info *bdi);
extern spinlock_t bdi_lock;
extern struct list_head bdi_list;
static inline int wb_has_dirty_io(struct bdi_writeback *wb)
{
return !list_empty(&wb->b_dirty) ||
!list_empty(&wb->b_io) ||
!list_empty(&wb->b_more_io);
}
static inline void __add_bdi_stat(struct backing_dev_info *bdi,
enum bdi_stat_item item, s64 amount)
@ -261,6 +304,11 @@ static inline bool bdi_cap_swap_backed(struct backing_dev_info *bdi)
return bdi->capabilities & BDI_CAP_SWAP_BACKED;
}
static inline bool bdi_cap_flush_forker(struct backing_dev_info *bdi)
{
return bdi == &default_backing_dev_info;
}
static inline bool mapping_cap_writeback_dirty(struct address_space *mapping)
{
return bdi_cap_writeback_dirty(mapping->backing_dev_info);
@ -276,4 +324,10 @@ static inline bool mapping_cap_swap_backed(struct address_space *mapping)
return bdi_cap_swap_backed(mapping->backing_dev_info);
}
static inline int bdi_sched_wait(void *word)
{
schedule();
return 0;
}
#endif /* _LINUX_BACKING_DEV_H */

1
include/linux/binfmts.h
View file

@ -117,6 +117,7 @@ extern int setup_arg_pages(struct linux_binprm * bprm,
int executable_stack);
extern int bprm_mm_init(struct linux_binprm *bprm);
extern int copy_strings_kernel(int argc,char ** argv,struct linux_binprm *bprm);
extern int prepare_bprm_creds(struct linux_binprm *bprm);
extern void install_exec_creds(struct linux_binprm *bprm);
extern void do_coredump(long signr, int exit_code, struct pt_regs *regs);
extern int set_binfmt(struct linux_binfmt *new);

69
include/linux/bio.h
View file

@ -142,56 +142,51 @@ struct bio {
*
* bit 0 -- data direction
* If not set, bio is a read from device. If set, it's a write to device.
* bit 1 -- rw-ahead when set
* bit 2 -- barrier
* bit 1 -- fail fast device errors
* bit 2 -- fail fast transport errors
* bit 3 -- fail fast driver errors
* bit 4 -- rw-ahead when set
* bit 5 -- barrier
* Insert a serialization point in the IO queue, forcing previously
* submitted IO to be completed before this one is issued.
* bit 3 -- synchronous I/O hint.
* bit 4 -- Unplug the device immediately after submitting this bio.
* bit 5 -- metadata request
* bit 6 -- synchronous I/O hint.
* bit 7 -- Unplug the device immediately after submitting this bio.
* bit 8 -- metadata request
* Used for tracing to differentiate metadata and data IO. May also
* get some preferential treatment in the IO scheduler
* bit 6 -- discard sectors
* bit 9 -- discard sectors
* Informs the lower level device that this range of sectors is no longer
* used by the file system and may thus be freed by the device. Used
* for flash based storage.
* bit 7 -- fail fast device errors
* bit 8 -- fail fast transport errors
* bit 9 -- fail fast driver errors
* Don't want driver retries for any fast fail whatever the reason.
* bit 10 -- Tell the IO scheduler not to wait for more requests after this
one has been submitted, even if it is a SYNC request.
*/
#define BIO_RW 0 /* Must match RW in req flags (blkdev.h) */
#define BIO_RW_AHEAD 1 /* Must match FAILFAST in req flags */
#define BIO_RW_BARRIER 2
#define BIO_RW_SYNCIO 3
#define BIO_RW_UNPLUG 4
#define BIO_RW_META 5
#define BIO_RW_DISCARD 6
#define BIO_RW_FAILFAST_DEV 7
#define BIO_RW_FAILFAST_TRANSPORT 8
#define BIO_RW_FAILFAST_DRIVER 9
#define BIO_RW_NOIDLE 10
#define bio_rw_flagged(bio, flag) ((bio)->bi_rw & (1 << (flag)))
enum bio_rw_flags {
BIO_RW,
BIO_RW_FAILFAST_DEV,
BIO_RW_FAILFAST_TRANSPORT,
BIO_RW_FAILFAST_DRIVER,
/* above flags must match REQ_* */
BIO_RW_AHEAD,
BIO_RW_BARRIER,
BIO_RW_SYNCIO,
BIO_RW_UNPLUG,
BIO_RW_META,
BIO_RW_DISCARD,
BIO_RW_NOIDLE,
};
/*
* Old defines, these should eventually be replaced by direct usage of
* bio_rw_flagged()
* First four bits must match between bio->bi_rw and rq->cmd_flags, make
* that explicit here.
*/
#define bio_barrier(bio) bio_rw_flagged(bio, BIO_RW_BARRIER)
#define bio_sync(bio) bio_rw_flagged(bio, BIO_RW_SYNCIO)
#define bio_unplug(bio) bio_rw_flagged(bio, BIO_RW_UNPLUG)
#define bio_failfast_dev(bio) bio_rw_flagged(bio, BIO_RW_FAILFAST_DEV)
#define bio_failfast_transport(bio) \
bio_rw_flagged(bio, BIO_RW_FAILFAST_TRANSPORT)
#define bio_failfast_driver(bio) \
bio_rw_flagged(bio, BIO_RW_FAILFAST_DRIVER)
#define bio_rw_ahead(bio) bio_rw_flagged(bio, BIO_RW_AHEAD)
#define bio_rw_meta(bio) bio_rw_flagged(bio, BIO_RW_META)
#define bio_discard(bio) bio_rw_flagged(bio, BIO_RW_DISCARD)
#define bio_noidle(bio) bio_rw_flagged(bio, BIO_RW_NOIDLE)
#define BIO_RW_RQ_MASK 0xf
static inline bool bio_rw_flagged(struct bio *bio, enum bio_rw_flags flag)
{
return (bio->bi_rw & (1 << flag)) != 0;
}
/*
* upper 16 bits of bi_rw define the io priority of this bio
@ -216,7 +211,7 @@ struct bio {
#define bio_offset(bio) bio_iovec((bio))->bv_offset
#define bio_segments(bio) ((bio)->bi_vcnt - (bio)->bi_idx)
#define bio_sectors(bio) ((bio)->bi_size >> 9)
#define bio_empty_barrier(bio) (bio_barrier(bio) && !bio_has_data(bio) && !bio_discard(bio))
#define bio_empty_barrier(bio) (bio_rw_flagged(bio, BIO_RW_BARRIER) && !bio_has_data(bio) && !bio_rw_flagged(bio, BIO_RW_DISCARD))
static inline unsigned int bio_cur_bytes(struct bio *bio)
{

48
include/linux/blk-iopoll.h Normal file
View file

@ -0,0 +1,48 @@
#ifndef BLK_IOPOLL_H
#define BLK_IOPOLL_H
struct blk_iopoll;
typedef int (blk_iopoll_fn)(struct blk_iopoll *, int);
struct blk_iopoll {
struct list_head list;
unsigned long state;
unsigned long data;
int weight;
int max;
blk_iopoll_fn *poll;
};
enum {
IOPOLL_F_SCHED = 0,
IOPOLL_F_DISABLE = 1,
};
/*
* Returns 0 if we successfully set the IOPOLL_F_SCHED bit, indicating
* that we were the first to acquire this iop for scheduling. If this iop
* is currently disabled, return "failure".
*/
static inline int blk_iopoll_sched_prep(struct blk_iopoll *iop)
{
if (!test_bit(IOPOLL_F_DISABLE, &iop->state))
return test_and_set_bit(IOPOLL_F_SCHED, &iop->state);
return 1;
}
static inline int blk_iopoll_disable_pending(struct blk_iopoll *iop)
{
return test_bit(IOPOLL_F_DISABLE, &iop->state);
}
extern void blk_iopoll_sched(struct blk_iopoll *);
extern void blk_iopoll_init(struct blk_iopoll *, int, blk_iopoll_fn *);
extern void blk_iopoll_complete(struct blk_iopoll *);
extern void __blk_iopoll_complete(struct blk_iopoll *);
extern void blk_iopoll_enable(struct blk_iopoll *);
extern void blk_iopoll_disable(struct blk_iopoll *);
extern int blk_iopoll_enabled;
#endif

44
include/linux/blkdev.h
View file

@ -86,13 +86,14 @@ enum {
};
/*
* request type modified bits. first two bits match BIO_RW* bits, important
* request type modified bits. first four bits match BIO_RW* bits, important
*/
enum rq_flag_bits {
__REQ_RW, /* not set, read. set, write */
__REQ_FAILFAST_DEV, /* no driver retries of device errors */
__REQ_FAILFAST_TRANSPORT, /* no driver retries of transport errors */
__REQ_FAILFAST_DRIVER, /* no driver retries of driver errors */
/* above flags must match BIO_RW_* */
__REQ_DISCARD, /* request to discard sectors */
__REQ_SORTED, /* elevator knows about this request */
__REQ_SOFTBARRIER, /* may not be passed by ioscheduler */
@ -114,6 +115,7 @@ enum rq_flag_bits {
__REQ_INTEGRITY, /* integrity metadata has been remapped */
__REQ_NOIDLE, /* Don't anticipate more IO after this one */
__REQ_IO_STAT, /* account I/O stat */
__REQ_MIXED_MERGE, /* merge of different types, fail separately */
__REQ_NR_BITS, /* stops here */
};
@ -142,6 +144,10 @@ enum rq_flag_bits {
#define REQ_INTEGRITY (1 << __REQ_INTEGRITY)
#define REQ_NOIDLE (1 << __REQ_NOIDLE)
#define REQ_IO_STAT (1 << __REQ_IO_STAT)
#define REQ_MIXED_MERGE (1 << __REQ_MIXED_MERGE)
#define REQ_FAILFAST_MASK (REQ_FAILFAST_DEV | REQ_FAILFAST_TRANSPORT | \
REQ_FAILFAST_DRIVER)
#define BLK_MAX_CDB 16
@ -453,10 +459,12 @@ struct request_queue
#define QUEUE_FLAG_NONROT 14 /* non-rotational device (SSD) */
#define QUEUE_FLAG_VIRT QUEUE_FLAG_NONROT /* paravirt device */
#define QUEUE_FLAG_IO_STAT 15 /* do IO stats */
#define QUEUE_FLAG_CQ 16 /* hardware does queuing */
#define QUEUE_FLAG_DEFAULT ((1 << QUEUE_FLAG_IO_STAT) | \
(1 << QUEUE_FLAG_CLUSTER) | \
(1 << QUEUE_FLAG_STACKABLE))
(1 << QUEUE_FLAG_STACKABLE) | \
(1 << QUEUE_FLAG_SAME_COMP))
static inline int queue_is_locked(struct request_queue *q)
{
@ -575,6 +583,7 @@ enum {
#define blk_queue_plugged(q) test_bit(QUEUE_FLAG_PLUGGED, &(q)->queue_flags)
#define blk_queue_tagged(q) test_bit(QUEUE_FLAG_QUEUED, &(q)->queue_flags)
#define blk_queue_queuing(q) test_bit(QUEUE_FLAG_CQ, &(q)->queue_flags)
#define blk_queue_stopped(q) test_bit(QUEUE_FLAG_STOPPED, &(q)->queue_flags)
#define blk_queue_nomerges(q) test_bit(QUEUE_FLAG_NOMERGES, &(q)->queue_flags)
#define blk_queue_nonrot(q) test_bit(QUEUE_FLAG_NONROT, &(q)->queue_flags)
@ -828,11 +837,13 @@ static inline void blk_run_address_space(struct address_space *mapping)
}
/*
* blk_rq_pos() : the current sector
* blk_rq_bytes() : bytes left in the entire request
* blk_rq_cur_bytes() : bytes left in the current segment
* blk_rq_sectors() : sectors left in the entire request
* blk_rq_cur_sectors() : sectors left in the current segment
* blk_rq_pos() : the current sector
* blk_rq_bytes() : bytes left in the entire request
* blk_rq_cur_bytes() : bytes left in the current segment
* blk_rq_err_bytes() : bytes left till the next error boundary
* blk_rq_sectors() : sectors left in the entire request
* blk_rq_cur_sectors() : sectors left in the current segment
* blk_rq_err_sectors() : sectors left till the next error boundary
*/
static inline sector_t blk_rq_pos(const struct request *rq)
{
@ -849,6 +860,8 @@ static inline int blk_rq_cur_bytes(const struct request *rq)
return rq->bio ? bio_cur_bytes(rq->bio) : 0;
}
extern unsigned int blk_rq_err_bytes(const struct request *rq);
static inline unsigned int blk_rq_sectors(const struct request *rq)
{
return blk_rq_bytes(rq) >> 9;
@ -859,6 +872,11 @@ static inline unsigned int blk_rq_cur_sectors(const struct request *rq)
return blk_rq_cur_bytes(rq) >> 9;
}
static inline unsigned int blk_rq_err_sectors(const struct request *rq)
{
return blk_rq_err_bytes(rq) >> 9;
}
/*
* Request issue related functions.
*/
@ -885,10 +903,12 @@ extern bool blk_end_request(struct request *rq, int error,
unsigned int nr_bytes);
extern void blk_end_request_all(struct request *rq, int error);
extern bool blk_end_request_cur(struct request *rq, int error);
extern bool blk_end_request_err(struct request *rq, int error);
extern bool __blk_end_request(struct request *rq, int error,
unsigned int nr_bytes);
extern void __blk_end_request_all(struct request *rq, int error);
extern bool __blk_end_request_cur(struct request *rq, int error);
extern bool __blk_end_request_err(struct request *rq, int error);
extern void blk_complete_request(struct request *);
extern void __blk_complete_request(struct request *);
@ -915,6 +935,7 @@ extern void blk_queue_alignment_offset(struct request_queue *q,
unsigned int alignment);
extern void blk_limits_io_min(struct queue_limits *limits, unsigned int min);
extern void blk_queue_io_min(struct request_queue *q, unsigned int min);
extern void blk_limits_io_opt(struct queue_limits *limits, unsigned int opt);
extern void blk_queue_io_opt(struct request_queue *q, unsigned int opt);
extern void blk_set_default_limits(struct queue_limits *lim);
extern int blk_stack_limits(struct queue_limits *t, struct queue_limits *b,
@ -977,15 +998,18 @@ static inline struct request *blk_map_queue_find_tag(struct blk_queue_tag *bqt,
}
extern int blkdev_issue_flush(struct block_device *, sector_t *);
extern int blkdev_issue_discard(struct block_device *,
sector_t sector, sector_t nr_sects, gfp_t);
#define DISCARD_FL_WAIT 0x01 /* wait for completion */
#define DISCARD_FL_BARRIER 0x02 /* issue DISCARD_BARRIER request */
extern int blkdev_issue_discard(struct block_device *, sector_t sector,
sector_t nr_sects, gfp_t, int flags);
static inline int sb_issue_discard(struct super_block *sb,
sector_t block, sector_t nr_blocks)
{
block <<= (sb->s_blocksize_bits - 9);
nr_blocks <<= (sb->s_blocksize_bits - 9);
return blkdev_issue_discard(sb->s_bdev, block, nr_blocks, GFP_KERNEL);
return blkdev_issue_discard(sb->s_bdev, block, nr_blocks, GFP_KERNEL,
DISCARD_FL_BARRIER);
}
extern int blk_verify_command(unsigned char *cmd, fmode_t has_write_perm);

1
include/linux/can/dev.h
View file

@ -66,5 +66,6 @@ void can_bus_off(struct net_device *dev);
void can_put_echo_skb(struct sk_buff *skb, struct net_device *dev, int idx);
void can_get_echo_skb(struct net_device *dev, int idx);
void can_free_echo_skb(struct net_device *dev, int idx);
#endif /* CAN_DEV_H */

122
include/linux/clocksource.h
View file

@ -14,6 +14,7 @@
#include <linux/list.h>
#include <linux/cache.h>
#include <linux/timer.h>
#include <linux/init.h>
#include <asm/div64.h>
#include <asm/io.h>
@ -148,14 +149,11 @@ extern u64 timecounter_cyc2time(struct timecounter *tc,
* @disable: optional function to disable the clocksource
* @mask: bitmask for two's complement
* subtraction of non 64 bit counters
* @mult: cycle to nanosecond multiplier (adjusted by NTP)
* @mult_orig: cycle to nanosecond multiplier (unadjusted by NTP)
* @mult: cycle to nanosecond multiplier
* @shift: cycle to nanosecond divisor (power of two)
* @flags: flags describing special properties
* @vread: vsyscall based read
* @resume: resume function for the clocksource, if necessary
* @cycle_interval: Used internally by timekeeping core, please ignore.
* @xtime_interval: Used internally by timekeeping core, please ignore.
*/
struct clocksource {
/*
@ -169,7 +167,6 @@ struct clocksource {
void (*disable)(struct clocksource *cs);
cycle_t mask;
u32 mult;
u32 mult_orig;
u32 shift;
unsigned long flags;
cycle_t (*vread)(void);
@ -181,19 +178,12 @@ struct clocksource {
#define CLKSRC_FSYS_MMIO_SET(mmio, addr) do { } while (0)
#endif
/* timekeeping specific data, ignore */
cycle_t cycle_interval;
u64 xtime_interval;
u32 raw_interval;
/*
* Second part is written at each timer interrupt
* Keep it in a different cache line to dirty no
* more than one cache line.
*/
cycle_t cycle_last ____cacheline_aligned_in_smp;
u64 xtime_nsec;
s64 error;
struct timespec raw_time;
#ifdef CONFIG_CLOCKSOURCE_WATCHDOG
/* Watchdog related data, used by the framework */
@ -202,8 +192,6 @@ struct clocksource {
#endif
};
extern struct clocksource *clock; /* current clocksource */
/*
* Clock source flags bits::
*/
@ -212,6 +200,7 @@ extern struct clocksource *clock; /* current clocksource */
#define CLOCK_SOURCE_WATCHDOG 0x10
#define CLOCK_SOURCE_VALID_FOR_HRES 0x20
#define CLOCK_SOURCE_UNSTABLE 0x40
/* simplify initialization of mask field */
#define CLOCKSOURCE_MASK(bits) (cycle_t)((bits) < 64 ? ((1ULL<<(bits))-1) : -1)
@ -268,108 +257,15 @@ static inline u32 clocksource_hz2mult(u32 hz, u32 shift_constant)
}
/**
* clocksource_read: - Access the clocksource's current cycle value
* @cs: pointer to clocksource being read
* clocksource_cyc2ns - converts clocksource cycles to nanoseconds
*
* Uses the clocksource to return the current cycle_t value
*/
static inline cycle_t clocksource_read(struct clocksource *cs)
{
return cs->read(cs);
}
/**
* clocksource_enable: - enable clocksource
* @cs: pointer to clocksource
*
* Enables the specified clocksource. The clocksource callback
* function should start up the hardware and setup mult and field
* members of struct clocksource to reflect hardware capabilities.
*/
static inline int clocksource_enable(struct clocksource *cs)
{
int ret = 0;
if (cs->enable)
ret = cs->enable(cs);
/*
* The frequency may have changed while the clocksource
* was disabled. If so the code in ->enable() must update
* the mult value to reflect the new frequency. Make sure
* mult_orig follows this change.
*/
cs->mult_orig = cs->mult;
return ret;
}
/**
* clocksource_disable: - disable clocksource
* @cs: pointer to clocksource
*
* Disables the specified clocksource. The clocksource callback
* function should power down the now unused hardware block to
* save power.
*/
static inline void clocksource_disable(struct clocksource *cs)
{
/*
* Save mult_orig in mult so clocksource_enable() can
* restore the value regardless if ->enable() updates
* the value of mult or not.
*/
cs->mult = cs->mult_orig;
if (cs->disable)
cs->disable(cs);
}
/**
* cyc2ns - converts clocksource cycles to nanoseconds
* @cs: Pointer to clocksource
* @cycles: Cycles
*
* Uses the clocksource and ntp ajdustment to convert cycle_ts to nanoseconds.
* Converts cycles to nanoseconds, using the given mult and shift.
*
* XXX - This could use some mult_lxl_ll() asm optimization
*/
static inline s64 cyc2ns(struct clocksource *cs, cycle_t cycles)
static inline s64 clocksource_cyc2ns(cycle_t cycles, u32 mult, u32 shift)
{
u64 ret = (u64)cycles;
ret = (ret * cs->mult) >> cs->shift;
return ret;
}
/**
* clocksource_calculate_interval - Calculates a clocksource interval struct
*
* @c: Pointer to clocksource.
* @length_nsec: Desired interval length in nanoseconds.
*
* Calculates a fixed cycle/nsec interval for a given clocksource/adjustment
* pair and interval request.
*
* Unless you're the timekeeping code, you should not be using this!
*/
static inline void clocksource_calculate_interval(struct clocksource *c,
unsigned long length_nsec)
{
u64 tmp;
/* Do the ns -> cycle conversion first, using original mult */
tmp = length_nsec;
tmp <<= c->shift;
tmp += c->mult_orig/2;
do_div(tmp, c->mult_orig);
c->cycle_interval = (cycle_t)tmp;
if (c->cycle_interval == 0)
c->cycle_interval = 1;
/* Go back from cycles -> shifted ns, this time use ntp adjused mult */
c->xtime_interval = (u64)c->cycle_interval * c->mult;
c->raw_interval = ((u64)c->cycle_interval * c->mult_orig) >> c->shift;
return ((u64) cycles * mult) >> shift;
}
@ -380,6 +276,8 @@ extern void clocksource_touch_watchdog(void);
extern struct clocksource* clocksource_get_next(void);
extern void clocksource_change_rating(struct clocksource *cs, int rating);
extern void clocksource_resume(void);
extern struct clocksource * __init __weak clocksource_default_clock(void);
extern void clocksource_mark_unstable(struct clocksource *cs);
#ifdef CONFIG_GENERIC_TIME_VSYSCALL
extern void update_vsyscall(struct timespec *ts, struct clocksource *c);
@ -394,4 +292,6 @@ static inline void update_vsyscall_tz(void)
}
#endif
extern void timekeeping_notify(struct clocksource *clock);
#endif /* _LINUX_CLOCKSOURCE_H */

6
include/linux/connector.h
View file

@ -136,7 +136,7 @@ struct cn_callback_data {
void *ddata;
void *callback_priv;
void (*callback) (void *);
void (*callback) (struct cn_msg *);
void *free;
};
@ -167,11 +167,11 @@ struct cn_dev {
struct cn_queue_dev *cbdev;
};
int cn_add_callback(struct cb_id *, char *, void (*callback) (void *));
int cn_add_callback(struct cb_id *, char *, void (*callback) (struct cn_msg *));
void cn_del_callback(struct cb_id *);
int cn_netlink_send(struct cn_msg *, u32, gfp_t);
int cn_queue_add_callback(struct cn_queue_dev *dev, char *name, struct cb_id *id, void (*callback)(void *));
int cn_queue_add_callback(struct cn_queue_dev *dev, char *name, struct cb_id *id, void (*callback)(struct cn_msg *));
void cn_queue_del_callback(struct cn_queue_dev *dev, struct cb_id *id);
int queue_cn_work(struct cn_callback_entry *cbq, struct work_struct *work);

17
include/linux/cpu.h
View file

@ -48,6 +48,15 @@ struct notifier_block;
#ifdef CONFIG_SMP
/* Need to know about CPUs going up/down? */
#if defined(CONFIG_HOTPLUG_CPU) || !defined(MODULE)
#define cpu_notifier(fn, pri) { \
static struct notifier_block fn##_nb __cpuinitdata = \
{ .notifier_call = fn, .priority = pri }; \
register_cpu_notifier(&fn##_nb); \
}
#else /* #if defined(CONFIG_HOTPLUG_CPU) || !defined(MODULE) */
#define cpu_notifier(fn, pri) do { (void)(fn); } while (0)
#endif /* #else #if defined(CONFIG_HOTPLUG_CPU) || !defined(MODULE) */
#ifdef CONFIG_HOTPLUG_CPU
extern int register_cpu_notifier(struct notifier_block *nb);
extern void unregister_cpu_notifier(struct notifier_block *nb);
@ -74,6 +83,8 @@ extern void cpu_maps_update_done(void);
#else /* CONFIG_SMP */
#define cpu_notifier(fn, pri) do { (void)(fn); } while (0)
static inline int register_cpu_notifier(struct notifier_block *nb)
{
return 0;
@ -99,11 +110,7 @@ extern struct sysdev_class cpu_sysdev_class;
extern void get_online_cpus(void);
extern void put_online_cpus(void);
#define hotcpu_notifier(fn, pri) { \
static struct notifier_block fn##_nb __cpuinitdata = \
{ .notifier_call = fn, .priority = pri }; \
register_cpu_notifier(&fn##_nb); \
}
#define hotcpu_notifier(fn, pri) cpu_notifier(fn, pri)
#define register_hotcpu_notifier(nb) register_cpu_notifier(nb)
#define unregister_hotcpu_notifier(nb) unregister_cpu_notifier(nb)
int cpu_down(unsigned int cpu);

10
include/linux/cpufreq.h
View file

@ -65,6 +65,9 @@ static inline int cpufreq_unregister_notifier(struct notifier_block *nb,
struct cpufreq_governor;
/* /sys/devices/system/cpu/cpufreq: entry point for global variables */
extern struct kobject *cpufreq_global_kobject;
#define CPUFREQ_ETERNAL (-1)
struct cpufreq_cpuinfo {
unsigned int max_freq;
@ -274,6 +277,13 @@ struct freq_attr {
ssize_t (*store)(struct cpufreq_policy *, const char *, size_t count);
};
struct global_attr {
struct attribute attr;
ssize_t (*show)(struct kobject *kobj,
struct attribute *attr, char *buf);
ssize_t (*store)(struct kobject *a, struct attribute *b,
const char *c, size_t count);
};
/*********************************************************************
* CPUFREQ 2.6. INTERFACE *

72
include/linux/cred.h
View file

@ -15,6 +15,7 @@
#include <linux/capability.h>
#include <linux/init.h>
#include <linux/key.h>
#include <linux/selinux.h>
#include <asm/atomic.h>
struct user_struct;
@ -114,6 +115,13 @@ struct thread_group_cred {
*/
struct cred {
atomic_t usage;
#ifdef CONFIG_DEBUG_CREDENTIALS
atomic_t subscribers; /* number of processes subscribed */
void *put_addr;
unsigned magic;
#define CRED_MAGIC 0x43736564
#define CRED_MAGIC_DEAD 0x44656144
#endif
uid_t uid; /* real UID of the task */
gid_t gid; /* real GID of the task */
uid_t suid; /* saved UID of the task */
@ -143,7 +151,9 @@ struct cred {
};
extern void __put_cred(struct cred *);
extern void exit_creds(struct task_struct *);
extern int copy_creds(struct task_struct *, unsigned long);
extern struct cred *cred_alloc_blank(void);
extern struct cred *prepare_creds(void);
extern struct cred *prepare_exec_creds(void);
extern struct cred *prepare_usermodehelper_creds(void);
@ -158,6 +168,62 @@ extern int set_security_override_from_ctx(struct cred *, const char *);
extern int set_create_files_as(struct cred *, struct inode *);
extern void __init cred_init(void);
/*
* check for validity of credentials
*/
#ifdef CONFIG_DEBUG_CREDENTIALS
extern void __invalid_creds(const struct cred *, const char *, unsigned);
extern void __validate_process_creds(struct task_struct *,
const char *, unsigned);
static inline bool creds_are_invalid(const struct cred *cred)
{
if (cred->magic != CRED_MAGIC)
return true;
if (atomic_read(&cred->usage) < atomic_read(&cred->subscribers))
return true;
#ifdef CONFIG_SECURITY_SELINUX
if (selinux_is_enabled()) {
if ((unsigned long) cred->security < PAGE_SIZE)
return true;
if ((*(u32 *)cred->security & 0xffffff00) ==
(POISON_FREE << 24 | POISON_FREE << 16 | POISON_FREE << 8))
return true;
}
#endif
return false;
}
static inline void __validate_creds(const struct cred *cred,
const char *file, unsigned line)
{
if (unlikely(creds_are_invalid(cred)))
__invalid_creds(cred, file, line);
}
#define validate_creds(cred) \
do { \
__validate_creds((cred), __FILE__, __LINE__); \
} while(0)
#define validate_process_creds() \
do { \
__validate_process_creds(current, __FILE__, __LINE__); \
} while(0)
extern void validate_creds_for_do_exit(struct task_struct *);
#else
static inline void validate_creds(const struct cred *cred)
{
}
static inline void validate_creds_for_do_exit(struct task_struct *tsk)
{
}
static inline void validate_process_creds(void)
{
}
#endif
/**
* get_new_cred - Get a reference on a new set of credentials
* @cred: The new credentials to reference
@ -186,7 +252,9 @@ static inline struct cred *get_new_cred(struct cred *cred)
*/
static inline const struct cred *get_cred(const struct cred *cred)
{
return get_new_cred((struct cred *) cred);
struct cred *nonconst_cred = (struct cred *) cred;
validate_creds(cred);
return get_new_cred(nonconst_cred);
}
/**
@ -204,7 +272,7 @@ static inline void put_cred(const struct cred *_cred)
{
struct cred *cred = (struct cred *) _cred;
BUG_ON(atomic_read(&(cred)->usage) <= 0);
validate_creds(cred);
if (atomic_dec_and_test(&(cred)->usage))
__put_cred(cred);
}

43
include/linux/crypto.h
View file

@ -115,7 +115,6 @@ struct crypto_async_request;
struct crypto_aead;
struct crypto_blkcipher;
struct crypto_hash;
struct crypto_ahash;
struct crypto_rng;
struct crypto_tfm;
struct crypto_type;
@ -146,16 +145,6 @@ struct ablkcipher_request {
void *__ctx[] CRYPTO_MINALIGN_ATTR;
};
struct ahash_request {
struct crypto_async_request base;
unsigned int nbytes;
struct scatterlist *src;
u8 *result;
void *__ctx[] CRYPTO_MINALIGN_ATTR;
};
/**
* struct aead_request - AEAD request
* @base: Common attributes for async crypto requests
@ -220,18 +209,6 @@ struct ablkcipher_alg {
unsigned int ivsize;
};
struct ahash_alg {
int (*init)(struct ahash_request *req);
int (*reinit)(struct ahash_request *req);
int (*update)(struct ahash_request *req);
int (*final)(struct ahash_request *req);
int (*digest)(struct ahash_request *req);
int (*setkey)(struct crypto_ahash *tfm, const u8 *key,
unsigned int keylen);
unsigned int digestsize;
};
struct aead_alg {
int (*setkey)(struct crypto_aead *tfm, const u8 *key,
unsigned int keylen);
@ -318,7 +295,6 @@ struct rng_alg {
#define cra_cipher cra_u.cipher
#define cra_digest cra_u.digest
#define cra_hash cra_u.hash
#define cra_ahash cra_u.ahash
#define cra_compress cra_u.compress
#define cra_rng cra_u.rng
@ -346,7 +322,6 @@ struct crypto_alg {
struct cipher_alg cipher;
struct digest_alg digest;
struct hash_alg hash;
struct ahash_alg ahash;
struct compress_alg compress;
struct rng_alg rng;
} cra_u;
@ -433,18 +408,6 @@ struct hash_tfm {
unsigned int digestsize;
};
struct ahash_tfm {
int (*init)(struct ahash_request *req);
int (*update)(struct ahash_request *req);
int (*final)(struct ahash_request *req);
int (*digest)(struct ahash_request *req);
int (*setkey)(struct crypto_ahash *tfm, const u8 *key,
unsigned int keylen);
unsigned int digestsize;
unsigned int reqsize;
};
struct compress_tfm {
int (*cot_compress)(struct crypto_tfm *tfm,
const u8 *src, unsigned int slen,
@ -465,7 +428,6 @@ struct rng_tfm {
#define crt_blkcipher crt_u.blkcipher
#define crt_cipher crt_u.cipher
#define crt_hash crt_u.hash
#define crt_ahash crt_u.ahash
#define crt_compress crt_u.compress
#define crt_rng crt_u.rng
@ -479,7 +441,6 @@ struct crypto_tfm {
struct blkcipher_tfm blkcipher;
struct cipher_tfm cipher;
struct hash_tfm hash;
struct ahash_tfm ahash;
struct compress_tfm compress;
struct rng_tfm rng;
} crt_u;
@ -770,7 +731,7 @@ static inline struct ablkcipher_request *ablkcipher_request_alloc(
static inline void ablkcipher_request_free(struct ablkcipher_request *req)
{
kfree(req);
kzfree(req);
}
static inline void ablkcipher_request_set_callback(
@ -901,7 +862,7 @@ static inline struct aead_request *aead_request_alloc(struct crypto_aead *tfm,
static inline void aead_request_free(struct aead_request *req)
{
kfree(req);
kzfree(req);
}
static inline void aead_request_set_callback(struct aead_request *req,

18
include/linux/dcbnl.h
View file

@ -50,6 +50,8 @@ struct dcbmsg {
* @DCB_CMD_SNUMTCS: set the number of traffic classes
* @DCB_CMD_GBCN: set backward congestion notification configuration
* @DCB_CMD_SBCN: get backward congestion notification configration.
* @DCB_CMD_GAPP: get application protocol configuration
* @DCB_CMD_SAPP: set application protocol configuration
*/
enum dcbnl_commands {
DCB_CMD_UNDEFINED,
@ -80,6 +82,9 @@ enum dcbnl_commands {
DCB_CMD_BCN_GCFG,
DCB_CMD_BCN_SCFG,
DCB_CMD_GAPP,
DCB_CMD_SAPP,
__DCB_CMD_ENUM_MAX,
DCB_CMD_MAX = __DCB_CMD_ENUM_MAX - 1,
};
@ -114,6 +119,7 @@ enum dcbnl_attrs {
DCB_ATTR_CAP,
DCB_ATTR_NUMTCS,
DCB_ATTR_BCN,
DCB_ATTR_APP,
__DCB_ATTR_ENUM_MAX,
DCB_ATTR_MAX = __DCB_ATTR_ENUM_MAX - 1,
@ -338,5 +344,17 @@ enum dcb_general_attr_values {
DCB_ATTR_VALUE_UNDEFINED = 0xff
};
#define DCB_APP_IDTYPE_ETHTYPE 0x00
#define DCB_APP_IDTYPE_PORTNUM 0x01
enum dcbnl_app_attrs {
DCB_APP_ATTR_UNDEFINED,
DCB_APP_ATTR_IDTYPE,
DCB_APP_ATTR_ID,
DCB_APP_ATTR_PRIORITY,
__DCB_APP_ATTR_ENUM_MAX,
DCB_APP_ATTR_MAX = __DCB_APP_ATTR_ENUM_MAX - 1,
};
#endif /* __LINUX_DCBNL_H__ */

1
include/linux/delayacct.h
View file

@ -18,7 +18,6 @@
#define _LINUX_DELAYACCT_H
#include <linux/sched.h>
#include <linux/taskstats_kern.h>
/*
* Per-task flags relevant to delay accounting

4
include/linux/device-mapper.h
View file

@ -91,6 +91,9 @@ typedef int (*dm_iterate_devices_fn) (struct dm_target *ti,
iterate_devices_callout_fn fn,
void *data);
typedef void (*dm_io_hints_fn) (struct dm_target *ti,
struct queue_limits *limits);
/*
* Returns:
* 0: The target can handle the next I/O immediately.
@ -151,6 +154,7 @@ struct target_type {
dm_merge_fn merge;
dm_busy_fn busy;
dm_iterate_devices_fn iterate_devices;
dm_io_hints_fn io_hints;
/* For internal device-mapper use. */
struct list_head list;

54
include/linux/device.h
View file

@ -2,7 +2,8 @@
* device.h - generic, centralized driver model
*
* Copyright (c) 2001-2003 Patrick Mochel <mochel@osdl.org>
* Copyright (c) 2004-2007 Greg Kroah-Hartman <gregkh@suse.de>
* Copyright (c) 2004-2009 Greg Kroah-Hartman <gregkh@suse.de>
* Copyright (c) 2008-2009 Novell Inc.
*
* This file is released under the GPLv2
*
@ -62,7 +63,7 @@ struct bus_type {
int (*suspend)(struct device *dev, pm_message_t state);
int (*resume)(struct device *dev);
struct dev_pm_ops *pm;
const struct dev_pm_ops *pm;
struct bus_type_private *p;
};
@ -130,9 +131,9 @@ struct device_driver {
void (*shutdown) (struct device *dev);
int (*suspend) (struct device *dev, pm_message_t state);
int (*resume) (struct device *dev);
struct attribute_group **groups;
const struct attribute_group **groups;
struct dev_pm_ops *pm;
const struct dev_pm_ops *pm;
struct driver_private *p;
};
@ -200,7 +201,8 @@ struct class {
int (*suspend)(struct device *dev, pm_message_t state);
int (*resume)(struct device *dev);
struct dev_pm_ops *pm;
const struct dev_pm_ops *pm;
struct class_private *p;
};
@ -223,6 +225,14 @@ extern void class_unregister(struct class *class);
__class_register(class, &__key); \
})
struct class_compat;
struct class_compat *class_compat_register(const char *name);
void class_compat_unregister(struct class_compat *cls);
int class_compat_create_link(struct class_compat *cls, struct device *dev,
struct device *device_link);
void class_compat_remove_link(struct class_compat *cls, struct device *dev,
struct device *device_link);
extern void class_dev_iter_init(struct class_dev_iter *iter,
struct class *class,
struct device *start,
@ -286,12 +296,12 @@ extern void class_destroy(struct class *cls);
*/
struct device_type {
const char *name;
struct attribute_group **groups;
const struct attribute_group **groups;
int (*uevent)(struct device *dev, struct kobj_uevent_env *env);
char *(*nodename)(struct device *dev);
void (*release)(struct device *dev);
struct dev_pm_ops *pm;
const struct dev_pm_ops *pm;
};
/* interface for exporting device attributes */
@ -380,7 +390,6 @@ struct device {
struct bus_type *bus; /* type of bus device is on */
struct device_driver *driver; /* which driver has allocated this
device */
void *driver_data; /* data private to the driver */
void *platform_data; /* Platform specific data, device
core doesn't touch it */
struct dev_pm_info power;
@ -411,7 +420,7 @@ struct device {
struct klist_node knode_class;
struct class *class;
struct attribute_group **groups; /* optional groups */
const struct attribute_group **groups; /* optional groups */
void (*release)(struct device *dev);
};
@ -446,16 +455,6 @@ static inline void set_dev_node(struct device *dev, int node)
}
#endif
static inline void *dev_get_drvdata(const struct device *dev)
{
return dev->driver_data;
}
static inline void dev_set_drvdata(struct device *dev, void *data)
{
dev->driver_data = data;
}
static inline unsigned int dev_get_uevent_suppress(const struct device *dev)
{
return dev->kobj.uevent_suppress;
@ -489,6 +488,8 @@ extern int device_rename(struct device *dev, char *new_name);
extern int device_move(struct device *dev, struct device *new_parent,
enum dpm_order dpm_order);
extern const char *device_get_nodename(struct device *dev, const char **tmp);
extern void *dev_get_drvdata(const struct device *dev);
extern void dev_set_drvdata(struct device *dev, void *data);
/*
* Root device objects for grouping under /sys/devices
@ -501,6 +502,11 @@ static inline struct device *root_device_register(const char *name)
}
extern void root_device_unregister(struct device *root);
static inline void *dev_get_platdata(const struct device *dev)
{
return dev->platform_data;
}
/*
* Manual binding of a device to driver. See drivers/base/bus.c
* for information on use.
@ -546,6 +552,16 @@ extern void put_device(struct device *dev);
extern void wait_for_device_probe(void);
#ifdef CONFIG_DEVTMPFS
extern int devtmpfs_create_node(struct device *dev);
extern int devtmpfs_delete_node(struct device *dev);
extern int devtmpfs_mount(const char *mountpoint);
#else
static inline int devtmpfs_create_node(struct device *dev) { return 0; }
static inline int devtmpfs_delete_node(struct device *dev) { return 0; }
static inline int devtmpfs_mount(const char *mountpoint) { return 0; }
#endif
/* drivers/base/power/shutdown.c */
extern void device_shutdown(void);

13
include/linux/dm-log-userspace.h
View file

@ -371,7 +371,18 @@
(DM_ULOG_REQUEST_MASK & (request_type))
struct dm_ulog_request {
char uuid[DM_UUID_LEN]; /* Ties a request to a specific mirror log */
/*
* The local unique identifier (luid) and the universally unique
* identifier (uuid) are used to tie a request to a specific
* mirror log. A single machine log could probably make due with
* just the 'luid', but a cluster-aware log must use the 'uuid' and
* the 'luid'. The uuid is what is required for node to node
* communication concerning a particular log, but the 'luid' helps
* differentiate between logs that are being swapped and have the
* same 'uuid'. (Think "live" and "inactive" device-mapper tables.)
*/
uint64_t luid;
char uuid[DM_UUID_LEN];
char padding[7]; /* Padding because DM_UUID_LEN = 129 */
int32_t error; /* Used to report back processing errors */

6
include/linux/dma-mapping.h
View file

@ -58,6 +58,7 @@ struct dma_map_ops {
enum dma_data_direction dir);
int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
int (*dma_supported)(struct device *dev, u64 mask);
int (*set_dma_mask)(struct device *dev, u64 mask);
int is_phys;
};
@ -98,11 +99,6 @@ static inline int is_device_dma_capable(struct device *dev)
return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
}
static inline int is_buffer_dma_capable(u64 mask, dma_addr_t addr, size_t size)
{
return addr + size <= mask;
}
#ifdef CONFIG_HAS_DMA
#include <asm/dma-mapping.h>
#else

13
include/linux/dmi.h
View file

@ -43,7 +43,7 @@ extern const char * dmi_get_system_info(int field);
extern const struct dmi_device * dmi_find_device(int type, const char *name,
const struct dmi_device *from);
extern void dmi_scan_machine(void);
extern int dmi_get_year(int field);
extern bool dmi_get_date(int field, int *yearp, int *monthp, int *dayp);
extern int dmi_name_in_vendors(const char *str);
extern int dmi_name_in_serial(const char *str);
extern int dmi_available;
@ -58,7 +58,16 @@ static inline const char * dmi_get_system_info(int field) { return NULL; }
static inline const struct dmi_device * dmi_find_device(int type, const char *name,
const struct dmi_device *from) { return NULL; }
static inline void dmi_scan_machine(void) { return; }
static inline int dmi_get_year(int year) { return 0; }
static inline bool dmi_get_date(int field, int *yearp, int *monthp, int *dayp)
{
if (yearp)
*yearp = 0;
if (monthp)
*monthp = 0;
if (dayp)
*dayp = 0;
return false;
}
static inline int dmi_name_in_vendors(const char *s) { return 0; }
static inline int dmi_name_in_serial(const char *s) { return 0; }
#define dmi_available 0

19
include/linux/dtlk.h
View file

@ -1,22 +1,3 @@
#if 0
#define TRACE_TXT(text) \
{ \
if(dtlk_trace) \
{ \
console_print(text); \
console_print("\n"); \
} \
}
#define TRACE_CHR(chr) \
{ \
if(dtlk_trace) \
console_print(chr); \
} \
#endif
#define DTLK_MINOR 0
#define DTLK_IO_EXTENT 0x02

2
include/linux/dvb/dmx.h
View file

@ -151,5 +151,7 @@ struct dmx_stc {
#define DMX_GET_CAPS _IOR('o', 48, dmx_caps_t)
#define DMX_SET_SOURCE _IOW('o', 49, dmx_source_t)
#define DMX_GET_STC _IOWR('o', 50, struct dmx_stc)
#define DMX_ADD_PID _IOW('o', 51, __u16)
#define DMX_REMOVE_PID _IOW('o', 52, __u16)
#endif /*_DVBDMX_H_*/

5
include/linux/enclosure.h
View file

@ -122,8 +122,9 @@ enclosure_component_register(struct enclosure_device *, unsigned int,
enum enclosure_component_type, const char *);
int enclosure_add_device(struct enclosure_device *enclosure, int component,
struct device *dev);
int enclosure_remove_device(struct enclosure_device *enclosure, int component);
struct enclosure_device *enclosure_find(struct device *dev);
int enclosure_remove_device(struct enclosure_device *, struct device *);
struct enclosure_device *enclosure_find(struct device *dev,
struct enclosure_device *start);
int enclosure_for_each_device(int (*fn)(struct enclosure_device *, void *),
void *data);

15
include/linux/ethtool.h
View file

@ -362,12 +362,25 @@ struct ethtool_rxnfc {
__u32 rule_locs[0];
};
#define ETHTOOL_FLASH_MAX_FILENAME 128
enum ethtool_flash_op_type {
ETHTOOL_FLASH_ALL_REGIONS = 0,
};
/* for passing firmware flashing related parameters */
struct ethtool_flash {
__u32 cmd;
__u32 region;
char data[ETHTOOL_FLASH_MAX_FILENAME];
};
#ifdef __KERNEL__
struct net_device;
/* Some generic methods drivers may use in their ethtool_ops */
u32 ethtool_op_get_link(struct net_device *dev);
u32 ethtool_op_get_rx_csum(struct net_device *dev);
u32 ethtool_op_get_tx_csum(struct net_device *dev);
int ethtool_op_set_tx_csum(struct net_device *dev, u32 data);
int ethtool_op_set_tx_hw_csum(struct net_device *dev, u32 data);
@ -488,6 +501,7 @@ struct ethtool_ops {
int (*get_stats_count)(struct net_device *);/* use get_sset_count */
int (*get_rxnfc)(struct net_device *, struct ethtool_rxnfc *, void *);
int (*set_rxnfc)(struct net_device *, struct ethtool_rxnfc *);
int (*flash_device)(struct net_device *, struct ethtool_flash *);
};
#endif /* __KERNEL__ */
@ -544,6 +558,7 @@ struct ethtool_ops {
#define ETHTOOL_GRXCLSRLALL 0x00000030 /* Get all RX classification rule */
#define ETHTOOL_SRXCLSRLDEL 0x00000031 /* Delete RX classification rule */
#define ETHTOOL_SRXCLSRLINS 0x00000032 /* Insert RX classification rule */
#define ETHTOOL_FLASHDEV 0x00000033 /* Flash firmware to device */
/* compatibility with older code */
#define SPARC_ETH_GSET ETHTOOL_GSET

10
include/linux/fips.h Normal file
View file

@ -0,0 +1,10 @@
#ifndef _FIPS_H
#define _FIPS_H
#ifdef CONFIG_CRYPTO_FIPS
extern int fips_enabled;
#else
#define fips_enabled 0
#endif
#endif

53
include/linux/fs.h
View file

@ -161,8 +161,8 @@ struct inodes_stat_t {
* These aren't really reads or writes, they pass down information about
* parts of device that are now unused by the file system.
*/
#define DISCARD_NOBARRIER (1 << BIO_RW_DISCARD)
#define DISCARD_BARRIER ((1 << BIO_RW_DISCARD) | (1 << BIO_RW_BARRIER))
#define DISCARD_NOBARRIER (WRITE | (1 << BIO_RW_DISCARD))
#define DISCARD_BARRIER (DISCARD_NOBARRIER | (1 << BIO_RW_BARRIER))
#define SEL_IN 1
#define SEL_OUT 2
@ -655,7 +655,6 @@ struct block_device {
int bd_invalidated;
struct gendisk * bd_disk;
struct list_head bd_list;
struct backing_dev_info *bd_inode_backing_dev_info;
/*
* Private data. You must have bd_claim'ed the block_device
* to use this. NOTE: bd_claim allows an owner to claim
@ -715,7 +714,7 @@ struct posix_acl;
struct inode {
struct hlist_node i_hash;
struct list_head i_list;
struct list_head i_list; /* backing dev IO list */
struct list_head i_sb_list;
struct list_head i_dentry;
unsigned long i_ino;
@ -1336,9 +1335,6 @@ struct super_block {
struct xattr_handler **s_xattr;
struct list_head s_inodes; /* all inodes */
struct list_head s_dirty; /* dirty inodes */
struct list_head s_io; /* parked for writeback */
struct list_head s_more_io; /* parked for more writeback */
struct hlist_head s_anon; /* anonymous dentries for (nfs) exporting */
struct list_head s_files;
/* s_dentry_lru and s_nr_dentry_unused are protected by dcache_lock */
@ -1346,6 +1342,7 @@ struct super_block {
int s_nr_dentry_unused; /* # of dentry on lru */
struct block_device *s_bdev;
struct backing_dev_info *s_bdi;
struct mtd_info *s_mtd;
struct list_head s_instances;
struct quota_info s_dquot; /* Diskquota specific options */
@ -1458,11 +1455,6 @@ int fiemap_check_flags(struct fiemap_extent_info *fieinfo, u32 fs_flags);
#define DT_SOCK 12
#define DT_WHT 14
#define OSYNC_METADATA (1<<0)
#define OSYNC_DATA (1<<1)
#define OSYNC_INODE (1<<2)
int generic_osync_inode(struct inode *, struct address_space *, int);
/*
* This is the "filldir" function type, used by readdir() to let
* the kernel specify what kind of dirent layout it wants to have.
@ -1528,6 +1520,7 @@ struct inode_operations {
void (*put_link) (struct dentry *, struct nameidata *, void *);
void (*truncate) (struct inode *);
int (*permission) (struct inode *, int);
int (*check_acl)(struct inode *, int);
int (*setattr) (struct dentry *, struct iattr *);
int (*getattr) (struct vfsmount *mnt, struct dentry *, struct kstat *);
int (*setxattr) (struct dentry *, const char *,const void *,size_t,int);
@ -1788,6 +1781,7 @@ extern int get_sb_pseudo(struct file_system_type *, char *,
struct vfsmount *mnt);
extern void simple_set_mnt(struct vfsmount *mnt, struct super_block *sb);
int __put_super_and_need_restart(struct super_block *sb);
void put_super(struct super_block *sb);
/* Alas, no aliases. Too much hassle with bringing module.h everywhere */
#define fops_get(fops) \
@ -1998,12 +1992,25 @@ extern void bd_release_from_disk(struct block_device *, struct gendisk *);
#define CHRDEV_MAJOR_HASH_SIZE 255
extern int alloc_chrdev_region(dev_t *, unsigned, unsigned, const char *);
extern int register_chrdev_region(dev_t, unsigned, const char *);
extern int register_chrdev(unsigned int, const char *,
const struct file_operations *);
extern void unregister_chrdev(unsigned int, const char *);
extern int __register_chrdev(unsigned int major, unsigned int baseminor,
unsigned int count, const char *name,
const struct file_operations *fops);
extern void __unregister_chrdev(unsigned int major, unsigned int baseminor,
unsigned int count, const char *name);
extern void unregister_chrdev_region(dev_t, unsigned);
extern void chrdev_show(struct seq_file *,off_t);
static inline int register_chrdev(unsigned int major, const char *name,
const struct file_operations *fops)
{
return __register_chrdev(major, 0, 256, name, fops);
}
static inline void unregister_chrdev(unsigned int major, const char *name)
{
__unregister_chrdev(major, 0, 256, name);
}
/* fs/block_dev.c */
#define BDEVNAME_SIZE 32 /* Largest string for a blockdev identifier */
#define BDEVT_SIZE 10 /* Largest string for MAJ:MIN for blkdev */
@ -2070,12 +2077,12 @@ static inline void invalidate_remote_inode(struct inode *inode)
extern int invalidate_inode_pages2(struct address_space *mapping);
extern int invalidate_inode_pages2_range(struct address_space *mapping,
pgoff_t start, pgoff_t end);
extern void generic_sync_sb_inodes(struct super_block *sb,
struct writeback_control *wbc);
extern int write_inode_now(struct inode *, int);
extern int filemap_fdatawrite(struct address_space *);
extern int filemap_flush(struct address_space *);
extern int filemap_fdatawait(struct address_space *);
extern int filemap_fdatawait_range(struct address_space *, loff_t lstart,
loff_t lend);
extern int filemap_write_and_wait(struct address_space *mapping);
extern int filemap_write_and_wait_range(struct address_space *mapping,
loff_t lstart, loff_t lend);
@ -2086,7 +2093,10 @@ extern int __filemap_fdatawrite_range(struct address_space *mapping,
extern int filemap_fdatawrite_range(struct address_space *mapping,
loff_t start, loff_t end);
extern int vfs_fsync_range(struct file *file, struct dentry *dentry,
loff_t start, loff_t end, int datasync);
extern int vfs_fsync(struct file *file, struct dentry *dentry, int datasync);
extern int generic_write_sync(struct file *file, loff_t pos, loff_t count);
extern void sync_supers(void);
extern void emergency_sync(void);
extern void emergency_remount(void);
@ -2186,16 +2196,15 @@ extern int bdev_read_only(struct block_device *);
extern int set_blocksize(struct block_device *, int);
extern int sb_set_blocksize(struct super_block *, int);
extern int sb_min_blocksize(struct super_block *, int);
extern int sb_has_dirty_inodes(struct super_block *);
extern int generic_file_mmap(struct file *, struct vm_area_struct *);
extern int generic_file_readonly_mmap(struct file *, struct vm_area_struct *);
extern int file_read_actor(read_descriptor_t * desc, struct page *page, unsigned long offset, unsigned long size);
int generic_write_checks(struct file *file, loff_t *pos, size_t *count, int isblk);
extern ssize_t generic_file_aio_read(struct kiocb *, const struct iovec *, unsigned long, loff_t);
extern ssize_t __generic_file_aio_write(struct kiocb *, const struct iovec *, unsigned long,
loff_t *);
extern ssize_t generic_file_aio_write(struct kiocb *, const struct iovec *, unsigned long, loff_t);
extern ssize_t generic_file_aio_write_nolock(struct kiocb *, const struct iovec *,
unsigned long, loff_t);
extern ssize_t generic_file_direct_write(struct kiocb *, const struct iovec *,
unsigned long *, loff_t, loff_t *, size_t, size_t);
extern ssize_t generic_file_buffered_write(struct kiocb *, const struct iovec *,
@ -2205,6 +2214,10 @@ extern ssize_t do_sync_write(struct file *filp, const char __user *buf, size_t l
extern int generic_segment_checks(const struct iovec *iov,
unsigned long *nr_segs, size_t *count, int access_flags);
/* fs/block_dev.c */
extern ssize_t blkdev_aio_write(struct kiocb *iocb, const struct iovec *iov,
unsigned long nr_segs, loff_t pos);
/* fs/splice.c */
extern ssize_t generic_file_splice_read(struct file *, loff_t *,
struct pipe_inode_info *, size_t, unsigned int);

57
include/linux/ftrace_event.h
View file

@ -1,8 +1,8 @@
#ifndef _LINUX_FTRACE_EVENT_H
#define _LINUX_FTRACE_EVENT_H
#include <linux/trace_seq.h>
#include <linux/ring_buffer.h>
#include <linux/trace_seq.h>
#include <linux/percpu.h>
struct trace_array;
@ -34,7 +34,7 @@ struct trace_entry {
unsigned char flags;
unsigned char preempt_count;
int pid;
int tgid;
int lock_depth;
};
#define FTRACE_MAX_EVENT \
@ -93,16 +93,22 @@ void tracing_generic_entry_update(struct trace_entry *entry,
unsigned long flags,
int pc);
struct ring_buffer_event *
trace_current_buffer_lock_reserve(int type, unsigned long len,
trace_current_buffer_lock_reserve(struct ring_buffer **current_buffer,
int type, unsigned long len,
unsigned long flags, int pc);
void trace_current_buffer_unlock_commit(struct ring_buffer_event *event,
void trace_current_buffer_unlock_commit(struct ring_buffer *buffer,
struct ring_buffer_event *event,
unsigned long flags, int pc);
void trace_nowake_buffer_unlock_commit(struct ring_buffer_event *event,
void trace_nowake_buffer_unlock_commit(struct ring_buffer *buffer,
struct ring_buffer_event *event,
unsigned long flags, int pc);
void trace_current_buffer_discard_commit(struct ring_buffer_event *event);
void trace_current_buffer_discard_commit(struct ring_buffer *buffer,
struct ring_buffer_event *event);
void tracing_record_cmdline(struct task_struct *tsk);
struct event_filter;
struct ftrace_event_call {
struct list_head list;
char *name;
@ -110,16 +116,18 @@ struct ftrace_event_call {
struct dentry *dir;
struct trace_event *event;
int enabled;
int (*regfunc)(void);
void (*unregfunc)(void);
int (*regfunc)(void *);
void (*unregfunc)(void *);
int id;
int (*raw_init)(void);
int (*show_format)(struct trace_seq *s);
int (*define_fields)(void);
int (*show_format)(struct ftrace_event_call *call,
struct trace_seq *s);
int (*define_fields)(struct ftrace_event_call *);
struct list_head fields;
int filter_active;
void *filter;
struct event_filter *filter;
void *mod;
void *data;
atomic_t profile_count;
int (*profile_enable)(struct ftrace_event_call *);
@ -127,17 +135,27 @@ struct ftrace_event_call {
};
#define MAX_FILTER_PRED 32
#define MAX_FILTER_STR_VAL 128
#define MAX_FILTER_STR_VAL 256 /* Should handle KSYM_SYMBOL_LEN */
extern int init_preds(struct ftrace_event_call *call);
extern void destroy_preds(struct ftrace_event_call *call);
extern int filter_match_preds(struct ftrace_event_call *call, void *rec);
extern int filter_current_check_discard(struct ftrace_event_call *call,
extern int filter_current_check_discard(struct ring_buffer *buffer,
struct ftrace_event_call *call,
void *rec,
struct ring_buffer_event *event);
extern int trace_define_field(struct ftrace_event_call *call, char *type,
char *name, int offset, int size, int is_signed);
enum {
FILTER_OTHER = 0,
FILTER_STATIC_STRING,
FILTER_DYN_STRING,
FILTER_PTR_STRING,
};
extern int trace_define_field(struct ftrace_event_call *call,
const char *type, const char *name,
int offset, int size, int is_signed,
int filter_type);
extern int trace_define_common_fields(struct ftrace_event_call *call);
#define is_signed_type(type) (((type)(-1)) < 0)
@ -162,11 +180,4 @@ do { \
__trace_printk(ip, fmt, ##args); \
} while (0)
#define __common_field(type, item, is_signed) \
ret = trace_define_field(event_call, #type, "common_" #item, \
offsetof(typeof(field.ent), item), \
sizeof(field.ent.item), is_signed); \
if (ret) \
return ret;
#endif /* _LINUX_FTRACE_EVENT_H */

29
include/linux/fuse.h
View file

@ -30,6 +30,10 @@
* - add umask flag to input argument of open, mknod and mkdir
* - add notification messages for invalidation of inodes and
* directory entries
*
* 7.13
* - make max number of background requests and congestion threshold
* tunables
*/
#ifndef _LINUX_FUSE_H
@ -37,11 +41,31 @@
#include <linux/types.h>
/*
* Version negotiation:
*
* Both the kernel and userspace send the version they support in the
* INIT request and reply respectively.
*
* If the major versions match then both shall use the smallest
* of the two minor versions for communication.
*
* If the kernel supports a larger major version, then userspace shall
* reply with the major version it supports, ignore the rest of the
* INIT message and expect a new INIT message from the kernel with a
* matching major version.
*
* If the library supports a larger major version, then it shall fall
* back to the major protocol version sent by the kernel for
* communication and reply with that major version (and an arbitrary
* supported minor version).
*/
/** Version number of this interface */
#define FUSE_KERNEL_VERSION 7
/** Minor version number of this interface */
#define FUSE_KERNEL_MINOR_VERSION 12
#define FUSE_KERNEL_MINOR_VERSION 13
/** The node ID of the root inode */
#define FUSE_ROOT_ID 1
@ -427,7 +451,8 @@ struct fuse_init_out {
__u32 minor;
__u32 max_readahead;
__u32 flags;
__u32 unused;
__u16 max_background;
__u16 congestion_threshold;
__u32 max_write;
};

21
include/linux/genhd.h
View file

@ -98,7 +98,7 @@ struct hd_struct {
int make_it_fail;
#endif
unsigned long stamp;
int in_flight;
int in_flight[2];
#ifdef CONFIG_SMP
struct disk_stats *dkstats;
#else
@ -322,18 +322,23 @@ static inline void free_part_stats(struct hd_struct *part)
#define part_stat_sub(cpu, gendiskp, field, subnd) \
part_stat_add(cpu, gendiskp, field, -subnd)
static inline void part_inc_in_flight(struct hd_struct *part)
static inline void part_inc_in_flight(struct hd_struct *part, int rw)
{
part->in_flight++;
part->in_flight[rw]++;
if (part->partno)
part_to_disk(part)->part0.in_flight++;
part_to_disk(part)->part0.in_flight[rw]++;
}
static inline void part_dec_in_flight(struct hd_struct *part)
static inline void part_dec_in_flight(struct hd_struct *part, int rw)
{
part->in_flight--;
part->in_flight[rw]--;
if (part->partno)
part_to_disk(part)->part0.in_flight--;
part_to_disk(part)->part0.in_flight[rw]--;
}
static inline int part_in_flight(struct hd_struct *part)
{
return part->in_flight[0] + part->in_flight[1];
}
/* block/blk-core.c */
@ -546,6 +551,8 @@ extern ssize_t part_size_show(struct device *dev,
struct device_attribute *attr, char *buf);
extern ssize_t part_stat_show(struct device *dev,
struct device_attribute *attr, char *buf);
extern ssize_t part_inflight_show(struct device *dev,
struct device_attribute *attr, char *buf);
#ifdef CONFIG_FAIL_MAKE_REQUEST
extern ssize_t part_fail_show(struct device *dev,
struct device_attribute *attr, char *buf);

22
include/linux/gfs2_ondisk.h
View file

@ -333,6 +333,28 @@ struct gfs2_leaf {
/*
* Extended attribute header format
*
* This works in a similar way to dirents. There is a fixed size header
* followed by a variable length section made up of the name and the
* associated data. In the case of a "stuffed" entry, the value is
* inline directly after the name, the ea_num_ptrs entry will be
* zero in that case. For non-"stuffed" entries, there will be
* a set of pointers (aligned to 8 byte boundary) to the block(s)
* containing the value.
*
* The blocks containing the values and the blocks containing the
* extended attribute headers themselves all start with the common
* metadata header. Each inode, if it has extended attributes, will
* have either a single block containing the extended attribute headers
* or a single indirect block pointing to blocks containing the
* extended attribure headers.
*
* The maximim size of the data part of an extended attribute is 64k
* so the number of blocks required depends upon block size. Since the
* block size also determines the number of pointers in an indirect
* block, its a fairly complicated calculation to work out the maximum
* number of blocks that an inode may have relating to extended attributes.
*
*/
#define GFS2_EA_MAX_NAME_LEN 255

10
include/linux/hardirq.h
View file

@ -64,6 +64,12 @@
#define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
#define NMI_OFFSET (1UL << NMI_SHIFT)
#ifndef PREEMPT_ACTIVE
#define PREEMPT_ACTIVE_BITS 1
#define PREEMPT_ACTIVE_SHIFT (NMI_SHIFT + NMI_BITS)
#define PREEMPT_ACTIVE (__IRQ_MASK(PREEMPT_ACTIVE_BITS) << PREEMPT_ACTIVE_SHIFT)
#endif
#if PREEMPT_ACTIVE < (1 << (NMI_SHIFT + NMI_BITS))
#error PREEMPT_ACTIVE is too low!
#endif
@ -132,7 +138,7 @@ static inline void account_system_vtime(struct task_struct *tsk)
}
#endif
#if defined(CONFIG_NO_HZ) && !defined(CONFIG_CLASSIC_RCU)
#if defined(CONFIG_NO_HZ)
extern void rcu_irq_enter(void);
extern void rcu_irq_exit(void);
extern void rcu_nmi_enter(void);
@ -142,7 +148,7 @@ extern void rcu_nmi_exit(void);
# define rcu_irq_exit() do { } while (0)
# define rcu_nmi_enter() do { } while (0)
# define rcu_nmi_exit() do { } while (0)
#endif /* #if defined(CONFIG_NO_HZ) && !defined(CONFIG_CLASSIC_RCU) */
#endif /* #if defined(CONFIG_NO_HZ) */
/*
* It is safe to do non-atomic ops on ->hardirq_context,

8
include/linux/hdlc.h
View file

@ -38,7 +38,7 @@ struct hdlc_proto {
int (*ioctl)(struct net_device *dev, struct ifreq *ifr);
__be16 (*type_trans)(struct sk_buff *skb, struct net_device *dev);
int (*netif_rx)(struct sk_buff *skb);
int (*xmit)(struct sk_buff *skb, struct net_device *dev);
netdev_tx_t (*xmit)(struct sk_buff *skb, struct net_device *dev);
struct module *module;
struct hdlc_proto *next; /* next protocol in the list */
};
@ -51,7 +51,7 @@ typedef struct hdlc_device {
unsigned short encoding, unsigned short parity);
/* hardware driver must handle this instead of dev->hard_start_xmit */
int (*xmit)(struct sk_buff *skb, struct net_device *dev);
netdev_tx_t (*xmit)(struct sk_buff *skb, struct net_device *dev);
/* Things below are for HDLC layer internal use only */
const struct hdlc_proto *proto;
@ -60,7 +60,7 @@ typedef struct hdlc_device {
spinlock_t state_lock;
void *state;
void *priv;
}hdlc_device;
} hdlc_device;
@ -106,7 +106,7 @@ void hdlc_close(struct net_device *dev);
/* May be used by hardware driver */
int hdlc_change_mtu(struct net_device *dev, int new_mtu);
/* Must be pointed to by hw driver's dev->netdev_ops->ndo_start_xmit */
int hdlc_start_xmit(struct sk_buff *skb, struct net_device *dev);
netdev_tx_t hdlc_start_xmit(struct sk_buff *skb, struct net_device *dev);
int attach_hdlc_protocol(struct net_device *dev, struct hdlc_proto *proto,
size_t size);

50
include/linux/hid-debug.h
View file

@ -2,7 +2,7 @@
#define __HID_DEBUG_H
/*
* Copyright (c) 2007 Jiri Kosina
* Copyright (c) 2007-2009 Jiri Kosina
*/
/*
@ -22,24 +22,44 @@
*
*/
#ifdef CONFIG_HID_DEBUG
#define HID_DEBUG_BUFSIZE 512
void hid_dump_input(struct hid_usage *, __s32);
void hid_dump_device(struct hid_device *);
void hid_dump_field(struct hid_field *, int);
void hid_resolv_usage(unsigned);
void hid_resolv_event(__u8, __u16);
#ifdef CONFIG_DEBUG_FS
void hid_dump_input(struct hid_device *, struct hid_usage *, __s32);
void hid_dump_device(struct hid_device *, struct seq_file *);
void hid_dump_field(struct hid_field *, int, struct seq_file *);
char *hid_resolv_usage(unsigned, struct seq_file *);
void hid_debug_register(struct hid_device *, const char *);
void hid_debug_unregister(struct hid_device *);
void hid_debug_init(void);
void hid_debug_exit(void);
void hid_debug_event(struct hid_device *, char *);
struct hid_debug_list {
char *hid_debug_buf;
int head;
int tail;
struct fasync_struct *fasync;
struct hid_device *hdev;
struct list_head node;
struct mutex read_mutex;
};
#else
#define hid_dump_input(a,b) do { } while (0)
#define hid_dump_device(c) do { } while (0)
#define hid_dump_field(a,b) do { } while (0)
#define hid_resolv_usage(a) do { } while (0)
#define hid_resolv_event(a,b) do { } while (0)
#endif /* CONFIG_HID_DEBUG */
#define hid_dump_input(a,b,c) do { } while (0)
#define hid_dump_device(a,b) do { } while (0)
#define hid_dump_field(a,b,c) do { } while (0)
#define hid_resolv_usage(a,b) do { } while (0)
#define hid_debug_register(a, b) do { } while (0)
#define hid_debug_unregister(a) do { } while (0)
#define hid_debug_init() do { } while (0)
#define hid_debug_exit() do { } while (0)
#define hid_debug_event(a,b) do { } while (0)
#endif
#endif

22
include/linux/hid.h
View file

@ -500,6 +500,14 @@ struct hid_device { /* device report descriptor */
/* handler for raw output data, used by hidraw */
int (*hid_output_raw_report) (struct hid_device *, __u8 *, size_t);
/* debugging support via debugfs */
unsigned short debug;
struct dentry *debug_dir;
struct dentry *debug_rdesc;
struct dentry *debug_events;
struct list_head debug_list;
wait_queue_head_t debug_wait;
};
static inline void *hid_get_drvdata(struct hid_device *hdev)
@ -657,9 +665,7 @@ struct hid_ll_driver {
/* HID core API */
#ifdef CONFIG_HID_DEBUG
extern int hid_debug;
#endif
extern int hid_add_device(struct hid_device *);
extern void hid_destroy_device(struct hid_device *);
@ -815,21 +821,9 @@ int hid_pidff_init(struct hid_device *hid);
#define hid_pidff_init NULL
#endif
#ifdef CONFIG_HID_DEBUG
#define dbg_hid(format, arg...) if (hid_debug) \
printk(KERN_DEBUG "%s: " format ,\
__FILE__ , ## arg)
#define dbg_hid_line(format, arg...) if (hid_debug) \
printk(format, ## arg)
#else
static inline int __attribute__((format(printf, 1, 2)))
dbg_hid(const char *fmt, ...)
{
return 0;
}
#define dbg_hid_line dbg_hid
#endif /* HID_DEBUG */
#define err_hid(format, arg...) printk(KERN_ERR "%s: " format "\n" , \
__FILE__ , ## arg)
#endif /* HID_FF */

2
include/linux/hrtimer.h
View file

@ -91,7 +91,6 @@ enum hrtimer_restart {
* @function: timer expiry callback function
* @base: pointer to the timer base (per cpu and per clock)
* @state: state information (See bit values above)
* @cb_entry: list head to enqueue an expired timer into the callback list
* @start_site: timer statistics field to store the site where the timer
* was started
* @start_comm: timer statistics field to store the name of the process which
@ -108,7 +107,6 @@ struct hrtimer {
enum hrtimer_restart (*function)(struct hrtimer *);
struct hrtimer_clock_base *base;
unsigned long state;
struct list_head cb_entry;
#ifdef CONFIG_TIMER_STATS
int start_pid;
void *start_site;

113
include/linux/i2c/twl4030.h
View file

@ -25,6 +25,9 @@
#ifndef __TWL4030_H_
#define __TWL4030_H_
#include <linux/types.h>
#include <linux/input/matrix_keypad.h>
/*
* Using the twl4030 core we address registers using a pair
* { module id, relative register offset }
@ -220,19 +223,28 @@ int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
/* Power bus message definitions */
#define DEV_GRP_NULL 0x0
#define DEV_GRP_P1 0x1
#define DEV_GRP_P2 0x2
#define DEV_GRP_P3 0x4
/* The TWL4030/5030 splits its power-management resources (the various
* regulators, clock and reset lines) into 3 processor groups - P1, P2 and
* P3. These groups can then be configured to transition between sleep, wait-on
* and active states by sending messages to the power bus. See Section 5.4.2
* Power Resources of TWL4030 TRM
*/
#define RES_GRP_RES 0x0
#define RES_GRP_PP 0x1
#define RES_GRP_RC 0x2
/* Processor groups */
#define DEV_GRP_NULL 0x0
#define DEV_GRP_P1 0x1 /* P1: all OMAP devices */
#define DEV_GRP_P2 0x2 /* P2: all Modem devices */
#define DEV_GRP_P3 0x4 /* P3: all peripheral devices */
/* Resource groups */
#define RES_GRP_RES 0x0 /* Reserved */
#define RES_GRP_PP 0x1 /* Power providers */
#define RES_GRP_RC 0x2 /* Reset and control */
#define RES_GRP_PP_RC 0x3
#define RES_GRP_PR 0x4
#define RES_GRP_PR 0x4 /* Power references */
#define RES_GRP_PP_PR 0x5
#define RES_GRP_RC_PR 0x6
#define RES_GRP_ALL 0x7
#define RES_GRP_ALL 0x7 /* All resource groups */
#define RES_TYPE2_R0 0x0
@ -243,6 +255,41 @@ int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes);
#define RES_STATE_SLEEP 0x8
#define RES_STATE_OFF 0x0
/* Power resources */
/* Power providers */
#define RES_VAUX1 1
#define RES_VAUX2 2
#define RES_VAUX3 3
#define RES_VAUX4 4
#define RES_VMMC1 5
#define RES_VMMC2 6
#define RES_VPLL1 7
#define RES_VPLL2 8
#define RES_VSIM 9
#define RES_VDAC 10
#define RES_VINTANA1 11
#define RES_VINTANA2 12
#define RES_VINTDIG 13
#define RES_VIO 14
#define RES_VDD1 15
#define RES_VDD2 16
#define RES_VUSB_1V5 17
#define RES_VUSB_1V8 18
#define RES_VUSB_3V1 19
#define RES_VUSBCP 20
#define RES_REGEN 21
/* Reset and control */
#define RES_NRES_PWRON 22
#define RES_CLKEN 23
#define RES_SYSEN 24
#define RES_HFCLKOUT 25
#define RES_32KCLKOUT 26
#define RES_RESET 27
/* Power Reference */
#define RES_Main_Ref 28
#define TOTAL_RESOURCES 28
/*
* Power Bus Message Format ... these can be sent individually by Linux,
* but are usually part of downloaded scripts that are run when various
@ -302,13 +349,17 @@ struct twl4030_madc_platform_data {
int irq_line;
};
/* Boards have uniqe mappings of {col, row} --> keycode.
* Column and row are 4 bits, but range only from 0..7.
* a PERSISTENT_KEY is "always on" and never reported.
*/
#define PERSISTENT_KEY(c, r) KEY((c), (r), KEY_RESERVED)
struct twl4030_keypad_data {
int rows;
int cols;
int *keymap;
int irq;
unsigned int keymapsize;
unsigned int rep:1;
const struct matrix_keymap_data *keymap_data;
unsigned rows;
unsigned cols;
bool rep;
};
enum twl4030_usb_mode {
@ -320,6 +371,36 @@ struct twl4030_usb_data {
enum twl4030_usb_mode usb_mode;
};
struct twl4030_ins {
u16 pmb_message;
u8 delay;
};
struct twl4030_script {
struct twl4030_ins *script;
unsigned size;
u8 flags;
#define TWL4030_WRST_SCRIPT (1<<0)
#define TWL4030_WAKEUP12_SCRIPT (1<<1)
#define TWL4030_WAKEUP3_SCRIPT (1<<2)
#define TWL4030_SLEEP_SCRIPT (1<<3)
};
struct twl4030_resconfig {
u8 resource;
u8 devgroup; /* Processor group that Power resource belongs to */
u8 type; /* Power resource addressed, 6 / broadcast message */
u8 type2; /* Power resource addressed, 3 / broadcast message */
};
struct twl4030_power_data {
struct twl4030_script **scripts;
unsigned num;
struct twl4030_resconfig *resource_config;
};
extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts);
struct twl4030_platform_data {
unsigned irq_base, irq_end;
struct twl4030_bci_platform_data *bci;
@ -327,6 +408,7 @@ struct twl4030_platform_data {
struct twl4030_madc_platform_data *madc;
struct twl4030_keypad_data *keypad;
struct twl4030_usb_data *usb;
struct twl4030_power_data *power;
/* LDO regulators */
struct regulator_init_data *vdac;
@ -357,7 +439,6 @@ int twl4030_sih_setup(int module);
#define TWL4030_VAUX3_DEV_GRP 0x1F
#define TWL4030_VAUX3_DEDICATED 0x22
#if defined(CONFIG_TWL4030_BCI_BATTERY) || \
defined(CONFIG_TWL4030_BCI_BATTERY_MODULE)
extern int twl4030charger_usb_en(int enable);

2
include/linux/icmpv6.h
View file

@ -171,8 +171,6 @@ struct icmp6_filter {
#ifdef __KERNEL__
#include <linux/netdevice.h>
#include <linux/skbuff.h>
extern void icmpv6_send(struct sk_buff *skb,
u8 type, u8 code,

30
include/linux/ide.h
View file

@ -258,6 +258,7 @@ enum {
IDE_TFLAG_DYN = (1 << 5),
IDE_TFLAG_FS = (1 << 6),
IDE_TFLAG_MULTI_PIO = (1 << 7),
IDE_TFLAG_SET_XFER = (1 << 8),
};
enum {
@ -294,7 +295,7 @@ struct ide_cmd {
} out, in;
} valid;
u8 tf_flags;
u16 tf_flags;
u8 ftf_flags; /* for TASKFILE ioctl */
int protocol;
@ -918,8 +919,7 @@ __IDE_PROC_DEVSET(_name, _min, _max, NULL, NULL)
typedef struct {
const char *name;
mode_t mode;
read_proc_t *read_proc;
write_proc_t *write_proc;
const struct file_operations *proc_fops;
} ide_proc_entry_t;
void proc_ide_create(void);
@ -931,24 +931,8 @@ void ide_proc_unregister_port(ide_hwif_t *);
void ide_proc_register_driver(ide_drive_t *, struct ide_driver *);
void ide_proc_unregister_driver(ide_drive_t *, struct ide_driver *);
read_proc_t proc_ide_read_capacity;
read_proc_t proc_ide_read_geometry;
/*
* Standard exit stuff:
*/
#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
{ \
len -= off; \
if (len < count) { \
*eof = 1; \
if (len <= 0) \
return 0; \
} else \
len = count; \
*start = page + off; \
return len; \
}
extern const struct file_operations ide_capacity_proc_fops;
extern const struct file_operations ide_geometry_proc_fops;
#else
static inline void proc_ide_create(void) { ; }
static inline void proc_ide_destroy(void) { ; }
@ -960,7 +944,6 @@ static inline void ide_proc_register_driver(ide_drive_t *drive,
struct ide_driver *driver) { ; }
static inline void ide_proc_unregister_driver(ide_drive_t *drive,
struct ide_driver *driver) { ; }
#define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
#endif
enum {
@ -1081,6 +1064,7 @@ extern void ide_fixstring(u8 *, const int, const int);
int ide_busy_sleep(ide_drive_t *, unsigned long, int);
int __ide_wait_stat(ide_drive_t *, u8, u8, unsigned long, u8 *);
int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
ide_startstop_t ide_do_park_unpark(ide_drive_t *, struct request *);
@ -1169,7 +1153,7 @@ int ide_no_data_taskfile(ide_drive_t *, struct ide_cmd *);
int ide_taskfile_ioctl(ide_drive_t *, unsigned long);
int ide_dev_read_id(ide_drive_t *, u8, u16 *);
int ide_dev_read_id(ide_drive_t *, u8, u16 *, int);
extern int ide_driveid_update(ide_drive_t *);
extern int ide_config_drive_speed(ide_drive_t *, u8);

31
include/linux/ieee80211.h
View file

@ -115,7 +115,7 @@
#define IEEE80211_MAX_SSID_LEN 32
#define IEEE80211_MAX_MESH_ID_LEN 32
#define IEEE80211_MESH_CONFIG_LEN 19
#define IEEE80211_MESH_CONFIG_LEN 24
#define IEEE80211_QOS_CTL_LEN 2
#define IEEE80211_QOS_CTL_TID_MASK 0x000F
@ -802,6 +802,31 @@ struct ieee80211_ht_cap {
#define IEEE80211_HT_AMPDU_PARM_FACTOR 0x03
#define IEEE80211_HT_AMPDU_PARM_DENSITY 0x1C
/*
* Maximum length of AMPDU that the STA can receive.
* Length = 2 ^ (13 + max_ampdu_length_exp) - 1 (octets)
*/
enum ieee80211_max_ampdu_length_exp {
IEEE80211_HT_MAX_AMPDU_8K = 0,
IEEE80211_HT_MAX_AMPDU_16K = 1,
IEEE80211_HT_MAX_AMPDU_32K = 2,
IEEE80211_HT_MAX_AMPDU_64K = 3
};
#define IEEE80211_HT_MAX_AMPDU_FACTOR 13
/* Minimum MPDU start spacing */
enum ieee80211_min_mpdu_spacing {
IEEE80211_HT_MPDU_DENSITY_NONE = 0, /* No restriction */
IEEE80211_HT_MPDU_DENSITY_0_25 = 1, /* 1/4 usec */
IEEE80211_HT_MPDU_DENSITY_0_5 = 2, /* 1/2 usec */
IEEE80211_HT_MPDU_DENSITY_1 = 3, /* 1 usec */
IEEE80211_HT_MPDU_DENSITY_2 = 4, /* 2 usec */
IEEE80211_HT_MPDU_DENSITY_4 = 5, /* 4 usec */
IEEE80211_HT_MPDU_DENSITY_8 = 6, /* 8 usec */
IEEE80211_HT_MPDU_DENSITY_16 = 7 /* 16 usec */
};
/**
* struct ieee80211_ht_info - HT information
*
@ -1196,6 +1221,10 @@ enum ieee80211_sa_query_action {
#define WLAN_CIPHER_SUITE_WEP104 0x000FAC05
#define WLAN_CIPHER_SUITE_AES_CMAC 0x000FAC06
/* AKM suite selectors */
#define WLAN_AKM_SUITE_8021X 0x000FAC01
#define WLAN_AKM_SUITE_PSK 0x000FAC02
#define WLAN_MAX_KEY_LEN 32
/**

1
include/linux/if_addr.h
View file

@ -41,6 +41,7 @@ enum
#define IFA_F_NODAD 0x02
#define IFA_F_OPTIMISTIC 0x04
#define IFA_F_DADFAILED 0x08
#define IFA_F_HOMEADDRESS 0x10
#define IFA_F_DEPRECATED 0x20
#define IFA_F_TENTATIVE 0x40

1
include/linux/if_arp.h
View file

@ -87,7 +87,6 @@
#define ARPHRD_IEEE80211_PRISM 802 /* IEEE 802.11 + Prism2 header */
#define ARPHRD_IEEE80211_RADIOTAP 803 /* IEEE 802.11 + radiotap header */
#define ARPHRD_IEEE802154 804
#define ARPHRD_IEEE802154_PHY 805
#define ARPHRD_PHONET 820 /* PhoNet media type */
#define ARPHRD_PHONET_PIPE 821 /* PhoNet pipe header */

4
include/linux/if_ether.h
View file

@ -139,10 +139,10 @@ extern ssize_t sysfs_format_mac(char *buf, const unsigned char *addr, int len);
/*
* Display a 6 byte device address (MAC) in a readable format.
*/
extern char *print_mac(char *buf, const unsigned char *addr);
extern char *print_mac(char *buf, const unsigned char *addr) __deprecated;
#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x"
#define MAC_BUF_SIZE 18
#define DECLARE_MAC_BUF(var) char var[MAC_BUF_SIZE] __maybe_unused
#define DECLARE_MAC_BUF(var) char var[MAC_BUF_SIZE]
#endif

5
include/linux/if_frad.h
View file

@ -69,11 +69,6 @@ struct dlci_conf {
#define DLCI_VALID_FLAGS 0x000B
/* FRAD driver uses these to indicate what it did with packet */
#define DLCI_RET_OK 0x00
#define DLCI_RET_ERR 0x01
#define DLCI_RET_DROP 0x02
/* defines for the actual Frame Relay hardware */
#define FRAD_GET_CONF (SIOCDEVPRIVATE)
#define FRAD_SET_CONF (SIOCDEVPRIVATE + 1)

1
include/linux/if_tun.h
View file

@ -62,6 +62,7 @@
#define TUN_F_TSO4 0x02 /* I can handle TSO for IPv4 packets */
#define TUN_F_TSO6 0x04 /* I can handle TSO for IPv6 packets */
#define TUN_F_TSO_ECN 0x08 /* I can handle TSO with ECN bits. */
#define TUN_F_UFO 0x10 /* I can handle UFO packets */
/* Protocol info prepended to the packets (when IFF_NO_PI is not set) */
#define TUN_PKT_STRIP 0x0001

2
include/linux/igmp.h
View file

@ -233,6 +233,8 @@ extern void ip_mc_init_dev(struct in_device *);
extern void ip_mc_destroy_dev(struct in_device *);
extern void ip_mc_up(struct in_device *);
extern void ip_mc_down(struct in_device *);
extern void ip_mc_unmap(struct in_device *);
extern void ip_mc_remap(struct in_device *);
extern void ip_mc_dec_group(struct in_device *in_dev, __be32 addr);
extern void ip_mc_inc_group(struct in_device *in_dev, __be32 addr);
extern void ip_mc_rejoin_group(struct ip_mc_list *im);

12
include/linux/init.h
View file

@ -103,8 +103,8 @@
#define __INIT .section ".init.text","ax"
#define __FINIT .previous
#define __INITDATA .section ".init.data","aw"
#define __INITRODATA .section ".init.rodata","a"
#define __INITDATA .section ".init.data","aw",%progbits
#define __INITRODATA .section ".init.rodata","a",%progbits
#define __FINITDATA .previous
#define __DEVINIT .section ".devinit.text", "ax"
@ -305,9 +305,17 @@ void __init parse_early_options(char *cmdline);
#ifdef CONFIG_MODULES
#define __init_or_module
#define __initdata_or_module
#define __initconst_or_module
#define __INIT_OR_MODULE .text
#define __INITDATA_OR_MODULE .data
#define __INITRODATA_OR_MODULE .section ".rodata","a",%progbits
#else
#define __init_or_module __init
#define __initdata_or_module __initdata
#define __initconst_or_module __initconst
#define __INIT_OR_MODULE __INIT
#define __INITDATA_OR_MODULE __INITDATA
#define __INITRODATA_OR_MODULE __INITRODATA
#endif /*CONFIG_MODULES*/
/* Functions marked as __devexit may be discarded at kernel link time, depending

11
include/linux/init_task.h
View file

@ -94,6 +94,16 @@ extern struct group_info init_groups;
# define CAP_INIT_BSET CAP_INIT_EFF_SET
#endif
#ifdef CONFIG_TREE_PREEMPT_RCU
#define INIT_TASK_RCU_PREEMPT(tsk) \
.rcu_read_lock_nesting = 0, \
.rcu_read_unlock_special = 0, \
.rcu_blocked_node = NULL, \
.rcu_node_entry = LIST_HEAD_INIT(tsk.rcu_node_entry),
#else
#define INIT_TASK_RCU_PREEMPT(tsk)
#endif
extern struct cred init_cred;
#ifdef CONFIG_PERF_COUNTERS
@ -173,6 +183,7 @@ extern struct cred init_cred;
INIT_LOCKDEP \
INIT_FTRACE_GRAPH \
INIT_TRACE_RECURSION \
INIT_TASK_RCU_PREEMPT(tsk) \
}

9
include/linux/input/eeti_ts.h Normal file
View file

@ -0,0 +1,9 @@
#ifndef LINUX_INPUT_EETI_TS_H
#define LINUX_INPUT_EETI_TS_H
struct eeti_ts_platform_data {
unsigned int irq_active_high;
};
#endif /* LINUX_INPUT_EETI_TS_H */

32
include/linux/input/matrix_keypad.h
View file

@ -63,4 +63,36 @@ struct matrix_keypad_platform_data {
bool wakeup;
};
/**
* matrix_keypad_build_keymap - convert platform keymap into matrix keymap
* @keymap_data: keymap supplied by the platform code
* @row_shift: number of bits to shift row value by to advance to the next
* line in the keymap
* @keymap: expanded version of keymap that is suitable for use by
* matrix keyboad driver
* @keybit: pointer to bitmap of keys supported by input device
*
* This function converts platform keymap (encoded with KEY() macro) into
* an array of keycodes that is suitable for using in a standard matrix
* keyboard driver that uses row and col as indices.
*/
static inline void
matrix_keypad_build_keymap(const struct matrix_keymap_data *keymap_data,
unsigned int row_shift,
unsigned short *keymap, unsigned long *keybit)
{
int i;
for (i = 0; i < keymap_data->keymap_size; i++) {
unsigned int key = keymap_data->keymap[i];
unsigned int row = KEY_ROW(key);
unsigned int col = KEY_COL(key);
unsigned short code = KEY_VAL(key);
keymap[MATRIX_SCAN_CODE(row, col, row_shift)] = code;
__set_bit(code, keybit);
}
__clear_bit(KEY_RESERVED, keybit);
}
#endif /* _MATRIX_KEYPAD_H */

5
include/linux/interrupt.h
View file

@ -50,6 +50,9 @@
* IRQF_IRQPOLL - Interrupt is used for polling (only the interrupt that is
* registered first in an shared interrupt is considered for
* performance reasons)
* IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler finished.
* Used by threaded interrupts which need to keep the
* irq line disabled until the threaded handler has been run.
*/
#define IRQF_DISABLED 0x00000020
#define IRQF_SAMPLE_RANDOM 0x00000040
@ -59,6 +62,7 @@
#define IRQF_PERCPU 0x00000400
#define IRQF_NOBALANCING 0x00000800
#define IRQF_IRQPOLL 0x00001000
#define IRQF_ONESHOT 0x00002000
/*
* Bits used by threaded handlers:
@ -344,6 +348,7 @@ enum
NET_TX_SOFTIRQ,
NET_RX_SOFTIRQ,
BLOCK_SOFTIRQ,
BLOCK_IOPOLL_SOFTIRQ,
TASKLET_SOFTIRQ,
SCHED_SOFTIRQ,
HRTIMER_SOFTIRQ,

17
include/linux/io-mapping.h
View file

@ -49,23 +49,30 @@ static inline struct io_mapping *
io_mapping_create_wc(resource_size_t base, unsigned long size)
{
struct io_mapping *iomap;
if (!is_io_mapping_possible(base, size))
return NULL;
pgprot_t prot;
iomap = kmalloc(sizeof(*iomap), GFP_KERNEL);
if (!iomap)
return NULL;
goto out_err;
if (iomap_create_wc(base, size, &prot))
goto out_free;
iomap->base = base;
iomap->size = size;
iomap->prot = pgprot_writecombine(__pgprot(__PAGE_KERNEL));
iomap->prot = prot;
return iomap;
out_free:
kfree(iomap);
out_err:
return NULL;
}
static inline void
io_mapping_free(struct io_mapping *mapping)
{
iomap_free(mapping->base, mapping->size);
kfree(mapping);
}

18
include/linux/irq.h
View file

@ -69,6 +69,8 @@ typedef void (*irq_flow_handler_t)(unsigned int irq,
#define IRQ_MOVE_PCNTXT 0x01000000 /* IRQ migration from process context */
#define IRQ_AFFINITY_SET 0x02000000 /* IRQ affinity was set from userspace*/
#define IRQ_SUSPENDED 0x04000000 /* IRQ has gone through suspend sequence */
#define IRQ_ONESHOT 0x08000000 /* IRQ is not unmasked after hardirq */
#define IRQ_NESTED_THREAD 0x10000000 /* IRQ is nested into another, no own handler thread */
#ifdef CONFIG_IRQ_PER_CPU
# define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
@ -100,6 +102,9 @@ struct msi_desc;
* @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
* @set_wake: enable/disable power-management wake-on of an IRQ
*
* @bus_lock: function to lock access to slow bus (i2c) chips
* @bus_sync_unlock: function to sync and unlock slow bus (i2c) chips
*
* @release: release function solely used by UML
* @typename: obsoleted by name, kept as migration helper
*/
@ -123,6 +128,9 @@ struct irq_chip {
int (*set_type)(unsigned int irq, unsigned int flow_type);
int (*set_wake)(unsigned int irq, unsigned int on);
void (*bus_lock)(unsigned int irq);
void (*bus_sync_unlock)(unsigned int irq);
/* Currently used only by UML, might disappear one day.*/
#ifdef CONFIG_IRQ_RELEASE_METHOD
void (*release)(unsigned int irq, void *dev_id);
@ -219,13 +227,6 @@ static inline struct irq_desc *move_irq_desc(struct irq_desc *desc, int node)
extern struct irq_desc *irq_to_desc_alloc_node(unsigned int irq, int node);
/*
* Migration helpers for obsolete names, they will go away:
*/
#define hw_interrupt_type irq_chip
#define no_irq_type no_irq_chip
typedef struct irq_desc irq_desc_t;
/*
* Pick up the arch-dependent methods:
*/
@ -289,6 +290,7 @@ extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
extern void handle_nested_irq(unsigned int irq);
/*
* Monolithic do_IRQ implementation.
@ -379,6 +381,8 @@ set_irq_chained_handler(unsigned int irq,
__set_irq_handler(irq, handle, 1, NULL);
}
extern void set_irq_nested_thread(unsigned int irq, int nest);
extern void set_irq_noprobe(unsigned int irq);
extern void set_irq_probe(unsigned int irq);

6
include/linux/irqnr.h
View file

@ -41,6 +41,12 @@ extern struct irq_desc *irq_to_desc(unsigned int irq);
; \
else
#ifdef CONFIG_SMP
#define irq_node(irq) (irq_to_desc(irq)->node)
#else
#define irq_node(irq) 0
#endif
#endif /* CONFIG_GENERIC_HARDIRQS */
#define for_each_irq_nr(irq) \

82
include/linux/isdn/hdlc.h Normal file
View file

@ -0,0 +1,82 @@
/*
* hdlc.h -- General purpose ISDN HDLC decoder.
*
* Implementation of a HDLC decoder/encoder in software.
* Neccessary because some ISDN devices don't have HDLC
* controllers.
*
* Copyright (C)
* 2009 Karsten Keil <keil@b1-systems.de>
* 2002 Wolfgang Mües <wolfgang@iksw-muees.de>
* 2001 Frode Isaksen <fisaksen@bewan.com>
* 2001 Kai Germaschewski <kai.germaschewski@gmx.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __ISDNHDLC_H__
#define __ISDNHDLC_H__
struct isdnhdlc_vars {
int bit_shift;
int hdlc_bits1;
int data_bits;
int ffbit_shift; /* encoding only */
int state;
int dstpos;
u16 crc;
u8 cbin;
u8 shift_reg;
u8 ffvalue;
/* set if transferring data */
u32 data_received:1;
/* set if D channel (send idle instead of flags) */
u32 dchannel:1;
/* set if 56K adaptation */
u32 do_adapt56:1;
/* set if in closing phase (need to send CRC + flag) */
u32 do_closing:1;
/* set if data is bitreverse */
u32 do_bitreverse:1;
};
/* Feature Flags */
#define HDLC_56KBIT 0x01
#define HDLC_DCHANNEL 0x02
#define HDLC_BITREVERSE 0x04
/*
The return value from isdnhdlc_decode is
the frame length, 0 if no complete frame was decoded,
or a negative error number
*/
#define HDLC_FRAMING_ERROR 1
#define HDLC_CRC_ERROR 2
#define HDLC_LENGTH_ERROR 3
extern void isdnhdlc_rcv_init(struct isdnhdlc_vars *hdlc, u32 features);
extern int isdnhdlc_decode(struct isdnhdlc_vars *hdlc, const u8 *src,
int slen, int *count, u8 *dst, int dsize);
extern void isdnhdlc_out_init(struct isdnhdlc_vars *hdlc, u32 features);
extern int isdnhdlc_encode(struct isdnhdlc_vars *hdlc, const u8 *src,
u16 slen, int *count, u8 *dst, int dsize);
#endif /* __ISDNHDLC_H__ */

26
include/linux/jbd.h
View file

@ -446,7 +446,7 @@ struct transaction_s
/*
* Where in the log does this transaction's commit start? [no locking]
*/
unsigned long t_log_start;
unsigned int t_log_start;
/* Number of buffers on the t_buffers list [j_list_lock] */
int t_nr_buffers;
@ -701,26 +701,26 @@ struct journal_s
* Journal head: identifies the first unused block in the journal.
* [j_state_lock]
*/
unsigned long j_head;
unsigned int j_head;
/*
* Journal tail: identifies the oldest still-used block in the journal.
* [j_state_lock]
*/
unsigned long j_tail;
unsigned int j_tail;
/*
* Journal free: how many free blocks are there in the journal?
* [j_state_lock]
*/
unsigned long j_free;
unsigned int j_free;
/*
* Journal start and end: the block numbers of the first usable block
* and one beyond the last usable block in the journal. [j_state_lock]
*/
unsigned long j_first;
unsigned long j_last;
unsigned int j_first;
unsigned int j_last;
/*
* Device, blocksize and starting block offset for the location where we
@ -728,7 +728,7 @@ struct journal_s
*/
struct block_device *j_dev;
int j_blocksize;
unsigned long j_blk_offset;
unsigned int j_blk_offset;
/*
* Device which holds the client fs. For internal journal this will be
@ -859,7 +859,7 @@ extern void __journal_clean_data_list(transaction_t *transaction);
/* Log buffer allocation */
extern struct journal_head * journal_get_descriptor_buffer(journal_t *);
int journal_next_log_block(journal_t *, unsigned long *);
int journal_next_log_block(journal_t *, unsigned int *);
/* Commit management */
extern void journal_commit_transaction(journal_t *);
@ -874,7 +874,7 @@ extern int
journal_write_metadata_buffer(transaction_t *transaction,
struct journal_head *jh_in,
struct journal_head **jh_out,
unsigned long blocknr);
unsigned int blocknr);
/* Transaction locking */
extern void __wait_on_journal (journal_t *);
@ -942,7 +942,7 @@ extern void journal_abort (journal_t *, int);
extern int journal_errno (journal_t *);
extern void journal_ack_err (journal_t *);
extern int journal_clear_err (journal_t *);
extern int journal_bmap(journal_t *, unsigned long, unsigned long *);
extern int journal_bmap(journal_t *, unsigned int, unsigned int *);
extern int journal_force_commit(journal_t *);
/*
@ -976,14 +976,14 @@ extern int journal_init_revoke_caches(void);
extern void journal_destroy_revoke(journal_t *);
extern int journal_revoke (handle_t *,
unsigned long, struct buffer_head *);
unsigned int, struct buffer_head *);
extern int journal_cancel_revoke(handle_t *, struct journal_head *);
extern void journal_write_revoke_records(journal_t *,
transaction_t *, int);
/* Recovery revoke support */
extern int journal_set_revoke(journal_t *, unsigned long, tid_t);
extern int journal_test_revoke(journal_t *, unsigned long, tid_t);
extern int journal_set_revoke(journal_t *, unsigned int, tid_t);
extern int journal_test_revoke(journal_t *, unsigned int, tid_t);
extern void journal_clear_revoke(journal_t *);
extern void journal_switch_revoke_table(journal_t *journal);

2
include/linux/jbd2.h
View file

@ -652,7 +652,7 @@ struct transaction_s
* This transaction is being forced and some process is
* waiting for it to finish.
*/
int t_synchronous_commit:1;
unsigned int t_synchronous_commit:1;
/*
* For use by the filesystem to store fs-specific data

5
include/linux/kernel.h
View file

@ -125,7 +125,7 @@ extern int _cond_resched(void);
#endif
#ifdef CONFIG_DEBUG_SPINLOCK_SLEEP
void __might_sleep(char *file, int line);
void __might_sleep(char *file, int line, int preempt_offset);
/**
* might_sleep - annotation for functions that can sleep
*
@ -137,8 +137,9 @@ extern int _cond_resched(void);
* supposed to.
*/
# define might_sleep() \
do { __might_sleep(__FILE__, __LINE__); might_resched(); } while (0)
do { __might_sleep(__FILE__, __LINE__, 0); might_resched(); } while (0)
#else
static inline void __might_sleep(char *file, int line, int preempt_offset) { }
# define might_sleep() do { might_resched(); } while (0)
#endif

8
include/linux/key.h
View file

@ -129,7 +129,10 @@ struct key {
struct rw_semaphore sem; /* change vs change sem */
struct key_user *user; /* owner of this key */
void *security; /* security data for this key */
time_t expiry; /* time at which key expires (or 0) */
union {
time_t expiry; /* time at which key expires (or 0) */
time_t revoked_at; /* time at which key was revoked */
};
uid_t uid;
gid_t gid;
key_perm_t perm; /* access permissions */
@ -275,6 +278,8 @@ static inline key_serial_t key_serial(struct key *key)
extern ctl_table key_sysctls[];
#endif
extern void key_replace_session_keyring(void);
/*
* the userspace interface
*/
@ -297,6 +302,7 @@ extern void key_init(void);
#define key_fsuid_changed(t) do { } while(0)
#define key_fsgid_changed(t) do { } while(0)
#define key_init() do { } while(0)
#define key_replace_session_keyring() do { } while(0)
#endif /* CONFIG_KEYS */
#endif /* __KERNEL__ */

1
include/linux/keyctl.h
View file

@ -52,5 +52,6 @@
#define KEYCTL_SET_TIMEOUT 15 /* set key timeout */
#define KEYCTL_ASSUME_AUTHORITY 16 /* assume request_key() authorisation */
#define KEYCTL_GET_SECURITY 17 /* get key security label */
#define KEYCTL_SESSION_TO_PARENT 18 /* apply session keyring to parent process */
#endif /* _LINUX_KEYCTL_H */

7
include/linux/kmemcheck.h
View file

@ -34,6 +34,8 @@ void kmemcheck_mark_initialized_pages(struct page *p, unsigned int n);
int kmemcheck_show_addr(unsigned long address);
int kmemcheck_hide_addr(unsigned long address);
bool kmemcheck_is_obj_initialized(unsigned long addr, size_t size);
#else
#define kmemcheck_enabled 0
@ -99,6 +101,11 @@ static inline void kmemcheck_mark_initialized_pages(struct page *p,
{
}
static inline bool kmemcheck_is_obj_initialized(unsigned long addr, size_t size)
{
return true;
}
#endif /* CONFIG_KMEMCHECK */
/*

18
include/linux/kmemleak.h
View file

@ -23,18 +23,18 @@
#ifdef CONFIG_DEBUG_KMEMLEAK
extern void kmemleak_init(void);
extern void kmemleak_init(void) __ref;
extern void kmemleak_alloc(const void *ptr, size_t size, int min_count,
gfp_t gfp);
extern void kmemleak_free(const void *ptr);
extern void kmemleak_free_part(const void *ptr, size_t size);
gfp_t gfp) __ref;
extern void kmemleak_free(const void *ptr) __ref;
extern void kmemleak_free_part(const void *ptr, size_t size) __ref;
extern void kmemleak_padding(const void *ptr, unsigned long offset,
size_t size);
extern void kmemleak_not_leak(const void *ptr);
extern void kmemleak_ignore(const void *ptr);
size_t size) __ref;
extern void kmemleak_not_leak(const void *ptr) __ref;
extern void kmemleak_ignore(const void *ptr) __ref;
extern void kmemleak_scan_area(const void *ptr, unsigned long offset,
size_t length, gfp_t gfp);
extern void kmemleak_no_scan(const void *ptr);
size_t length, gfp_t gfp) __ref;
extern void kmemleak_no_scan(const void *ptr) __ref;
static inline void kmemleak_alloc_recursive(const void *ptr, size_t size,
int min_count, unsigned long flags,

4
include/linux/kprobes.h
View file

@ -48,13 +48,13 @@
#define KPROBE_HIT_SSDONE 0x00000008
/* Attach to insert probes on any functions which should be ignored*/
#define __kprobes __attribute__((__section__(".kprobes.text"))) notrace
#define __kprobes __attribute__((__section__(".kprobes.text")))
#else /* CONFIG_KPROBES */
typedef int kprobe_opcode_t;
struct arch_specific_insn {
int dummy;
};
#define __kprobes notrace
#define __kprobes
#endif /* CONFIG_KPROBES */
struct kprobe;

127
include/linux/kvm.h
View file

@ -14,7 +14,7 @@
#define KVM_API_VERSION 12
/* for KVM_TRACE_ENABLE */
/* for KVM_TRACE_ENABLE, deprecated */
struct kvm_user_trace_setup {
__u32 buf_size; /* sub_buffer size of each per-cpu */
__u32 buf_nr; /* the number of sub_buffers of each per-cpu */
@ -70,6 +70,14 @@ struct kvm_irqchip {
} chip;
};
/* for KVM_CREATE_PIT2 */
struct kvm_pit_config {
__u32 flags;
__u32 pad[15];
};
#define KVM_PIT_SPEAKER_DUMMY 1
#define KVM_EXIT_UNKNOWN 0
#define KVM_EXIT_EXCEPTION 1
#define KVM_EXIT_IO 2
@ -87,6 +95,10 @@ struct kvm_irqchip {
#define KVM_EXIT_S390_RESET 14
#define KVM_EXIT_DCR 15
#define KVM_EXIT_NMI 16
#define KVM_EXIT_INTERNAL_ERROR 17
/* For KVM_EXIT_INTERNAL_ERROR */
#define KVM_INTERNAL_ERROR_EMULATION 1
/* for KVM_RUN, returned by mmap(vcpu_fd, offset=0) */
struct kvm_run {
@ -173,6 +185,9 @@ struct kvm_run {
__u32 data;
__u8 is_write;
} dcr;
struct {
__u32 suberror;
} internal;
/* Fix the size of the union. */
char padding[256];
};
@ -292,6 +307,28 @@ struct kvm_guest_debug {
struct kvm_guest_debug_arch arch;
};
enum {
kvm_ioeventfd_flag_nr_datamatch,
kvm_ioeventfd_flag_nr_pio,
kvm_ioeventfd_flag_nr_deassign,
kvm_ioeventfd_flag_nr_max,
};
#define KVM_IOEVENTFD_FLAG_DATAMATCH (1 << kvm_ioeventfd_flag_nr_datamatch)
#define KVM_IOEVENTFD_FLAG_PIO (1 << kvm_ioeventfd_flag_nr_pio)
#define KVM_IOEVENTFD_FLAG_DEASSIGN (1 << kvm_ioeventfd_flag_nr_deassign)
#define KVM_IOEVENTFD_VALID_FLAG_MASK ((1 << kvm_ioeventfd_flag_nr_max) - 1)
struct kvm_ioeventfd {
__u64 datamatch;
__u64 addr; /* legal pio/mmio address */
__u32 len; /* 1, 2, 4, or 8 bytes */
__s32 fd;
__u32 flags;
__u8 pad[36];
};
#define KVM_TRC_SHIFT 16
/*
* kvm trace categories
@ -310,35 +347,6 @@ struct kvm_guest_debug {
#define KVM_TRC_CYCLE_SIZE 8
#define KVM_TRC_EXTRA_MAX 7
/* This structure represents a single trace buffer record. */
struct kvm_trace_rec {
/* variable rec_val
* is split into:
* bits 0 - 27 -> event id
* bits 28 -30 -> number of extra data args of size u32
* bits 31 -> binary indicator for if tsc is in record
*/
__u32 rec_val;
__u32 pid;
__u32 vcpu_id;
union {
struct {
__u64 timestamp;
__u32 extra_u32[KVM_TRC_EXTRA_MAX];
} __attribute__((packed)) timestamp;
struct {
__u32 extra_u32[KVM_TRC_EXTRA_MAX];
} notimestamp;
} u;
};
#define TRACE_REC_EVENT_ID(val) \
(0x0fffffff & (val))
#define TRACE_REC_NUM_DATA_ARGS(val) \
(0x70000000 & ((val) << 28))
#define TRACE_REC_TCS(val) \
(0x80000000 & ((val) << 31))
#define KVMIO 0xAE
/*
@ -415,6 +423,19 @@ struct kvm_trace_rec {
#define KVM_CAP_ASSIGN_DEV_IRQ 29
/* Another bug in KVM_SET_USER_MEMORY_REGION fixed: */
#define KVM_CAP_JOIN_MEMORY_REGIONS_WORKS 30
#ifdef __KVM_HAVE_MCE
#define KVM_CAP_MCE 31
#endif
#define KVM_CAP_IRQFD 32
#ifdef __KVM_HAVE_PIT
#define KVM_CAP_PIT2 33
#endif
#define KVM_CAP_SET_BOOT_CPU_ID 34
#ifdef __KVM_HAVE_PIT_STATE2
#define KVM_CAP_PIT_STATE2 35
#endif
#define KVM_CAP_IOEVENTFD 36
#define KVM_CAP_SET_IDENTITY_MAP_ADDR 37
#ifdef KVM_CAP_IRQ_ROUTING
@ -454,15 +475,32 @@ struct kvm_irq_routing {
#endif
#ifdef KVM_CAP_MCE
/* x86 MCE */
struct kvm_x86_mce {
__u64 status;
__u64 addr;
__u64 misc;
__u64 mcg_status;
__u8 bank;
__u8 pad1[7];
__u64 pad2[3];
};
#endif
#define KVM_IRQFD_FLAG_DEASSIGN (1 << 0)
struct kvm_irqfd {
__u32 fd;
__u32 gsi;
__u32 flags;
__u8 pad[20];
};
/*
* ioctls for VM fds
*/
#define KVM_SET_MEMORY_REGION _IOW(KVMIO, 0x40, struct kvm_memory_region)
#define KVM_SET_NR_MMU_PAGES _IO(KVMIO, 0x44)
#define KVM_GET_NR_MMU_PAGES _IO(KVMIO, 0x45)
#define KVM_SET_USER_MEMORY_REGION _IOW(KVMIO, 0x46,\
struct kvm_userspace_memory_region)
#define KVM_SET_TSS_ADDR _IO(KVMIO, 0x47)
/*
* KVM_CREATE_VCPU receives as a parameter the vcpu slot, and returns
* a vcpu fd.
@ -470,6 +508,12 @@ struct kvm_irq_routing {
#define KVM_CREATE_VCPU _IO(KVMIO, 0x41)
#define KVM_GET_DIRTY_LOG _IOW(KVMIO, 0x42, struct kvm_dirty_log)
#define KVM_SET_MEMORY_ALIAS _IOW(KVMIO, 0x43, struct kvm_memory_alias)
#define KVM_SET_NR_MMU_PAGES _IO(KVMIO, 0x44)
#define KVM_GET_NR_MMU_PAGES _IO(KVMIO, 0x45)
#define KVM_SET_USER_MEMORY_REGION _IOW(KVMIO, 0x46,\
struct kvm_userspace_memory_region)
#define KVM_SET_TSS_ADDR _IO(KVMIO, 0x47)
#define KVM_SET_IDENTITY_MAP_ADDR _IOW(KVMIO, 0x48, __u64)
/* Device model IOC */
#define KVM_CREATE_IRQCHIP _IO(KVMIO, 0x60)
#define KVM_IRQ_LINE _IOW(KVMIO, 0x61, struct kvm_irq_level)
@ -498,6 +542,10 @@ struct kvm_irq_routing {
#define KVM_ASSIGN_SET_MSIX_ENTRY \
_IOW(KVMIO, 0x74, struct kvm_assigned_msix_entry)
#define KVM_DEASSIGN_DEV_IRQ _IOW(KVMIO, 0x75, struct kvm_assigned_irq)
#define KVM_IRQFD _IOW(KVMIO, 0x76, struct kvm_irqfd)
#define KVM_CREATE_PIT2 _IOW(KVMIO, 0x77, struct kvm_pit_config)
#define KVM_SET_BOOT_CPU_ID _IO(KVMIO, 0x78)
#define KVM_IOEVENTFD _IOW(KVMIO, 0x79, struct kvm_ioeventfd)
/*
* ioctls for vcpu fds
@ -541,6 +589,10 @@ struct kvm_irq_routing {
#define KVM_NMI _IO(KVMIO, 0x9a)
/* Available with KVM_CAP_SET_GUEST_DEBUG */
#define KVM_SET_GUEST_DEBUG _IOW(KVMIO, 0x9b, struct kvm_guest_debug)
/* MCE for x86 */
#define KVM_X86_SETUP_MCE _IOW(KVMIO, 0x9c, __u64)
#define KVM_X86_GET_MCE_CAP_SUPPORTED _IOR(KVMIO, 0x9d, __u64)
#define KVM_X86_SET_MCE _IOW(KVMIO, 0x9e, struct kvm_x86_mce)
/*
* Deprecated interfaces
@ -563,6 +615,9 @@ struct kvm_debug_guest {
#define KVM_IA64_VCPU_GET_STACK _IOR(KVMIO, 0x9a, void *)
#define KVM_IA64_VCPU_SET_STACK _IOW(KVMIO, 0x9b, void *)
#define KVM_GET_PIT2 _IOR(KVMIO, 0x9f, struct kvm_pit_state2)
#define KVM_SET_PIT2 _IOW(KVMIO, 0xa0, struct kvm_pit_state2)
#define KVM_TRC_INJ_VIRQ (KVM_TRC_HANDLER + 0x02)
#define KVM_TRC_REDELIVER_EVT (KVM_TRC_HANDLER + 0x03)
#define KVM_TRC_PEND_INTR (KVM_TRC_HANDLER + 0x04)
@ -633,7 +688,7 @@ struct kvm_assigned_msix_nr {
__u16 padding;
};
#define KVM_MAX_MSIX_PER_DEV 512
#define KVM_MAX_MSIX_PER_DEV 256
struct kvm_assigned_msix_entry {
__u32 assigned_dev_id;
__u32 gsi;

114
include/linux/kvm_host.h
View file

@ -42,6 +42,7 @@
#define KVM_USERSPACE_IRQ_SOURCE_ID 0
struct kvm;
struct kvm_vcpu;
extern struct kmem_cache *kvm_vcpu_cache;
@ -59,10 +60,18 @@ struct kvm_io_bus {
void kvm_io_bus_init(struct kvm_io_bus *bus);
void kvm_io_bus_destroy(struct kvm_io_bus *bus);
struct kvm_io_device *kvm_io_bus_find_dev(struct kvm_io_bus *bus,
gpa_t addr, int len, int is_write);
void kvm_io_bus_register_dev(struct kvm_io_bus *bus,
struct kvm_io_device *dev);
int kvm_io_bus_write(struct kvm_io_bus *bus, gpa_t addr, int len,
const void *val);
int kvm_io_bus_read(struct kvm_io_bus *bus, gpa_t addr, int len,
void *val);
int __kvm_io_bus_register_dev(struct kvm_io_bus *bus,
struct kvm_io_device *dev);
int kvm_io_bus_register_dev(struct kvm *kvm, struct kvm_io_bus *bus,
struct kvm_io_device *dev);
void __kvm_io_bus_unregister_dev(struct kvm_io_bus *bus,
struct kvm_io_device *dev);
void kvm_io_bus_unregister_dev(struct kvm *kvm, struct kvm_io_bus *bus,
struct kvm_io_device *dev);
struct kvm_vcpu {
struct kvm *kvm;
@ -103,7 +112,7 @@ struct kvm_memory_slot {
struct {
unsigned long rmap_pde;
int write_count;
} *lpage_info;
} *lpage_info[KVM_NR_PAGE_SIZES - 1];
unsigned long userspace_addr;
int user_alloc;
};
@ -124,7 +133,6 @@ struct kvm_kernel_irq_routing_entry {
};
struct kvm {
struct mutex lock; /* protects the vcpus array and APIC accesses */
spinlock_t mmu_lock;
spinlock_t requests_lock;
struct rw_semaphore slots_lock;
@ -132,10 +140,23 @@ struct kvm {
int nmemslots;
struct kvm_memory_slot memslots[KVM_MEMORY_SLOTS +
KVM_PRIVATE_MEM_SLOTS];
#ifdef CONFIG_KVM_APIC_ARCHITECTURE
u32 bsp_vcpu_id;
struct kvm_vcpu *bsp_vcpu;
#endif
struct kvm_vcpu *vcpus[KVM_MAX_VCPUS];
atomic_t online_vcpus;
struct list_head vm_list;
struct mutex lock;
struct kvm_io_bus mmio_bus;
struct kvm_io_bus pio_bus;
#ifdef CONFIG_HAVE_KVM_EVENTFD
struct {
spinlock_t lock;
struct list_head items;
} irqfds;
struct list_head ioeventfds;
#endif
struct kvm_vm_stat stat;
struct kvm_arch arch;
atomic_t users_count;
@ -144,6 +165,7 @@ struct kvm {
struct kvm_coalesced_mmio_ring *coalesced_mmio_ring;
#endif
struct mutex irq_lock;
#ifdef CONFIG_HAVE_KVM_IRQCHIP
struct list_head irq_routing; /* of kvm_kernel_irq_routing_entry */
struct hlist_head mask_notifier_list;
@ -167,6 +189,17 @@ struct kvm {
#define kvm_printf(kvm, fmt ...) printk(KERN_DEBUG fmt)
#define vcpu_printf(vcpu, fmt...) kvm_printf(vcpu->kvm, fmt)
static inline struct kvm_vcpu *kvm_get_vcpu(struct kvm *kvm, int i)
{
smp_rmb();
return kvm->vcpus[i];
}
#define kvm_for_each_vcpu(idx, vcpup, kvm) \
for (idx = 0, vcpup = kvm_get_vcpu(kvm, idx); \
idx < atomic_read(&kvm->online_vcpus) && vcpup; \
vcpup = kvm_get_vcpu(kvm, ++idx))
int kvm_vcpu_init(struct kvm_vcpu *vcpu, struct kvm *kvm, unsigned id);
void kvm_vcpu_uninit(struct kvm_vcpu *vcpu);
@ -201,6 +234,7 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
struct kvm_userspace_memory_region *mem,
struct kvm_memory_slot old,
int user_alloc);
void kvm_disable_largepages(void);
void kvm_arch_flush_shadow(struct kvm *kvm);
gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn);
struct page *gfn_to_page(struct kvm *kvm, gfn_t gfn);
@ -243,8 +277,6 @@ long kvm_arch_dev_ioctl(struct file *filp,
unsigned int ioctl, unsigned long arg);
long kvm_arch_vcpu_ioctl(struct file *filp,
unsigned int ioctl, unsigned long arg);
void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu);
void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu);
int kvm_dev_ioctl_check_extension(long ext);
@ -300,7 +332,6 @@ int kvm_arch_hardware_setup(void);
void kvm_arch_hardware_unsetup(void);
void kvm_arch_check_processor_compat(void *rtn);
int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu);
int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
void kvm_free_physmem(struct kvm *kvm);
@ -309,8 +340,6 @@ void kvm_arch_destroy_vm(struct kvm *kvm);
void kvm_free_all_assigned_devices(struct kvm *kvm);
void kvm_arch_sync_events(struct kvm *kvm);
int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
int kvm_cpu_has_interrupt(struct kvm_vcpu *v);
int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu);
void kvm_vcpu_kick(struct kvm_vcpu *vcpu);
@ -366,7 +395,8 @@ int kvm_set_irq(struct kvm *kvm, int irq_source_id, int irq, int level);
void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin);
void kvm_register_irq_ack_notifier(struct kvm *kvm,
struct kvm_irq_ack_notifier *kian);
void kvm_unregister_irq_ack_notifier(struct kvm_irq_ack_notifier *kian);
void kvm_unregister_irq_ack_notifier(struct kvm *kvm,
struct kvm_irq_ack_notifier *kian);
int kvm_request_irq_source_id(struct kvm *kvm);
void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id);
@ -459,37 +489,6 @@ struct kvm_stats_debugfs_item {
extern struct kvm_stats_debugfs_item debugfs_entries[];
extern struct dentry *kvm_debugfs_dir;
#define KVMTRACE_5D(evt, vcpu, d1, d2, d3, d4, d5, name) \
trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
vcpu, 5, d1, d2, d3, d4, d5)
#define KVMTRACE_4D(evt, vcpu, d1, d2, d3, d4, name) \
trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
vcpu, 4, d1, d2, d3, d4, 0)
#define KVMTRACE_3D(evt, vcpu, d1, d2, d3, name) \
trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
vcpu, 3, d1, d2, d3, 0, 0)
#define KVMTRACE_2D(evt, vcpu, d1, d2, name) \
trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
vcpu, 2, d1, d2, 0, 0, 0)
#define KVMTRACE_1D(evt, vcpu, d1, name) \
trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
vcpu, 1, d1, 0, 0, 0, 0)
#define KVMTRACE_0D(evt, vcpu, name) \
trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
vcpu, 0, 0, 0, 0, 0, 0)
#ifdef CONFIG_KVM_TRACE
int kvm_trace_ioctl(unsigned int ioctl, unsigned long arg);
void kvm_trace_cleanup(void);
#else
static inline
int kvm_trace_ioctl(unsigned int ioctl, unsigned long arg)
{
return -EINVAL;
}
#define kvm_trace_cleanup() ((void)0)
#endif
#ifdef KVM_ARCH_WANT_MMU_NOTIFIER
static inline int mmu_notifier_retry(struct kvm_vcpu *vcpu, unsigned long mmu_seq)
{
@ -525,4 +524,33 @@ static inline void kvm_free_irq_routing(struct kvm *kvm) {}
#endif
#ifdef CONFIG_HAVE_KVM_EVENTFD
void kvm_eventfd_init(struct kvm *kvm);
int kvm_irqfd(struct kvm *kvm, int fd, int gsi, int flags);
void kvm_irqfd_release(struct kvm *kvm);
int kvm_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args);
#else
static inline void kvm_eventfd_init(struct kvm *kvm) {}
static inline int kvm_irqfd(struct kvm *kvm, int fd, int gsi, int flags)
{
return -EINVAL;
}
static inline void kvm_irqfd_release(struct kvm *kvm) {}
static inline int kvm_ioeventfd(struct kvm *kvm, struct kvm_ioeventfd *args)
{
return -ENOSYS;
}
#endif /* CONFIG_HAVE_KVM_EVENTFD */
#ifdef CONFIG_KVM_APIC_ARCHITECTURE
static inline bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
{
return vcpu->kvm->bsp_vcpu_id == vcpu->vcpu_id;
}
#endif
#endif

1
include/linux/kvm_para.h
View file

@ -13,6 +13,7 @@
#define KVM_ENOSYS 1000
#define KVM_EFAULT EFAULT
#define KVM_E2BIG E2BIG
#define KVM_EPERM EPERM
#define KVM_HC_VAPIC_POLL_IRQ 1
#define KVM_HC_MMU_OP 2

3
include/linux/libata.h
View file

@ -143,7 +143,6 @@ enum {
ATA_DFLAG_PIO = (1 << 12), /* device limited to PIO mode */
ATA_DFLAG_NCQ_OFF = (1 << 13), /* device limited to non-NCQ mode */
ATA_DFLAG_SPUNDOWN = (1 << 14), /* XXX: for spindown_compat */
ATA_DFLAG_SLEEPING = (1 << 15), /* device is sleeping */
ATA_DFLAG_DUBIOUS_XFER = (1 << 16), /* data transfer not verified */
ATA_DFLAG_NO_UNLOAD = (1 << 17), /* device doesn't support unload */
@ -190,6 +189,7 @@ enum {
ATA_FLAG_NO_POWEROFF_SPINDOWN = (1 << 11), /* don't spindown before poweroff */
ATA_FLAG_NO_HIBERNATE_SPINDOWN = (1 << 12), /* don't spindown before hibernation */
ATA_FLAG_DEBUGMSG = (1 << 13),
ATA_FLAG_FPDMA_AA = (1 << 14), /* driver supports Auto-Activate */
ATA_FLAG_IGN_SIMPLEX = (1 << 15), /* ignore SIMPLEX */
ATA_FLAG_NO_IORDY = (1 << 16), /* controller lacks iordy */
ATA_FLAG_ACPI_SATA = (1 << 17), /* need native SATA ACPI layout */
@ -386,6 +386,7 @@ enum {
ATA_HORKAGE_FIRMWARE_WARN = (1 << 12), /* firmware update warning */
ATA_HORKAGE_1_5_GBPS = (1 << 13), /* force 1.5 Gbps */
ATA_HORKAGE_NOSETXFER = (1 << 14), /* skip SETXFER, SATA only */
ATA_HORKAGE_BROKEN_FPDMA_AA = (1 << 15), /* skip AA */
/* DMA mask for user DMA control: User visible values; DO NOT
renumber */

1
include/linux/libps2.h
View file

@ -44,6 +44,7 @@ struct ps2dev {
void ps2_init(struct ps2dev *ps2dev, struct serio *serio);
int ps2_sendbyte(struct ps2dev *ps2dev, unsigned char byte, int timeout);
void ps2_drain(struct ps2dev *ps2dev, int maxbytes, int timeout);
int __ps2_command(struct ps2dev *ps2dev, unsigned char *param, int command);
int ps2_command(struct ps2dev *ps2dev, unsigned char *param, int command);
int ps2_handle_ack(struct ps2dev *ps2dev, unsigned char data);
int ps2_handle_response(struct ps2dev *ps2dev, unsigned char data);

18
include/linux/lockdep.h
View file

@ -149,6 +149,12 @@ struct lock_list {
struct lock_class *class;
struct stack_trace trace;
int distance;
/*
* The parent field is used to implement breadth-first search, and the
* bit 0 is reused to indicate if the lock has been accessed in BFS.
*/
struct lock_list *parent;
};
/*
@ -208,10 +214,12 @@ struct held_lock {
* interrupt context:
*/
unsigned int irq_context:2; /* bit 0 - soft, bit 1 - hard */
unsigned int trylock:1;
unsigned int trylock:1; /* 16 bits */
unsigned int read:2; /* see lock_acquire() comment */
unsigned int check:2; /* see lock_acquire() comment */
unsigned int hardirqs_off:1;
unsigned int references:11; /* 32 bits */
};
/*
@ -291,6 +299,10 @@ extern void lock_acquire(struct lockdep_map *lock, unsigned int subclass,
extern void lock_release(struct lockdep_map *lock, int nested,
unsigned long ip);
#define lockdep_is_held(lock) lock_is_held(&(lock)->dep_map)
extern int lock_is_held(struct lockdep_map *lock);
extern void lock_set_class(struct lockdep_map *lock, const char *name,
struct lock_class_key *key, unsigned int subclass,
unsigned long ip);
@ -309,6 +321,8 @@ extern void lockdep_trace_alloc(gfp_t mask);
#define lockdep_depth(tsk) (debug_locks ? (tsk)->lockdep_depth : 0)
#define lockdep_assert_held(l) WARN_ON(debug_locks && !lockdep_is_held(l))
#else /* !LOCKDEP */
static inline void lockdep_off(void)
@ -353,6 +367,8 @@ struct lock_class_key { };
#define lockdep_depth(tsk) (0)
#define lockdep_assert_held(l) do { } while (0)
#endif /* !LOCKDEP */
#ifdef CONFIG_LOCK_STAT

12
include/linux/lsm_audit.h
View file

@ -33,6 +33,7 @@ struct common_audit_data {
#define LSM_AUDIT_DATA_IPC 4
#define LSM_AUDIT_DATA_TASK 5
#define LSM_AUDIT_DATA_KEY 6
#define LSM_AUDIT_NO_AUDIT 7
struct task_struct *tsk;
union {
struct {
@ -66,16 +67,19 @@ struct common_audit_data {
} key_struct;
#endif
} u;
const char *function;
/* this union contains LSM specific data */
union {
#ifdef CONFIG_SECURITY_SMACK
/* SMACK data */
struct smack_audit_data {
const char *function;
char *subject;
char *object;
char *request;
int result;
} smack_audit_data;
#endif
#ifdef CONFIG_SECURITY_SELINUX
/* SELinux data */
struct {
u32 ssid;
@ -83,10 +87,12 @@ struct common_audit_data {
u16 tclass;
u32 requested;
u32 audited;
u32 denied;
struct av_decision *avd;
int result;
} selinux_audit_data;
} lsm_priv;
#endif
};
/* these callback will be implemented by a specific LSM */
void (*lsm_pre_audit)(struct audit_buffer *, void *);
void (*lsm_post_audit)(struct audit_buffer *, void *);
@ -104,7 +110,7 @@ int ipv6_skb_to_auditdata(struct sk_buff *skb,
/* Initialize an LSM audit data structure. */
#define COMMON_AUDIT_DATA_INIT(_d, _t) \
{ memset((_d), 0, sizeof(struct common_audit_data)); \
(_d)->type = LSM_AUDIT_DATA_##_t; (_d)->function = __func__; }
(_d)->type = LSM_AUDIT_DATA_##_t; }
void common_lsm_audit(struct common_audit_data *a);

1
include/linux/mISDNhw.h
View file

@ -168,6 +168,7 @@ struct bchannel {
extern int mISDN_initdchannel(struct dchannel *, int, void *);
extern int mISDN_initbchannel(struct bchannel *, int);
extern int mISDN_freedchannel(struct dchannel *);
extern void mISDN_clear_bchannel(struct bchannel *);
extern int mISDN_freebchannel(struct bchannel *);
extern void queue_ch_frame(struct mISDNchannel *, u_int,
int, struct sk_buff *);

16
include/linux/mISDNif.h
View file

@ -37,7 +37,7 @@
*/
#define MISDN_MAJOR_VERSION 1
#define MISDN_MINOR_VERSION 1
#define MISDN_RELEASE 20
#define MISDN_RELEASE 21
/* primitives for information exchange
* generell format
@ -153,6 +153,18 @@
#define HFC_VOL_CHANGE_RX 0x2602
#define HFC_SPL_LOOP_ON 0x2603
#define HFC_SPL_LOOP_OFF 0x2604
/* for T30 FAX and analog modem */
#define HW_MOD_FRM 0x4000
#define HW_MOD_FRH 0x4001
#define HW_MOD_FTM 0x4002
#define HW_MOD_FTH 0x4003
#define HW_MOD_FTS 0x4004
#define HW_MOD_CONNECT 0x4010
#define HW_MOD_OK 0x4011
#define HW_MOD_NOCARR 0x4012
#define HW_MOD_FCERROR 0x4013
#define HW_MOD_READY 0x4014
#define HW_MOD_LASTDATA 0x4015
/* DSP_TONE_PATT_ON parameter */
#define TONE_OFF 0x0000
@ -224,6 +236,8 @@
#define ISDN_P_B_L2DTMF 0x24
#define ISDN_P_B_L2DSP 0x25
#define ISDN_P_B_L2DSPHDLC 0x26
#define ISDN_P_B_T30_FAX 0x27
#define ISDN_P_B_MODEM_ASYNC 0x28
#define OPTION_L2_PMX 1
#define OPTION_L2_PTP 2

2
include/linux/mdio.h
View file

@ -304,7 +304,7 @@ static inline __u16 mdio_phy_id_devad(int phy_id)
*/
struct mdio_if_info {
int prtad;
u32 __bitwise mmds;
u32 mmds;
unsigned mode_support;
struct net_device *dev;

37
include/linux/mfd/ab3100.h
View file

@ -6,6 +6,8 @@
*/
#include <linux/device.h>
#include <linux/workqueue.h>
#include <linux/regulator/machine.h>
#ifndef MFD_AB3100_H
#define MFD_AB3100_H
@ -56,6 +58,14 @@
#define AB3100_STR_BATT_REMOVAL (0x40)
#define AB3100_STR_VBUS (0x80)
/*
* AB3100 contains 8 regulators, one external regulator controller
* and a buck converter, further the LDO E and buck converter can
* have separate settings if they are in sleep mode, this is
* modeled as a separate regulator.
*/
#define AB3100_NUM_REGULATORS 10
/**
* struct ab3100
* @access_mutex: lock out concurrent accesses to the AB3100 registers
@ -86,11 +96,30 @@ struct ab3100 {
bool startup_events_read;
};
int ab3100_set_register(struct ab3100 *ab3100, u8 reg, u8 regval);
int ab3100_get_register(struct ab3100 *ab3100, u8 reg, u8 *regval);
int ab3100_get_register_page(struct ab3100 *ab3100,
/**
* struct ab3100_platform_data
* Data supplied to initialize board connections to the AB3100
* @reg_constraints: regulator constraints for target board
* the order of these constraints are: LDO A, C, D, E,
* F, G, H, K, EXT and BUCK.
* @reg_initvals: initial values for the regulator registers
* plus two sleep settings for LDO E and the BUCK converter.
* exactly AB3100_NUM_REGULATORS+2 values must be sent in.
* Order: LDO A, C, E, E sleep, F, G, H, K, EXT, BUCK,
* BUCK sleep, LDO D. (LDO D need to be initialized last.)
* @external_voltage: voltage level of the external regulator.
*/
struct ab3100_platform_data {
struct regulator_init_data reg_constraints[AB3100_NUM_REGULATORS];
u8 reg_initvals[AB3100_NUM_REGULATORS+2];
int external_voltage;
};
int ab3100_set_register_interruptible(struct ab3100 *ab3100, u8 reg, u8 regval);
int ab3100_get_register_interruptible(struct ab3100 *ab3100, u8 reg, u8 *regval);
int ab3100_get_register_page_interruptible(struct ab3100 *ab3100,
u8 first_reg, u8 *regvals, u8 numregs);
int ab3100_mask_and_set_register(struct ab3100 *ab3100,
int ab3100_mask_and_set_register_interruptible(struct ab3100 *ab3100,
u8 reg, u8 andmask, u8 ormask);
u8 ab3100_get_chip_type(struct ab3100 *ab3100);
int ab3100_event_register(struct ab3100 *ab3100,

1
include/linux/mfd/core.h
View file

@ -23,6 +23,7 @@
*/
struct mfd_cell {
const char *name;
int id;
int (*enable)(struct platform_device *dev);
int (*disable)(struct platform_device *dev);

7
include/linux/mfd/ezx-pcap.h
View file

@ -25,9 +25,12 @@ struct pcap_chip;
int ezx_pcap_write(struct pcap_chip *, u8, u32);
int ezx_pcap_read(struct pcap_chip *, u8, u32 *);
int ezx_pcap_set_bits(struct pcap_chip *, u8, u32, u32);
int pcap_to_irq(struct pcap_chip *, int);
int irq_to_pcap(struct pcap_chip *, int);
int pcap_adc_async(struct pcap_chip *, u8, u32, u8[], void *, void *);
int pcap_adc_sync(struct pcap_chip *, u8, u32, u8[], u16[]);
void pcap_set_ts_bits(struct pcap_chip *, u32);
#define PCAP_SECOND_PORT 1
#define PCAP_CS_AH 2
@ -224,7 +227,6 @@ int pcap_adc_sync(struct pcap_chip *, u8, u32, u8[], u16[]);
#define PCAP_LED1 1
#define PCAP_BL0 2
#define PCAP_BL1 3
#define PCAP_VIB 4
#define PCAP_LED_3MA 0
#define PCAP_LED_4MA 1
#define PCAP_LED_5MA 2
@ -243,9 +245,6 @@ int pcap_adc_sync(struct pcap_chip *, u8, u32, u8[], u16[]);
#define PCAP_LED0_C_SHIFT 15
#define PCAP_LED1_C_SHIFT 17
#define PCAP_BL1_SHIFT 20
#define PCAP_VIB_MASK 0x3
#define PCAP_VIB_SHIFT 20
#define PCAP_VIB_EN (1 << 19)
/* RTC */
#define PCAP_RTC_DAY_MASK 0x3fff

396
include/linux/mfd/mc13783-private.h Normal file
View file

@ -0,0 +1,396 @@
/*
* Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
*
* Initial development of this code was funded by
* Phytec Messtechnik GmbH, http://www.phytec.de
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __LINUX_MFD_MC13783_PRIV_H
#define __LINUX_MFD_MC13783_PRIV_H
#include <linux/platform_device.h>
#include <linux/mfd/mc13783.h>
#include <linux/workqueue.h>
#include <linux/mutex.h>
struct mc13783_irq {
void (*handler)(int, void *);
void *data;
};
#define MC13783_NUM_IRQ 2
#define MC13783_IRQ_TS 0
#define MC13783_IRQ_REGULATOR 1
#define MC13783_ADC_MODE_TS 1
#define MC13783_ADC_MODE_SINGLE_CHAN 2
#define MC13783_ADC_MODE_MULT_CHAN 3
struct mc13783 {
int revision;
struct device *dev;
struct spi_device *spi_device;
int (*read_dev)(void *data, char reg, int count, u32 *dst);
int (*write_dev)(void *data, char reg, int count, const u32 *src);
struct mutex io_lock;
void *io_data;
int irq;
unsigned int flags;
struct mc13783_irq irq_handler[MC13783_NUM_IRQ];
struct work_struct work;
struct completion adc_done;
unsigned int ts_active;
struct mutex adc_conv_lock;
struct mc13783_regulator_init_data *regulators;
int num_regulators;
};
int mc13783_reg_read(struct mc13783 *, int reg_num, u32 *);
int mc13783_reg_write(struct mc13783 *, int, u32);
int mc13783_set_bits(struct mc13783 *, int, u32, u32);
int mc13783_free_irq(struct mc13783 *mc13783, int irq);
int mc13783_register_irq(struct mc13783 *mc13783, int irq,
void (*handler) (int, void *), void *data);
#define MC13783_REG_INTERRUPT_STATUS_0 0
#define MC13783_REG_INTERRUPT_MASK_0 1
#define MC13783_REG_INTERRUPT_SENSE_0 2
#define MC13783_REG_INTERRUPT_STATUS_1 3
#define MC13783_REG_INTERRUPT_MASK_1 4
#define MC13783_REG_INTERRUPT_SENSE_1 5
#define MC13783_REG_POWER_UP_MODE_SENSE 6
#define MC13783_REG_REVISION 7
#define MC13783_REG_SEMAPHORE 8
#define MC13783_REG_ARBITRATION_PERIPHERAL_AUDIO 9
#define MC13783_REG_ARBITRATION_SWITCHERS 10
#define MC13783_REG_ARBITRATION_REGULATORS_0 11
#define MC13783_REG_ARBITRATION_REGULATORS_1 12
#define MC13783_REG_POWER_CONTROL_0 13
#define MC13783_REG_POWER_CONTROL_1 14
#define MC13783_REG_POWER_CONTROL_2 15
#define MC13783_REG_REGEN_ASSIGNMENT 16
#define MC13783_REG_CONTROL_SPARE 17
#define MC13783_REG_MEMORY_A 18
#define MC13783_REG_MEMORY_B 19
#define MC13783_REG_RTC_TIME 20
#define MC13783_REG_RTC_ALARM 21
#define MC13783_REG_RTC_DAY 22
#define MC13783_REG_RTC_DAY_ALARM 23
#define MC13783_REG_SWITCHERS_0 24
#define MC13783_REG_SWITCHERS_1 25
#define MC13783_REG_SWITCHERS_2 26
#define MC13783_REG_SWITCHERS_3 27
#define MC13783_REG_SWITCHERS_4 28
#define MC13783_REG_SWITCHERS_5 29
#define MC13783_REG_REGULATOR_SETTING_0 30
#define MC13783_REG_REGULATOR_SETTING_1 31
#define MC13783_REG_REGULATOR_MODE_0 32
#define MC13783_REG_REGULATOR_MODE_1 33
#define MC13783_REG_POWER_MISCELLANEOUS 34
#define MC13783_REG_POWER_SPARE 35
#define MC13783_REG_AUDIO_RX_0 36
#define MC13783_REG_AUDIO_RX_1 37
#define MC13783_REG_AUDIO_TX 38
#define MC13783_REG_AUDIO_SSI_NETWORK 39
#define MC13783_REG_AUDIO_CODEC 40
#define MC13783_REG_AUDIO_STEREO_DAC 41
#define MC13783_REG_AUDIO_SPARE 42
#define MC13783_REG_ADC_0 43
#define MC13783_REG_ADC_1 44
#define MC13783_REG_ADC_2 45
#define MC13783_REG_ADC_3 46
#define MC13783_REG_ADC_4 47
#define MC13783_REG_CHARGER 48
#define MC13783_REG_USB 49
#define MC13783_REG_CHARGE_USB_SPARE 50
#define MC13783_REG_LED_CONTROL_0 51
#define MC13783_REG_LED_CONTROL_1 52
#define MC13783_REG_LED_CONTROL_2 53
#define MC13783_REG_LED_CONTROL_3 54
#define MC13783_REG_LED_CONTROL_4 55
#define MC13783_REG_LED_CONTROL_5 56
#define MC13783_REG_SPARE 57
#define MC13783_REG_TRIM_0 58
#define MC13783_REG_TRIM_1 59
#define MC13783_REG_TEST_0 60
#define MC13783_REG_TEST_1 61
#define MC13783_REG_TEST_2 62
#define MC13783_REG_TEST_3 63
#define MC13783_REG_NB 64
/*
* Interrupt Status
*/
#define MC13783_INT_STAT_ADCDONEI (1 << 0)
#define MC13783_INT_STAT_ADCBISDONEI (1 << 1)
#define MC13783_INT_STAT_TSI (1 << 2)
#define MC13783_INT_STAT_WHIGHI (1 << 3)
#define MC13783_INT_STAT_WLOWI (1 << 4)
#define MC13783_INT_STAT_CHGDETI (1 << 6)
#define MC13783_INT_STAT_CHGOVI (1 << 7)
#define MC13783_INT_STAT_CHGREVI (1 << 8)
#define MC13783_INT_STAT_CHGSHORTI (1 << 9)
#define MC13783_INT_STAT_CCCVI (1 << 10)
#define MC13783_INT_STAT_CHGCURRI (1 << 11)
#define MC13783_INT_STAT_BPONI (1 << 12)
#define MC13783_INT_STAT_LOBATLI (1 << 13)
#define MC13783_INT_STAT_LOBATHI (1 << 14)
#define MC13783_INT_STAT_UDPI (1 << 15)
#define MC13783_INT_STAT_USBI (1 << 16)
#define MC13783_INT_STAT_IDI (1 << 19)
#define MC13783_INT_STAT_Unused (1 << 20)
#define MC13783_INT_STAT_SE1I (1 << 21)
#define MC13783_INT_STAT_CKDETI (1 << 22)
#define MC13783_INT_STAT_UDMI (1 << 23)
/*
* Interrupt Mask
*/
#define MC13783_INT_MASK_ADCDONEM (1 << 0)
#define MC13783_INT_MASK_ADCBISDONEM (1 << 1)
#define MC13783_INT_MASK_TSM (1 << 2)
#define MC13783_INT_MASK_WHIGHM (1 << 3)
#define MC13783_INT_MASK_WLOWM (1 << 4)
#define MC13783_INT_MASK_CHGDETM (1 << 6)
#define MC13783_INT_MASK_CHGOVM (1 << 7)
#define MC13783_INT_MASK_CHGREVM (1 << 8)
#define MC13783_INT_MASK_CHGSHORTM (1 << 9)
#define MC13783_INT_MASK_CCCVM (1 << 10)
#define MC13783_INT_MASK_CHGCURRM (1 << 11)
#define MC13783_INT_MASK_BPONM (1 << 12)
#define MC13783_INT_MASK_LOBATLM (1 << 13)
#define MC13783_INT_MASK_LOBATHM (1 << 14)
#define MC13783_INT_MASK_UDPM (1 << 15)
#define MC13783_INT_MASK_USBM (1 << 16)
#define MC13783_INT_MASK_IDM (1 << 19)
#define MC13783_INT_MASK_SE1M (1 << 21)
#define MC13783_INT_MASK_CKDETM (1 << 22)
/*
* Reg Regulator Mode 0
*/
#define MC13783_REGCTRL_VAUDIO_EN (1 << 0)
#define MC13783_REGCTRL_VAUDIO_STBY (1 << 1)
#define MC13783_REGCTRL_VAUDIO_MODE (1 << 2)
#define MC13783_REGCTRL_VIOHI_EN (1 << 3)
#define MC13783_REGCTRL_VIOHI_STBY (1 << 4)
#define MC13783_REGCTRL_VIOHI_MODE (1 << 5)
#define MC13783_REGCTRL_VIOLO_EN (1 << 6)
#define MC13783_REGCTRL_VIOLO_STBY (1 << 7)
#define MC13783_REGCTRL_VIOLO_MODE (1 << 8)
#define MC13783_REGCTRL_VDIG_EN (1 << 9)
#define MC13783_REGCTRL_VDIG_STBY (1 << 10)
#define MC13783_REGCTRL_VDIG_MODE (1 << 11)
#define MC13783_REGCTRL_VGEN_EN (1 << 12)
#define MC13783_REGCTRL_VGEN_STBY (1 << 13)
#define MC13783_REGCTRL_VGEN_MODE (1 << 14)
#define MC13783_REGCTRL_VRFDIG_EN (1 << 15)
#define MC13783_REGCTRL_VRFDIG_STBY (1 << 16)
#define MC13783_REGCTRL_VRFDIG_MODE (1 << 17)
#define MC13783_REGCTRL_VRFREF_EN (1 << 18)
#define MC13783_REGCTRL_VRFREF_STBY (1 << 19)
#define MC13783_REGCTRL_VRFREF_MODE (1 << 20)
#define MC13783_REGCTRL_VRFCP_EN (1 << 21)
#define MC13783_REGCTRL_VRFCP_STBY (1 << 22)
#define MC13783_REGCTRL_VRFCP_MODE (1 << 23)
/*
* Reg Regulator Mode 1
*/
#define MC13783_REGCTRL_VSIM_EN (1 << 0)
#define MC13783_REGCTRL_VSIM_STBY (1 << 1)
#define MC13783_REGCTRL_VSIM_MODE (1 << 2)
#define MC13783_REGCTRL_VESIM_EN (1 << 3)
#define MC13783_REGCTRL_VESIM_STBY (1 << 4)
#define MC13783_REGCTRL_VESIM_MODE (1 << 5)
#define MC13783_REGCTRL_VCAM_EN (1 << 6)
#define MC13783_REGCTRL_VCAM_STBY (1 << 7)
#define MC13783_REGCTRL_VCAM_MODE (1 << 8)
#define MC13783_REGCTRL_VRFBG_EN (1 << 9)
#define MC13783_REGCTRL_VRFBG_STBY (1 << 10)
#define MC13783_REGCTRL_VVIB_EN (1 << 11)
#define MC13783_REGCTRL_VRF1_EN (1 << 12)
#define MC13783_REGCTRL_VRF1_STBY (1 << 13)
#define MC13783_REGCTRL_VRF1_MODE (1 << 14)
#define MC13783_REGCTRL_VRF2_EN (1 << 15)
#define MC13783_REGCTRL_VRF2_STBY (1 << 16)
#define MC13783_REGCTRL_VRF2_MODE (1 << 17)
#define MC13783_REGCTRL_VMMC1_EN (1 << 18)
#define MC13783_REGCTRL_VMMC1_STBY (1 << 19)
#define MC13783_REGCTRL_VMMC1_MODE (1 << 20)
#define MC13783_REGCTRL_VMMC2_EN (1 << 21)
#define MC13783_REGCTRL_VMMC2_STBY (1 << 22)
#define MC13783_REGCTRL_VMMC2_MODE (1 << 23)
/*
* Reg Regulator Misc.
*/
#define MC13783_REGCTRL_GPO1_EN (1 << 6)
#define MC13783_REGCTRL_GPO2_EN (1 << 8)
#define MC13783_REGCTRL_GPO3_EN (1 << 10)
#define MC13783_REGCTRL_GPO4_EN (1 << 12)
#define MC13783_REGCTRL_VIBPINCTRL (1 << 14)
/*
* Reg Switcher 4
*/
#define MC13783_SWCTRL_SW1A_MODE (1 << 0)
#define MC13783_SWCTRL_SW1A_STBY_MODE (1 << 2)
#define MC13783_SWCTRL_SW1A_DVS_SPEED (1 << 6)
#define MC13783_SWCTRL_SW1A_PANIC_MODE (1 << 8)
#define MC13783_SWCTRL_SW1A_SOFTSTART (1 << 9)
#define MC13783_SWCTRL_SW1B_MODE (1 << 10)
#define MC13783_SWCTRL_SW1B_STBY_MODE (1 << 12)
#define MC13783_SWCTRL_SW1B_DVS_SPEED (1 << 14)
#define MC13783_SWCTRL_SW1B_PANIC_MODE (1 << 16)
#define MC13783_SWCTRL_SW1B_SOFTSTART (1 << 17)
#define MC13783_SWCTRL_PLL_EN (1 << 18)
#define MC13783_SWCTRL_PLL_FACTOR (1 << 19)
/*
* Reg Switcher 5
*/
#define MC13783_SWCTRL_SW2A_MODE (1 << 0)
#define MC13783_SWCTRL_SW2A_STBY_MODE (1 << 2)
#define MC13783_SWCTRL_SW2A_DVS_SPEED (1 << 6)
#define MC13783_SWCTRL_SW2A_PANIC_MODE (1 << 8)
#define MC13783_SWCTRL_SW2A_SOFTSTART (1 << 9)
#define MC13783_SWCTRL_SW2B_MODE (1 << 10)
#define MC13783_SWCTRL_SW2B_STBY_MODE (1 << 12)
#define MC13783_SWCTRL_SW2B_DVS_SPEED (1 << 14)
#define MC13783_SWCTRL_SW2B_PANIC_MODE (1 << 16)
#define MC13783_SWCTRL_SW2B_SOFTSTART (1 << 17)
#define MC13783_SWSET_SW3 (1 << 18)
#define MC13783_SWCTRL_SW3_EN (1 << 20)
#define MC13783_SWCTRL_SW3_STBY (1 << 21)
#define MC13783_SWCTRL_SW3_MODE (1 << 22)
/*
* ADC/Touch
*/
#define MC13783_ADC0_LICELLCON (1 << 0)
#define MC13783_ADC0_CHRGICON (1 << 1)
#define MC13783_ADC0_BATICON (1 << 2)
#define MC13783_ADC0_RTHEN (1 << 3)
#define MC13783_ADC0_DTHEN (1 << 4)
#define MC13783_ADC0_UIDEN (1 << 5)
#define MC13783_ADC0_ADOUTEN (1 << 6)
#define MC13783_ADC0_ADOUTPER (1 << 7)
#define MC13783_ADC0_ADREFEN (1 << 10)
#define MC13783_ADC0_ADREFMODE (1 << 11)
#define MC13783_ADC0_TSMOD0 (1 << 12)
#define MC13783_ADC0_TSMOD1 (1 << 13)
#define MC13783_ADC0_TSMOD2 (1 << 14)
#define MC13783_ADC0_CHRGRAWDIV (1 << 15)
#define MC13783_ADC0_ADINC1 (1 << 16)
#define MC13783_ADC0_ADINC2 (1 << 17)
#define MC13783_ADC0_WCOMP (1 << 18)
#define MC13783_ADC0_ADCBIS0 (1 << 23)
#define MC13783_ADC1_ADEN (1 << 0)
#define MC13783_ADC1_RAND (1 << 1)
#define MC13783_ADC1_ADSEL (1 << 3)
#define MC13783_ADC1_TRIGMASK (1 << 4)
#define MC13783_ADC1_ADA10 (1 << 5)
#define MC13783_ADC1_ADA11 (1 << 6)
#define MC13783_ADC1_ADA12 (1 << 7)
#define MC13783_ADC1_ADA20 (1 << 8)
#define MC13783_ADC1_ADA21 (1 << 9)
#define MC13783_ADC1_ADA22 (1 << 10)
#define MC13783_ADC1_ATO0 (1 << 11)
#define MC13783_ADC1_ATO1 (1 << 12)
#define MC13783_ADC1_ATO2 (1 << 13)
#define MC13783_ADC1_ATO3 (1 << 14)
#define MC13783_ADC1_ATO4 (1 << 15)
#define MC13783_ADC1_ATO5 (1 << 16)
#define MC13783_ADC1_ATO6 (1 << 17)
#define MC13783_ADC1_ATO7 (1 << 18)
#define MC13783_ADC1_ATOX (1 << 19)
#define MC13783_ADC1_ASC (1 << 20)
#define MC13783_ADC1_ADTRIGIGN (1 << 21)
#define MC13783_ADC1_ADONESHOT (1 << 22)
#define MC13783_ADC1_ADCBIS1 (1 << 23)
#define MC13783_ADC1_CHAN0_SHIFT 5
#define MC13783_ADC1_CHAN1_SHIFT 8
#define MC13783_ADC2_ADD10 (1 << 2)
#define MC13783_ADC2_ADD11 (1 << 3)
#define MC13783_ADC2_ADD12 (1 << 4)
#define MC13783_ADC2_ADD13 (1 << 5)
#define MC13783_ADC2_ADD14 (1 << 6)
#define MC13783_ADC2_ADD15 (1 << 7)
#define MC13783_ADC2_ADD16 (1 << 8)
#define MC13783_ADC2_ADD17 (1 << 9)
#define MC13783_ADC2_ADD18 (1 << 10)
#define MC13783_ADC2_ADD19 (1 << 11)
#define MC13783_ADC2_ADD20 (1 << 14)
#define MC13783_ADC2_ADD21 (1 << 15)
#define MC13783_ADC2_ADD22 (1 << 16)
#define MC13783_ADC2_ADD23 (1 << 17)
#define MC13783_ADC2_ADD24 (1 << 18)
#define MC13783_ADC2_ADD25 (1 << 19)
#define MC13783_ADC2_ADD26 (1 << 20)
#define MC13783_ADC2_ADD27 (1 << 21)
#define MC13783_ADC2_ADD28 (1 << 22)
#define MC13783_ADC2_ADD29 (1 << 23)
#define MC13783_ADC3_WHIGH0 (1 << 0)
#define MC13783_ADC3_WHIGH1 (1 << 1)
#define MC13783_ADC3_WHIGH2 (1 << 2)
#define MC13783_ADC3_WHIGH3 (1 << 3)
#define MC13783_ADC3_WHIGH4 (1 << 4)
#define MC13783_ADC3_WHIGH5 (1 << 5)
#define MC13783_ADC3_ICID0 (1 << 6)
#define MC13783_ADC3_ICID1 (1 << 7)
#define MC13783_ADC3_ICID2 (1 << 8)
#define MC13783_ADC3_WLOW0 (1 << 9)
#define MC13783_ADC3_WLOW1 (1 << 10)
#define MC13783_ADC3_WLOW2 (1 << 11)
#define MC13783_ADC3_WLOW3 (1 << 12)
#define MC13783_ADC3_WLOW4 (1 << 13)
#define MC13783_ADC3_WLOW5 (1 << 14)
#define MC13783_ADC3_ADCBIS2 (1 << 23)
#define MC13783_ADC4_ADDBIS10 (1 << 2)
#define MC13783_ADC4_ADDBIS11 (1 << 3)
#define MC13783_ADC4_ADDBIS12 (1 << 4)
#define MC13783_ADC4_ADDBIS13 (1 << 5)
#define MC13783_ADC4_ADDBIS14 (1 << 6)
#define MC13783_ADC4_ADDBIS15 (1 << 7)
#define MC13783_ADC4_ADDBIS16 (1 << 8)
#define MC13783_ADC4_ADDBIS17 (1 << 9)
#define MC13783_ADC4_ADDBIS18 (1 << 10)
#define MC13783_ADC4_ADDBIS19 (1 << 11)
#define MC13783_ADC4_ADDBIS20 (1 << 14)
#define MC13783_ADC4_ADDBIS21 (1 << 15)
#define MC13783_ADC4_ADDBIS22 (1 << 16)
#define MC13783_ADC4_ADDBIS23 (1 << 17)
#define MC13783_ADC4_ADDBIS24 (1 << 18)
#define MC13783_ADC4_ADDBIS25 (1 << 19)
#define MC13783_ADC4_ADDBIS26 (1 << 20)
#define MC13783_ADC4_ADDBIS27 (1 << 21)
#define MC13783_ADC4_ADDBIS28 (1 << 22)
#define MC13783_ADC4_ADDBIS29 (1 << 23)
#endif /* __LINUX_MFD_MC13783_PRIV_H */

84
include/linux/mfd/mc13783.h Normal file
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@ -0,0 +1,84 @@
/*
* Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
*
* Initial development of this code was funded by
* Phytec Messtechnik GmbH, http://www.phytec.de
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef __INCLUDE_LINUX_MFD_MC13783_H
#define __INCLUDE_LINUX_MFD_MC13783_H
struct mc13783;
struct regulator_init_data;
struct mc13783_regulator_init_data {
int id;
struct regulator_init_data *init_data;
};
struct mc13783_platform_data {
struct mc13783_regulator_init_data *regulators;
int num_regulators;
unsigned int flags;
};
/* mc13783_platform_data flags */
#define MC13783_USE_TOUCHSCREEN (1 << 0)
#define MC13783_USE_CODEC (1 << 1)
#define MC13783_USE_ADC (1 << 2)
#define MC13783_USE_RTC (1 << 3)
#define MC13783_USE_REGULATOR (1 << 4)
int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode,
unsigned int channel, unsigned int *sample);
void mc13783_adc_set_ts_status(struct mc13783 *mc13783, unsigned int status);
#define MC13783_SW_SW1A 0
#define MC13783_SW_SW1B 1
#define MC13783_SW_SW2A 2
#define MC13783_SW_SW2B 3
#define MC13783_SW_SW3 4
#define MC13783_SW_PLL 5
#define MC13783_REGU_VAUDIO 6
#define MC13783_REGU_VIOHI 7
#define MC13783_REGU_VIOLO 8
#define MC13783_REGU_VDIG 9
#define MC13783_REGU_VGEN 10
#define MC13783_REGU_VRFDIG 11
#define MC13783_REGU_VRFREF 12
#define MC13783_REGU_VRFCP 13
#define MC13783_REGU_VSIM 14
#define MC13783_REGU_VESIM 15
#define MC13783_REGU_VCAM 16
#define MC13783_REGU_VRFBG 17
#define MC13783_REGU_VVIB 18
#define MC13783_REGU_VRF1 19
#define MC13783_REGU_VRF2 20
#define MC13783_REGU_VMMC1 21
#define MC13783_REGU_VMMC2 22
#define MC13783_REGU_GPO1 23
#define MC13783_REGU_GPO2 24
#define MC13783_REGU_GPO3 25
#define MC13783_REGU_GPO4 26
#define MC13783_REGU_V1 27
#define MC13783_REGU_V2 28
#define MC13783_REGU_V3 29
#define MC13783_REGU_V4 30
#endif /* __INCLUDE_LINUX_MFD_MC13783_H */

3
include/linux/mfd/pcf50633/adc.h
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@ -25,7 +25,8 @@
#define PCF50633_REG_ADCS3 0x57
#define PCF50633_ADCC1_ADCSTART 0x01
#define PCF50633_ADCC1_RES_10BIT 0x02
#define PCF50633_ADCC1_RES_8BIT 0x02
#define PCF50633_ADCC1_RES_10BIT 0x00
#define PCF50633_ADCC1_AVERAGE_NO 0x00
#define PCF50633_ADCC1_AVERAGE_4 0x04
#define PCF50633_ADCC1_AVERAGE_8 0x08

1
include/linux/mfd/pcf50633/core.h
View file

@ -136,6 +136,7 @@ struct pcf50633 {
int irq;
struct pcf50633_irq irq_handler[PCF50633_NUM_IRQ];
struct work_struct irq_work;
struct workqueue_struct *work_queue;
struct mutex lock;
u8 mask_regs[5];

216
include/linux/mfd/wm831x/auxadc.h Normal file
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@ -0,0 +1,216 @@
/*
* include/linux/mfd/wm831x/auxadc.h -- Auxiliary ADC interface for WM831x
*
* Copyright 2009 Wolfson Microelectronics PLC.
*
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __MFD_WM831X_AUXADC_H__
#define __MFD_WM831X_AUXADC_H__
/*
* R16429 (0x402D) - AuxADC Data
*/
#define WM831X_AUX_DATA_SRC_MASK 0xF000 /* AUX_DATA_SRC - [15:12] */
#define WM831X_AUX_DATA_SRC_SHIFT 12 /* AUX_DATA_SRC - [15:12] */
#define WM831X_AUX_DATA_SRC_WIDTH 4 /* AUX_DATA_SRC - [15:12] */
#define WM831X_AUX_DATA_MASK 0x0FFF /* AUX_DATA - [11:0] */
#define WM831X_AUX_DATA_SHIFT 0 /* AUX_DATA - [11:0] */
#define WM831X_AUX_DATA_WIDTH 12 /* AUX_DATA - [11:0] */
/*
* R16430 (0x402E) - AuxADC Control
*/
#define WM831X_AUX_ENA 0x8000 /* AUX_ENA */
#define WM831X_AUX_ENA_MASK 0x8000 /* AUX_ENA */
#define WM831X_AUX_ENA_SHIFT 15 /* AUX_ENA */
#define WM831X_AUX_ENA_WIDTH 1 /* AUX_ENA */
#define WM831X_AUX_CVT_ENA 0x4000 /* AUX_CVT_ENA */
#define WM831X_AUX_CVT_ENA_MASK 0x4000 /* AUX_CVT_ENA */
#define WM831X_AUX_CVT_ENA_SHIFT 14 /* AUX_CVT_ENA */
#define WM831X_AUX_CVT_ENA_WIDTH 1 /* AUX_CVT_ENA */
#define WM831X_AUX_SLPENA 0x1000 /* AUX_SLPENA */
#define WM831X_AUX_SLPENA_MASK 0x1000 /* AUX_SLPENA */
#define WM831X_AUX_SLPENA_SHIFT 12 /* AUX_SLPENA */
#define WM831X_AUX_SLPENA_WIDTH 1 /* AUX_SLPENA */
#define WM831X_AUX_FRC_ENA 0x0800 /* AUX_FRC_ENA */
#define WM831X_AUX_FRC_ENA_MASK 0x0800 /* AUX_FRC_ENA */
#define WM831X_AUX_FRC_ENA_SHIFT 11 /* AUX_FRC_ENA */
#define WM831X_AUX_FRC_ENA_WIDTH 1 /* AUX_FRC_ENA */
#define WM831X_AUX_RATE_MASK 0x003F /* AUX_RATE - [5:0] */
#define WM831X_AUX_RATE_SHIFT 0 /* AUX_RATE - [5:0] */
#define WM831X_AUX_RATE_WIDTH 6 /* AUX_RATE - [5:0] */
/*
* R16431 (0x402F) - AuxADC Source
*/
#define WM831X_AUX_CAL_SEL 0x8000 /* AUX_CAL_SEL */
#define WM831X_AUX_CAL_SEL_MASK 0x8000 /* AUX_CAL_SEL */
#define WM831X_AUX_CAL_SEL_SHIFT 15 /* AUX_CAL_SEL */
#define WM831X_AUX_CAL_SEL_WIDTH 1 /* AUX_CAL_SEL */
#define WM831X_AUX_BKUP_BATT_SEL 0x0400 /* AUX_BKUP_BATT_SEL */
#define WM831X_AUX_BKUP_BATT_SEL_MASK 0x0400 /* AUX_BKUP_BATT_SEL */
#define WM831X_AUX_BKUP_BATT_SEL_SHIFT 10 /* AUX_BKUP_BATT_SEL */
#define WM831X_AUX_BKUP_BATT_SEL_WIDTH 1 /* AUX_BKUP_BATT_SEL */
#define WM831X_AUX_WALL_SEL 0x0200 /* AUX_WALL_SEL */
#define WM831X_AUX_WALL_SEL_MASK 0x0200 /* AUX_WALL_SEL */
#define WM831X_AUX_WALL_SEL_SHIFT 9 /* AUX_WALL_SEL */
#define WM831X_AUX_WALL_SEL_WIDTH 1 /* AUX_WALL_SEL */
#define WM831X_AUX_BATT_SEL 0x0100 /* AUX_BATT_SEL */
#define WM831X_AUX_BATT_SEL_MASK 0x0100 /* AUX_BATT_SEL */
#define WM831X_AUX_BATT_SEL_SHIFT 8 /* AUX_BATT_SEL */
#define WM831X_AUX_BATT_SEL_WIDTH 1 /* AUX_BATT_SEL */
#define WM831X_AUX_USB_SEL 0x0080 /* AUX_USB_SEL */
#define WM831X_AUX_USB_SEL_MASK 0x0080 /* AUX_USB_SEL */
#define WM831X_AUX_USB_SEL_SHIFT 7 /* AUX_USB_SEL */
#define WM831X_AUX_USB_SEL_WIDTH 1 /* AUX_USB_SEL */
#define WM831X_AUX_SYSVDD_SEL 0x0040 /* AUX_SYSVDD_SEL */
#define WM831X_AUX_SYSVDD_SEL_MASK 0x0040 /* AUX_SYSVDD_SEL */
#define WM831X_AUX_SYSVDD_SEL_SHIFT 6 /* AUX_SYSVDD_SEL */
#define WM831X_AUX_SYSVDD_SEL_WIDTH 1 /* AUX_SYSVDD_SEL */
#define WM831X_AUX_BATT_TEMP_SEL 0x0020 /* AUX_BATT_TEMP_SEL */
#define WM831X_AUX_BATT_TEMP_SEL_MASK 0x0020 /* AUX_BATT_TEMP_SEL */
#define WM831X_AUX_BATT_TEMP_SEL_SHIFT 5 /* AUX_BATT_TEMP_SEL */
#define WM831X_AUX_BATT_TEMP_SEL_WIDTH 1 /* AUX_BATT_TEMP_SEL */
#define WM831X_AUX_CHIP_TEMP_SEL 0x0010 /* AUX_CHIP_TEMP_SEL */
#define WM831X_AUX_CHIP_TEMP_SEL_MASK 0x0010 /* AUX_CHIP_TEMP_SEL */
#define WM831X_AUX_CHIP_TEMP_SEL_SHIFT 4 /* AUX_CHIP_TEMP_SEL */
#define WM831X_AUX_CHIP_TEMP_SEL_WIDTH 1 /* AUX_CHIP_TEMP_SEL */
#define WM831X_AUX_AUX4_SEL 0x0008 /* AUX_AUX4_SEL */
#define WM831X_AUX_AUX4_SEL_MASK 0x0008 /* AUX_AUX4_SEL */
#define WM831X_AUX_AUX4_SEL_SHIFT 3 /* AUX_AUX4_SEL */
#define WM831X_AUX_AUX4_SEL_WIDTH 1 /* AUX_AUX4_SEL */
#define WM831X_AUX_AUX3_SEL 0x0004 /* AUX_AUX3_SEL */
#define WM831X_AUX_AUX3_SEL_MASK 0x0004 /* AUX_AUX3_SEL */
#define WM831X_AUX_AUX3_SEL_SHIFT 2 /* AUX_AUX3_SEL */
#define WM831X_AUX_AUX3_SEL_WIDTH 1 /* AUX_AUX3_SEL */
#define WM831X_AUX_AUX2_SEL 0x0002 /* AUX_AUX2_SEL */
#define WM831X_AUX_AUX2_SEL_MASK 0x0002 /* AUX_AUX2_SEL */
#define WM831X_AUX_AUX2_SEL_SHIFT 1 /* AUX_AUX2_SEL */
#define WM831X_AUX_AUX2_SEL_WIDTH 1 /* AUX_AUX2_SEL */
#define WM831X_AUX_AUX1_SEL 0x0001 /* AUX_AUX1_SEL */
#define WM831X_AUX_AUX1_SEL_MASK 0x0001 /* AUX_AUX1_SEL */
#define WM831X_AUX_AUX1_SEL_SHIFT 0 /* AUX_AUX1_SEL */
#define WM831X_AUX_AUX1_SEL_WIDTH 1 /* AUX_AUX1_SEL */
/*
* R16432 (0x4030) - Comparator Control
*/
#define WM831X_DCOMP4_STS 0x0800 /* DCOMP4_STS */
#define WM831X_DCOMP4_STS_MASK 0x0800 /* DCOMP4_STS */
#define WM831X_DCOMP4_STS_SHIFT 11 /* DCOMP4_STS */
#define WM831X_DCOMP4_STS_WIDTH 1 /* DCOMP4_STS */
#define WM831X_DCOMP3_STS 0x0400 /* DCOMP3_STS */
#define WM831X_DCOMP3_STS_MASK 0x0400 /* DCOMP3_STS */
#define WM831X_DCOMP3_STS_SHIFT 10 /* DCOMP3_STS */
#define WM831X_DCOMP3_STS_WIDTH 1 /* DCOMP3_STS */
#define WM831X_DCOMP2_STS 0x0200 /* DCOMP2_STS */
#define WM831X_DCOMP2_STS_MASK 0x0200 /* DCOMP2_STS */
#define WM831X_DCOMP2_STS_SHIFT 9 /* DCOMP2_STS */
#define WM831X_DCOMP2_STS_WIDTH 1 /* DCOMP2_STS */
#define WM831X_DCOMP1_STS 0x0100 /* DCOMP1_STS */
#define WM831X_DCOMP1_STS_MASK 0x0100 /* DCOMP1_STS */
#define WM831X_DCOMP1_STS_SHIFT 8 /* DCOMP1_STS */
#define WM831X_DCOMP1_STS_WIDTH 1 /* DCOMP1_STS */
#define WM831X_DCMP4_ENA 0x0008 /* DCMP4_ENA */
#define WM831X_DCMP4_ENA_MASK 0x0008 /* DCMP4_ENA */
#define WM831X_DCMP4_ENA_SHIFT 3 /* DCMP4_ENA */
#define WM831X_DCMP4_ENA_WIDTH 1 /* DCMP4_ENA */
#define WM831X_DCMP3_ENA 0x0004 /* DCMP3_ENA */
#define WM831X_DCMP3_ENA_MASK 0x0004 /* DCMP3_ENA */
#define WM831X_DCMP3_ENA_SHIFT 2 /* DCMP3_ENA */
#define WM831X_DCMP3_ENA_WIDTH 1 /* DCMP3_ENA */
#define WM831X_DCMP2_ENA 0x0002 /* DCMP2_ENA */
#define WM831X_DCMP2_ENA_MASK 0x0002 /* DCMP2_ENA */
#define WM831X_DCMP2_ENA_SHIFT 1 /* DCMP2_ENA */
#define WM831X_DCMP2_ENA_WIDTH 1 /* DCMP2_ENA */
#define WM831X_DCMP1_ENA 0x0001 /* DCMP1_ENA */
#define WM831X_DCMP1_ENA_MASK 0x0001 /* DCMP1_ENA */
#define WM831X_DCMP1_ENA_SHIFT 0 /* DCMP1_ENA */
#define WM831X_DCMP1_ENA_WIDTH 1 /* DCMP1_ENA */
/*
* R16433 (0x4031) - Comparator 1
*/
#define WM831X_DCMP1_SRC_MASK 0xE000 /* DCMP1_SRC - [15:13] */
#define WM831X_DCMP1_SRC_SHIFT 13 /* DCMP1_SRC - [15:13] */
#define WM831X_DCMP1_SRC_WIDTH 3 /* DCMP1_SRC - [15:13] */
#define WM831X_DCMP1_GT 0x1000 /* DCMP1_GT */
#define WM831X_DCMP1_GT_MASK 0x1000 /* DCMP1_GT */
#define WM831X_DCMP1_GT_SHIFT 12 /* DCMP1_GT */
#define WM831X_DCMP1_GT_WIDTH 1 /* DCMP1_GT */
#define WM831X_DCMP1_THR_MASK 0x0FFF /* DCMP1_THR - [11:0] */
#define WM831X_DCMP1_THR_SHIFT 0 /* DCMP1_THR - [11:0] */
#define WM831X_DCMP1_THR_WIDTH 12 /* DCMP1_THR - [11:0] */
/*
* R16434 (0x4032) - Comparator 2
*/
#define WM831X_DCMP2_SRC_MASK 0xE000 /* DCMP2_SRC - [15:13] */
#define WM831X_DCMP2_SRC_SHIFT 13 /* DCMP2_SRC - [15:13] */
#define WM831X_DCMP2_SRC_WIDTH 3 /* DCMP2_SRC - [15:13] */
#define WM831X_DCMP2_GT 0x1000 /* DCMP2_GT */
#define WM831X_DCMP2_GT_MASK 0x1000 /* DCMP2_GT */
#define WM831X_DCMP2_GT_SHIFT 12 /* DCMP2_GT */
#define WM831X_DCMP2_GT_WIDTH 1 /* DCMP2_GT */
#define WM831X_DCMP2_THR_MASK 0x0FFF /* DCMP2_THR - [11:0] */
#define WM831X_DCMP2_THR_SHIFT 0 /* DCMP2_THR - [11:0] */
#define WM831X_DCMP2_THR_WIDTH 12 /* DCMP2_THR - [11:0] */
/*
* R16435 (0x4033) - Comparator 3
*/
#define WM831X_DCMP3_SRC_MASK 0xE000 /* DCMP3_SRC - [15:13] */
#define WM831X_DCMP3_SRC_SHIFT 13 /* DCMP3_SRC - [15:13] */
#define WM831X_DCMP3_SRC_WIDTH 3 /* DCMP3_SRC - [15:13] */
#define WM831X_DCMP3_GT 0x1000 /* DCMP3_GT */
#define WM831X_DCMP3_GT_MASK 0x1000 /* DCMP3_GT */
#define WM831X_DCMP3_GT_SHIFT 12 /* DCMP3_GT */
#define WM831X_DCMP3_GT_WIDTH 1 /* DCMP3_GT */
#define WM831X_DCMP3_THR_MASK 0x0FFF /* DCMP3_THR - [11:0] */
#define WM831X_DCMP3_THR_SHIFT 0 /* DCMP3_THR - [11:0] */
#define WM831X_DCMP3_THR_WIDTH 12 /* DCMP3_THR - [11:0] */
/*
* R16436 (0x4034) - Comparator 4
*/
#define WM831X_DCMP4_SRC_MASK 0xE000 /* DCMP4_SRC - [15:13] */
#define WM831X_DCMP4_SRC_SHIFT 13 /* DCMP4_SRC - [15:13] */
#define WM831X_DCMP4_SRC_WIDTH 3 /* DCMP4_SRC - [15:13] */
#define WM831X_DCMP4_GT 0x1000 /* DCMP4_GT */
#define WM831X_DCMP4_GT_MASK 0x1000 /* DCMP4_GT */
#define WM831X_DCMP4_GT_SHIFT 12 /* DCMP4_GT */
#define WM831X_DCMP4_GT_WIDTH 1 /* DCMP4_GT */
#define WM831X_DCMP4_THR_MASK 0x0FFF /* DCMP4_THR - [11:0] */
#define WM831X_DCMP4_THR_SHIFT 0 /* DCMP4_THR - [11:0] */
#define WM831X_DCMP4_THR_WIDTH 12 /* DCMP4_THR - [11:0] */
#define WM831X_AUX_CAL_FACTOR 0xfff
#define WM831X_AUX_CAL_NOMINAL 0x222
enum wm831x_auxadc {
WM831X_AUX_CAL = 15,
WM831X_AUX_BKUP_BATT = 10,
WM831X_AUX_WALL = 9,
WM831X_AUX_BATT = 8,
WM831X_AUX_USB = 7,
WM831X_AUX_SYSVDD = 6,
WM831X_AUX_BATT_TEMP = 5,
WM831X_AUX_CHIP_TEMP = 4,
WM831X_AUX_AUX4 = 3,
WM831X_AUX_AUX3 = 2,
WM831X_AUX_AUX2 = 1,
WM831X_AUX_AUX1 = 0,
};
int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input);
int wm831x_auxadc_read_uv(struct wm831x *wm831x, enum wm831x_auxadc input);
#endif

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/*
* include/linux/mfd/wm831x/core.h -- Core interface for WM831x
*
* Copyright 2009 Wolfson Microelectronics PLC.
*
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __MFD_WM831X_CORE_H__
#define __MFD_WM831X_CORE_H__
#include <linux/interrupt.h>
#include <linux/workqueue.h>
/*
* Register values.
*/
#define WM831X_RESET_ID 0x00
#define WM831X_REVISION 0x01
#define WM831X_PARENT_ID 0x4000
#define WM831X_SYSVDD_CONTROL 0x4001
#define WM831X_THERMAL_MONITORING 0x4002
#define WM831X_POWER_STATE 0x4003
#define WM831X_WATCHDOG 0x4004
#define WM831X_ON_PIN_CONTROL 0x4005
#define WM831X_RESET_CONTROL 0x4006
#define WM831X_CONTROL_INTERFACE 0x4007
#define WM831X_SECURITY_KEY 0x4008
#define WM831X_SOFTWARE_SCRATCH 0x4009
#define WM831X_OTP_CONTROL 0x400A
#define WM831X_GPIO_LEVEL 0x400C
#define WM831X_SYSTEM_STATUS 0x400D
#define WM831X_ON_SOURCE 0x400E
#define WM831X_OFF_SOURCE 0x400F
#define WM831X_SYSTEM_INTERRUPTS 0x4010
#define WM831X_INTERRUPT_STATUS_1 0x4011
#define WM831X_INTERRUPT_STATUS_2 0x4012
#define WM831X_INTERRUPT_STATUS_3 0x4013
#define WM831X_INTERRUPT_STATUS_4 0x4014
#define WM831X_INTERRUPT_STATUS_5 0x4015
#define WM831X_IRQ_CONFIG 0x4017
#define WM831X_SYSTEM_INTERRUPTS_MASK 0x4018
#define WM831X_INTERRUPT_STATUS_1_MASK 0x4019
#define WM831X_INTERRUPT_STATUS_2_MASK 0x401A
#define WM831X_INTERRUPT_STATUS_3_MASK 0x401B
#define WM831X_INTERRUPT_STATUS_4_MASK 0x401C
#define WM831X_INTERRUPT_STATUS_5_MASK 0x401D
#define WM831X_RTC_WRITE_COUNTER 0x4020
#define WM831X_RTC_TIME_1 0x4021
#define WM831X_RTC_TIME_2 0x4022
#define WM831X_RTC_ALARM_1 0x4023
#define WM831X_RTC_ALARM_2 0x4024
#define WM831X_RTC_CONTROL 0x4025
#define WM831X_RTC_TRIM 0x4026
#define WM831X_TOUCH_CONTROL_1 0x4028
#define WM831X_TOUCH_CONTROL_2 0x4029
#define WM831X_TOUCH_DATA_X 0x402A
#define WM831X_TOUCH_DATA_Y 0x402B
#define WM831X_TOUCH_DATA_Z 0x402C
#define WM831X_AUXADC_DATA 0x402D
#define WM831X_AUXADC_CONTROL 0x402E
#define WM831X_AUXADC_SOURCE 0x402F
#define WM831X_COMPARATOR_CONTROL 0x4030
#define WM831X_COMPARATOR_1 0x4031
#define WM831X_COMPARATOR_2 0x4032
#define WM831X_COMPARATOR_3 0x4033
#define WM831X_COMPARATOR_4 0x4034
#define WM831X_GPIO1_CONTROL 0x4038
#define WM831X_GPIO2_CONTROL 0x4039
#define WM831X_GPIO3_CONTROL 0x403A
#define WM831X_GPIO4_CONTROL 0x403B
#define WM831X_GPIO5_CONTROL 0x403C
#define WM831X_GPIO6_CONTROL 0x403D
#define WM831X_GPIO7_CONTROL 0x403E
#define WM831X_GPIO8_CONTROL 0x403F
#define WM831X_GPIO9_CONTROL 0x4040
#define WM831X_GPIO10_CONTROL 0x4041
#define WM831X_GPIO11_CONTROL 0x4042
#define WM831X_GPIO12_CONTROL 0x4043
#define WM831X_GPIO13_CONTROL 0x4044
#define WM831X_GPIO14_CONTROL 0x4045
#define WM831X_GPIO15_CONTROL 0x4046
#define WM831X_GPIO16_CONTROL 0x4047
#define WM831X_CHARGER_CONTROL_1 0x4048
#define WM831X_CHARGER_CONTROL_2 0x4049
#define WM831X_CHARGER_STATUS 0x404A
#define WM831X_BACKUP_CHARGER_CONTROL 0x404B
#define WM831X_STATUS_LED_1 0x404C
#define WM831X_STATUS_LED_2 0x404D
#define WM831X_CURRENT_SINK_1 0x404E
#define WM831X_CURRENT_SINK_2 0x404F
#define WM831X_DCDC_ENABLE 0x4050
#define WM831X_LDO_ENABLE 0x4051
#define WM831X_DCDC_STATUS 0x4052
#define WM831X_LDO_STATUS 0x4053
#define WM831X_DCDC_UV_STATUS 0x4054
#define WM831X_LDO_UV_STATUS 0x4055
#define WM831X_DC1_CONTROL_1 0x4056
#define WM831X_DC1_CONTROL_2 0x4057
#define WM831X_DC1_ON_CONFIG 0x4058
#define WM831X_DC1_SLEEP_CONTROL 0x4059
#define WM831X_DC1_DVS_CONTROL 0x405A
#define WM831X_DC2_CONTROL_1 0x405B
#define WM831X_DC2_CONTROL_2 0x405C
#define WM831X_DC2_ON_CONFIG 0x405D
#define WM831X_DC2_SLEEP_CONTROL 0x405E
#define WM831X_DC2_DVS_CONTROL 0x405F
#define WM831X_DC3_CONTROL_1 0x4060
#define WM831X_DC3_CONTROL_2 0x4061
#define WM831X_DC3_ON_CONFIG 0x4062
#define WM831X_DC3_SLEEP_CONTROL 0x4063
#define WM831X_DC4_CONTROL 0x4064
#define WM831X_DC4_SLEEP_CONTROL 0x4065
#define WM831X_EPE1_CONTROL 0x4066
#define WM831X_EPE2_CONTROL 0x4067
#define WM831X_LDO1_CONTROL 0x4068
#define WM831X_LDO1_ON_CONTROL 0x4069
#define WM831X_LDO1_SLEEP_CONTROL 0x406A
#define WM831X_LDO2_CONTROL 0x406B
#define WM831X_LDO2_ON_CONTROL 0x406C
#define WM831X_LDO2_SLEEP_CONTROL 0x406D
#define WM831X_LDO3_CONTROL 0x406E
#define WM831X_LDO3_ON_CONTROL 0x406F
#define WM831X_LDO3_SLEEP_CONTROL 0x4070
#define WM831X_LDO4_CONTROL 0x4071
#define WM831X_LDO4_ON_CONTROL 0x4072
#define WM831X_LDO4_SLEEP_CONTROL 0x4073
#define WM831X_LDO5_CONTROL 0x4074
#define WM831X_LDO5_ON_CONTROL 0x4075
#define WM831X_LDO5_SLEEP_CONTROL 0x4076
#define WM831X_LDO6_CONTROL 0x4077
#define WM831X_LDO6_ON_CONTROL 0x4078
#define WM831X_LDO6_SLEEP_CONTROL 0x4079
#define WM831X_LDO7_CONTROL 0x407A
#define WM831X_LDO7_ON_CONTROL 0x407B
#define WM831X_LDO7_SLEEP_CONTROL 0x407C
#define WM831X_LDO8_CONTROL 0x407D
#define WM831X_LDO8_ON_CONTROL 0x407E
#define WM831X_LDO8_SLEEP_CONTROL 0x407F
#define WM831X_LDO9_CONTROL 0x4080
#define WM831X_LDO9_ON_CONTROL 0x4081
#define WM831X_LDO9_SLEEP_CONTROL 0x4082
#define WM831X_LDO10_CONTROL 0x4083
#define WM831X_LDO10_ON_CONTROL 0x4084
#define WM831X_LDO10_SLEEP_CONTROL 0x4085
#define WM831X_LDO11_ON_CONTROL 0x4087
#define WM831X_LDO11_SLEEP_CONTROL 0x4088
#define WM831X_POWER_GOOD_SOURCE_1 0x408E
#define WM831X_POWER_GOOD_SOURCE_2 0x408F
#define WM831X_CLOCK_CONTROL_1 0x4090
#define WM831X_CLOCK_CONTROL_2 0x4091
#define WM831X_FLL_CONTROL_1 0x4092
#define WM831X_FLL_CONTROL_2 0x4093
#define WM831X_FLL_CONTROL_3 0x4094
#define WM831X_FLL_CONTROL_4 0x4095
#define WM831X_FLL_CONTROL_5 0x4096
#define WM831X_UNIQUE_ID_1 0x7800
#define WM831X_UNIQUE_ID_2 0x7801
#define WM831X_UNIQUE_ID_3 0x7802
#define WM831X_UNIQUE_ID_4 0x7803
#define WM831X_UNIQUE_ID_5 0x7804
#define WM831X_UNIQUE_ID_6 0x7805
#define WM831X_UNIQUE_ID_7 0x7806
#define WM831X_UNIQUE_ID_8 0x7807
#define WM831X_FACTORY_OTP_ID 0x7808
#define WM831X_FACTORY_OTP_1 0x7809
#define WM831X_FACTORY_OTP_2 0x780A
#define WM831X_FACTORY_OTP_3 0x780B
#define WM831X_FACTORY_OTP_4 0x780C
#define WM831X_FACTORY_OTP_5 0x780D
#define WM831X_CUSTOMER_OTP_ID 0x7810
#define WM831X_DC1_OTP_CONTROL 0x7811
#define WM831X_DC2_OTP_CONTROL 0x7812
#define WM831X_DC3_OTP_CONTROL 0x7813
#define WM831X_LDO1_2_OTP_CONTROL 0x7814
#define WM831X_LDO3_4_OTP_CONTROL 0x7815
#define WM831X_LDO5_6_OTP_CONTROL 0x7816
#define WM831X_LDO7_8_OTP_CONTROL 0x7817
#define WM831X_LDO9_10_OTP_CONTROL 0x7818
#define WM831X_LDO11_EPE_CONTROL 0x7819
#define WM831X_GPIO1_OTP_CONTROL 0x781A
#define WM831X_GPIO2_OTP_CONTROL 0x781B
#define WM831X_GPIO3_OTP_CONTROL 0x781C
#define WM831X_GPIO4_OTP_CONTROL 0x781D
#define WM831X_GPIO5_OTP_CONTROL 0x781E
#define WM831X_GPIO6_OTP_CONTROL 0x781F
#define WM831X_DBE_CHECK_DATA 0x7827
/*
* R0 (0x00) - Reset ID
*/
#define WM831X_CHIP_ID_MASK 0xFFFF /* CHIP_ID - [15:0] */
#define WM831X_CHIP_ID_SHIFT 0 /* CHIP_ID - [15:0] */
#define WM831X_CHIP_ID_WIDTH 16 /* CHIP_ID - [15:0] */
/*
* R1 (0x01) - Revision
*/
#define WM831X_PARENT_REV_MASK 0xFF00 /* PARENT_REV - [15:8] */
#define WM831X_PARENT_REV_SHIFT 8 /* PARENT_REV - [15:8] */
#define WM831X_PARENT_REV_WIDTH 8 /* PARENT_REV - [15:8] */
#define WM831X_CHILD_REV_MASK 0x00FF /* CHILD_REV - [7:0] */
#define WM831X_CHILD_REV_SHIFT 0 /* CHILD_REV - [7:0] */
#define WM831X_CHILD_REV_WIDTH 8 /* CHILD_REV - [7:0] */
/*
* R16384 (0x4000) - Parent ID
*/
#define WM831X_PARENT_ID_MASK 0xFFFF /* PARENT_ID - [15:0] */
#define WM831X_PARENT_ID_SHIFT 0 /* PARENT_ID - [15:0] */
#define WM831X_PARENT_ID_WIDTH 16 /* PARENT_ID - [15:0] */
/*
* R16389 (0x4005) - ON Pin Control
*/
#define WM831X_ON_PIN_SECACT_MASK 0x0300 /* ON_PIN_SECACT - [9:8] */
#define WM831X_ON_PIN_SECACT_SHIFT 8 /* ON_PIN_SECACT - [9:8] */
#define WM831X_ON_PIN_SECACT_WIDTH 2 /* ON_PIN_SECACT - [9:8] */
#define WM831X_ON_PIN_PRIMACT_MASK 0x0030 /* ON_PIN_PRIMACT - [5:4] */
#define WM831X_ON_PIN_PRIMACT_SHIFT 4 /* ON_PIN_PRIMACT - [5:4] */
#define WM831X_ON_PIN_PRIMACT_WIDTH 2 /* ON_PIN_PRIMACT - [5:4] */
#define WM831X_ON_PIN_STS 0x0008 /* ON_PIN_STS */
#define WM831X_ON_PIN_STS_MASK 0x0008 /* ON_PIN_STS */
#define WM831X_ON_PIN_STS_SHIFT 3 /* ON_PIN_STS */
#define WM831X_ON_PIN_STS_WIDTH 1 /* ON_PIN_STS */
#define WM831X_ON_PIN_TO_MASK 0x0003 /* ON_PIN_TO - [1:0] */
#define WM831X_ON_PIN_TO_SHIFT 0 /* ON_PIN_TO - [1:0] */
#define WM831X_ON_PIN_TO_WIDTH 2 /* ON_PIN_TO - [1:0] */
struct regulator_dev;
struct wm831x {
struct mutex io_lock;
struct device *dev;
int (*read_dev)(struct wm831x *wm831x, unsigned short reg,
int bytes, void *dest);
int (*write_dev)(struct wm831x *wm831x, unsigned short reg,
int bytes, void *src);
void *control_data;
int irq; /* Our chip IRQ */
struct mutex irq_lock;
struct workqueue_struct *irq_wq;
struct work_struct irq_work;
unsigned int irq_base;
int irq_masks[5];
struct mutex auxadc_lock;
/* The WM831x has a security key blocking access to certain
* registers. The mutex is taken by the accessors for locking
* and unlocking the security key, locked is used to fail
* writes if the lock is held.
*/
struct mutex key_lock;
unsigned int locked:1;
};
/* Device I/O API */
int wm831x_reg_read(struct wm831x *wm831x, unsigned short reg);
int wm831x_reg_write(struct wm831x *wm831x, unsigned short reg,
unsigned short val);
void wm831x_reg_lock(struct wm831x *wm831x);
int wm831x_reg_unlock(struct wm831x *wm831x);
int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg,
unsigned short mask, unsigned short val);
int wm831x_bulk_read(struct wm831x *wm831x, unsigned short reg,
int count, u16 *buf);
int wm831x_irq_init(struct wm831x *wm831x, int irq);
void wm831x_irq_exit(struct wm831x *wm831x);
int __must_check wm831x_request_irq(struct wm831x *wm831x,
unsigned int irq, irq_handler_t handler,
unsigned long flags, const char *name,
void *dev);
void wm831x_free_irq(struct wm831x *wm831x, unsigned int, void *);
void wm831x_disable_irq(struct wm831x *wm831x, int irq);
void wm831x_enable_irq(struct wm831x *wm831x, int irq);
#endif

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/*
* include/linux/mfd/wm831x/gpio.h -- GPIO for WM831x
*
* Copyright 2009 Wolfson Microelectronics PLC.
*
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __MFD_WM831X_GPIO_H__
#define __MFD_WM831X_GPIO_H__
/*
* R16440-16455 (0x4038-0x4047) - GPIOx Control
*/
#define WM831X_GPN_DIR 0x8000 /* GPN_DIR */
#define WM831X_GPN_DIR_MASK 0x8000 /* GPN_DIR */
#define WM831X_GPN_DIR_SHIFT 15 /* GPN_DIR */
#define WM831X_GPN_DIR_WIDTH 1 /* GPN_DIR */
#define WM831X_GPN_PULL_MASK 0x6000 /* GPN_PULL - [14:13] */
#define WM831X_GPN_PULL_SHIFT 13 /* GPN_PULL - [14:13] */
#define WM831X_GPN_PULL_WIDTH 2 /* GPN_PULL - [14:13] */
#define WM831X_GPN_INT_MODE 0x1000 /* GPN_INT_MODE */
#define WM831X_GPN_INT_MODE_MASK 0x1000 /* GPN_INT_MODE */
#define WM831X_GPN_INT_MODE_SHIFT 12 /* GPN_INT_MODE */
#define WM831X_GPN_INT_MODE_WIDTH 1 /* GPN_INT_MODE */
#define WM831X_GPN_PWR_DOM 0x0800 /* GPN_PWR_DOM */
#define WM831X_GPN_PWR_DOM_MASK 0x0800 /* GPN_PWR_DOM */
#define WM831X_GPN_PWR_DOM_SHIFT 11 /* GPN_PWR_DOM */
#define WM831X_GPN_PWR_DOM_WIDTH 1 /* GPN_PWR_DOM */
#define WM831X_GPN_POL 0x0400 /* GPN_POL */
#define WM831X_GPN_POL_MASK 0x0400 /* GPN_POL */
#define WM831X_GPN_POL_SHIFT 10 /* GPN_POL */
#define WM831X_GPN_POL_WIDTH 1 /* GPN_POL */
#define WM831X_GPN_OD 0x0200 /* GPN_OD */
#define WM831X_GPN_OD_MASK 0x0200 /* GPN_OD */
#define WM831X_GPN_OD_SHIFT 9 /* GPN_OD */
#define WM831X_GPN_OD_WIDTH 1 /* GPN_OD */
#define WM831X_GPN_TRI 0x0080 /* GPN_TRI */
#define WM831X_GPN_TRI_MASK 0x0080 /* GPN_TRI */
#define WM831X_GPN_TRI_SHIFT 7 /* GPN_TRI */
#define WM831X_GPN_TRI_WIDTH 1 /* GPN_TRI */
#define WM831X_GPN_FN_MASK 0x000F /* GPN_FN - [3:0] */
#define WM831X_GPN_FN_SHIFT 0 /* GPN_FN - [3:0] */
#define WM831X_GPN_FN_WIDTH 4 /* GPN_FN - [3:0] */
#define WM831X_GPIO_PULL_NONE (0 << WM831X_GPN_PULL_SHIFT)
#define WM831X_GPIO_PULL_DOWN (1 << WM831X_GPN_PULL_SHIFT)
#define WM831X_GPIO_PULL_UP (2 << WM831X_GPN_PULL_SHIFT)
#endif

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/*
* include/linux/mfd/wm831x/irq.h -- Interrupt controller for WM831x
*
* Copyright 2009 Wolfson Microelectronics PLC.
*
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __MFD_WM831X_IRQ_H__
#define __MFD_WM831X_IRQ_H__
/* Interrupt number assignments within Linux */
#define WM831X_IRQ_TEMP_THW 0
#define WM831X_IRQ_GPIO_1 1
#define WM831X_IRQ_GPIO_2 2
#define WM831X_IRQ_GPIO_3 3
#define WM831X_IRQ_GPIO_4 4
#define WM831X_IRQ_GPIO_5 5
#define WM831X_IRQ_GPIO_6 6
#define WM831X_IRQ_GPIO_7 7
#define WM831X_IRQ_GPIO_8 8
#define WM831X_IRQ_GPIO_9 9
#define WM831X_IRQ_GPIO_10 10
#define WM831X_IRQ_GPIO_11 11
#define WM831X_IRQ_GPIO_12 12
#define WM831X_IRQ_GPIO_13 13
#define WM831X_IRQ_GPIO_14 14
#define WM831X_IRQ_GPIO_15 15
#define WM831X_IRQ_GPIO_16 16
#define WM831X_IRQ_ON 17
#define WM831X_IRQ_PPM_SYSLO 18
#define WM831X_IRQ_PPM_PWR_SRC 19
#define WM831X_IRQ_PPM_USB_CURR 20
#define WM831X_IRQ_WDOG_TO 21
#define WM831X_IRQ_RTC_PER 22
#define WM831X_IRQ_RTC_ALM 23
#define WM831X_IRQ_CHG_BATT_HOT 24
#define WM831X_IRQ_CHG_BATT_COLD 25
#define WM831X_IRQ_CHG_BATT_FAIL 26
#define WM831X_IRQ_CHG_OV 27
#define WM831X_IRQ_CHG_END 29
#define WM831X_IRQ_CHG_TO 30
#define WM831X_IRQ_CHG_MODE 31
#define WM831X_IRQ_CHG_START 32
#define WM831X_IRQ_TCHDATA 33
#define WM831X_IRQ_TCHPD 34
#define WM831X_IRQ_AUXADC_DATA 35
#define WM831X_IRQ_AUXADC_DCOMP1 36
#define WM831X_IRQ_AUXADC_DCOMP2 37
#define WM831X_IRQ_AUXADC_DCOMP3 38
#define WM831X_IRQ_AUXADC_DCOMP4 39
#define WM831X_IRQ_CS1 40
#define WM831X_IRQ_CS2 41
#define WM831X_IRQ_HC_DC1 42
#define WM831X_IRQ_HC_DC2 43
#define WM831X_IRQ_UV_LDO1 44
#define WM831X_IRQ_UV_LDO2 45
#define WM831X_IRQ_UV_LDO3 46
#define WM831X_IRQ_UV_LDO4 47
#define WM831X_IRQ_UV_LDO5 48
#define WM831X_IRQ_UV_LDO6 49
#define WM831X_IRQ_UV_LDO7 50
#define WM831X_IRQ_UV_LDO8 51
#define WM831X_IRQ_UV_LDO9 52
#define WM831X_IRQ_UV_LDO10 53
#define WM831X_IRQ_UV_DC1 54
#define WM831X_IRQ_UV_DC2 55
#define WM831X_IRQ_UV_DC3 56
#define WM831X_IRQ_UV_DC4 57
#define WM831X_NUM_IRQS 58
/*
* R16400 (0x4010) - System Interrupts
*/
#define WM831X_PS_INT 0x8000 /* PS_INT */
#define WM831X_PS_INT_MASK 0x8000 /* PS_INT */
#define WM831X_PS_INT_SHIFT 15 /* PS_INT */
#define WM831X_PS_INT_WIDTH 1 /* PS_INT */
#define WM831X_TEMP_INT 0x4000 /* TEMP_INT */
#define WM831X_TEMP_INT_MASK 0x4000 /* TEMP_INT */
#define WM831X_TEMP_INT_SHIFT 14 /* TEMP_INT */
#define WM831X_TEMP_INT_WIDTH 1 /* TEMP_INT */
#define WM831X_GP_INT 0x2000 /* GP_INT */
#define WM831X_GP_INT_MASK 0x2000 /* GP_INT */
#define WM831X_GP_INT_SHIFT 13 /* GP_INT */
#define WM831X_GP_INT_WIDTH 1 /* GP_INT */
#define WM831X_ON_PIN_INT 0x1000 /* ON_PIN_INT */
#define WM831X_ON_PIN_INT_MASK 0x1000 /* ON_PIN_INT */
#define WM831X_ON_PIN_INT_SHIFT 12 /* ON_PIN_INT */
#define WM831X_ON_PIN_INT_WIDTH 1 /* ON_PIN_INT */
#define WM831X_WDOG_INT 0x0800 /* WDOG_INT */
#define WM831X_WDOG_INT_MASK 0x0800 /* WDOG_INT */
#define WM831X_WDOG_INT_SHIFT 11 /* WDOG_INT */
#define WM831X_WDOG_INT_WIDTH 1 /* WDOG_INT */
#define WM831X_TCHDATA_INT 0x0400 /* TCHDATA_INT */
#define WM831X_TCHDATA_INT_MASK 0x0400 /* TCHDATA_INT */
#define WM831X_TCHDATA_INT_SHIFT 10 /* TCHDATA_INT */
#define WM831X_TCHDATA_INT_WIDTH 1 /* TCHDATA_INT */
#define WM831X_TCHPD_INT 0x0200 /* TCHPD_INT */
#define WM831X_TCHPD_INT_MASK 0x0200 /* TCHPD_INT */
#define WM831X_TCHPD_INT_SHIFT 9 /* TCHPD_INT */
#define WM831X_TCHPD_INT_WIDTH 1 /* TCHPD_INT */
#define WM831X_AUXADC_INT 0x0100 /* AUXADC_INT */
#define WM831X_AUXADC_INT_MASK 0x0100 /* AUXADC_INT */
#define WM831X_AUXADC_INT_SHIFT 8 /* AUXADC_INT */
#define WM831X_AUXADC_INT_WIDTH 1 /* AUXADC_INT */
#define WM831X_PPM_INT 0x0080 /* PPM_INT */
#define WM831X_PPM_INT_MASK 0x0080 /* PPM_INT */
#define WM831X_PPM_INT_SHIFT 7 /* PPM_INT */
#define WM831X_PPM_INT_WIDTH 1 /* PPM_INT */
#define WM831X_CS_INT 0x0040 /* CS_INT */
#define WM831X_CS_INT_MASK 0x0040 /* CS_INT */
#define WM831X_CS_INT_SHIFT 6 /* CS_INT */
#define WM831X_CS_INT_WIDTH 1 /* CS_INT */
#define WM831X_RTC_INT 0x0020 /* RTC_INT */
#define WM831X_RTC_INT_MASK 0x0020 /* RTC_INT */
#define WM831X_RTC_INT_SHIFT 5 /* RTC_INT */
#define WM831X_RTC_INT_WIDTH 1 /* RTC_INT */
#define WM831X_OTP_INT 0x0010 /* OTP_INT */
#define WM831X_OTP_INT_MASK 0x0010 /* OTP_INT */
#define WM831X_OTP_INT_SHIFT 4 /* OTP_INT */
#define WM831X_OTP_INT_WIDTH 1 /* OTP_INT */
#define WM831X_CHILD_INT 0x0008 /* CHILD_INT */
#define WM831X_CHILD_INT_MASK 0x0008 /* CHILD_INT */
#define WM831X_CHILD_INT_SHIFT 3 /* CHILD_INT */
#define WM831X_CHILD_INT_WIDTH 1 /* CHILD_INT */
#define WM831X_CHG_INT 0x0004 /* CHG_INT */
#define WM831X_CHG_INT_MASK 0x0004 /* CHG_INT */
#define WM831X_CHG_INT_SHIFT 2 /* CHG_INT */
#define WM831X_CHG_INT_WIDTH 1 /* CHG_INT */
#define WM831X_HC_INT 0x0002 /* HC_INT */
#define WM831X_HC_INT_MASK 0x0002 /* HC_INT */
#define WM831X_HC_INT_SHIFT 1 /* HC_INT */
#define WM831X_HC_INT_WIDTH 1 /* HC_INT */
#define WM831X_UV_INT 0x0001 /* UV_INT */
#define WM831X_UV_INT_MASK 0x0001 /* UV_INT */
#define WM831X_UV_INT_SHIFT 0 /* UV_INT */
#define WM831X_UV_INT_WIDTH 1 /* UV_INT */
/*
* R16401 (0x4011) - Interrupt Status 1
*/
#define WM831X_PPM_SYSLO_EINT 0x8000 /* PPM_SYSLO_EINT */
#define WM831X_PPM_SYSLO_EINT_MASK 0x8000 /* PPM_SYSLO_EINT */
#define WM831X_PPM_SYSLO_EINT_SHIFT 15 /* PPM_SYSLO_EINT */
#define WM831X_PPM_SYSLO_EINT_WIDTH 1 /* PPM_SYSLO_EINT */
#define WM831X_PPM_PWR_SRC_EINT 0x4000 /* PPM_PWR_SRC_EINT */
#define WM831X_PPM_PWR_SRC_EINT_MASK 0x4000 /* PPM_PWR_SRC_EINT */
#define WM831X_PPM_PWR_SRC_EINT_SHIFT 14 /* PPM_PWR_SRC_EINT */
#define WM831X_PPM_PWR_SRC_EINT_WIDTH 1 /* PPM_PWR_SRC_EINT */
#define WM831X_PPM_USB_CURR_EINT 0x2000 /* PPM_USB_CURR_EINT */
#define WM831X_PPM_USB_CURR_EINT_MASK 0x2000 /* PPM_USB_CURR_EINT */
#define WM831X_PPM_USB_CURR_EINT_SHIFT 13 /* PPM_USB_CURR_EINT */
#define WM831X_PPM_USB_CURR_EINT_WIDTH 1 /* PPM_USB_CURR_EINT */
#define WM831X_ON_PIN_EINT 0x1000 /* ON_PIN_EINT */
#define WM831X_ON_PIN_EINT_MASK 0x1000 /* ON_PIN_EINT */
#define WM831X_ON_PIN_EINT_SHIFT 12 /* ON_PIN_EINT */
#define WM831X_ON_PIN_EINT_WIDTH 1 /* ON_PIN_EINT */
#define WM831X_WDOG_TO_EINT 0x0800 /* WDOG_TO_EINT */
#define WM831X_WDOG_TO_EINT_MASK 0x0800 /* WDOG_TO_EINT */
#define WM831X_WDOG_TO_EINT_SHIFT 11 /* WDOG_TO_EINT */
#define WM831X_WDOG_TO_EINT_WIDTH 1 /* WDOG_TO_EINT */
#define WM831X_TCHDATA_EINT 0x0400 /* TCHDATA_EINT */
#define WM831X_TCHDATA_EINT_MASK 0x0400 /* TCHDATA_EINT */
#define WM831X_TCHDATA_EINT_SHIFT 10 /* TCHDATA_EINT */
#define WM831X_TCHDATA_EINT_WIDTH 1 /* TCHDATA_EINT */
#define WM831X_TCHPD_EINT 0x0200 /* TCHPD_EINT */
#define WM831X_TCHPD_EINT_MASK 0x0200 /* TCHPD_EINT */
#define WM831X_TCHPD_EINT_SHIFT 9 /* TCHPD_EINT */
#define WM831X_TCHPD_EINT_WIDTH 1 /* TCHPD_EINT */
#define WM831X_AUXADC_DATA_EINT 0x0100 /* AUXADC_DATA_EINT */
#define WM831X_AUXADC_DATA_EINT_MASK 0x0100 /* AUXADC_DATA_EINT */
#define WM831X_AUXADC_DATA_EINT_SHIFT 8 /* AUXADC_DATA_EINT */
#define WM831X_AUXADC_DATA_EINT_WIDTH 1 /* AUXADC_DATA_EINT */
#define WM831X_AUXADC_DCOMP4_EINT 0x0080 /* AUXADC_DCOMP4_EINT */
#define WM831X_AUXADC_DCOMP4_EINT_MASK 0x0080 /* AUXADC_DCOMP4_EINT */
#define WM831X_AUXADC_DCOMP4_EINT_SHIFT 7 /* AUXADC_DCOMP4_EINT */
#define WM831X_AUXADC_DCOMP4_EINT_WIDTH 1 /* AUXADC_DCOMP4_EINT */
#define WM831X_AUXADC_DCOMP3_EINT 0x0040 /* AUXADC_DCOMP3_EINT */
#define WM831X_AUXADC_DCOMP3_EINT_MASK 0x0040 /* AUXADC_DCOMP3_EINT */
#define WM831X_AUXADC_DCOMP3_EINT_SHIFT 6 /* AUXADC_DCOMP3_EINT */
#define WM831X_AUXADC_DCOMP3_EINT_WIDTH 1 /* AUXADC_DCOMP3_EINT */
#define WM831X_AUXADC_DCOMP2_EINT 0x0020 /* AUXADC_DCOMP2_EINT */
#define WM831X_AUXADC_DCOMP2_EINT_MASK 0x0020 /* AUXADC_DCOMP2_EINT */
#define WM831X_AUXADC_DCOMP2_EINT_SHIFT 5 /* AUXADC_DCOMP2_EINT */
#define WM831X_AUXADC_DCOMP2_EINT_WIDTH 1 /* AUXADC_DCOMP2_EINT */
#define WM831X_AUXADC_DCOMP1_EINT 0x0010 /* AUXADC_DCOMP1_EINT */
#define WM831X_AUXADC_DCOMP1_EINT_MASK 0x0010 /* AUXADC_DCOMP1_EINT */
#define WM831X_AUXADC_DCOMP1_EINT_SHIFT 4 /* AUXADC_DCOMP1_EINT */
#define WM831X_AUXADC_DCOMP1_EINT_WIDTH 1 /* AUXADC_DCOMP1_EINT */
#define WM831X_RTC_PER_EINT 0x0008 /* RTC_PER_EINT */
#define WM831X_RTC_PER_EINT_MASK 0x0008 /* RTC_PER_EINT */
#define WM831X_RTC_PER_EINT_SHIFT 3 /* RTC_PER_EINT */
#define WM831X_RTC_PER_EINT_WIDTH 1 /* RTC_PER_EINT */
#define WM831X_RTC_ALM_EINT 0x0004 /* RTC_ALM_EINT */
#define WM831X_RTC_ALM_EINT_MASK 0x0004 /* RTC_ALM_EINT */
#define WM831X_RTC_ALM_EINT_SHIFT 2 /* RTC_ALM_EINT */
#define WM831X_RTC_ALM_EINT_WIDTH 1 /* RTC_ALM_EINT */
#define WM831X_TEMP_THW_EINT 0x0002 /* TEMP_THW_EINT */
#define WM831X_TEMP_THW_EINT_MASK 0x0002 /* TEMP_THW_EINT */
#define WM831X_TEMP_THW_EINT_SHIFT 1 /* TEMP_THW_EINT */
#define WM831X_TEMP_THW_EINT_WIDTH 1 /* TEMP_THW_EINT */
/*
* R16402 (0x4012) - Interrupt Status 2
*/
#define WM831X_CHG_BATT_HOT_EINT 0x8000 /* CHG_BATT_HOT_EINT */
#define WM831X_CHG_BATT_HOT_EINT_MASK 0x8000 /* CHG_BATT_HOT_EINT */
#define WM831X_CHG_BATT_HOT_EINT_SHIFT 15 /* CHG_BATT_HOT_EINT */
#define WM831X_CHG_BATT_HOT_EINT_WIDTH 1 /* CHG_BATT_HOT_EINT */
#define WM831X_CHG_BATT_COLD_EINT 0x4000 /* CHG_BATT_COLD_EINT */
#define WM831X_CHG_BATT_COLD_EINT_MASK 0x4000 /* CHG_BATT_COLD_EINT */
#define WM831X_CHG_BATT_COLD_EINT_SHIFT 14 /* CHG_BATT_COLD_EINT */
#define WM831X_CHG_BATT_COLD_EINT_WIDTH 1 /* CHG_BATT_COLD_EINT */
#define WM831X_CHG_BATT_FAIL_EINT 0x2000 /* CHG_BATT_FAIL_EINT */
#define WM831X_CHG_BATT_FAIL_EINT_MASK 0x2000 /* CHG_BATT_FAIL_EINT */
#define WM831X_CHG_BATT_FAIL_EINT_SHIFT 13 /* CHG_BATT_FAIL_EINT */
#define WM831X_CHG_BATT_FAIL_EINT_WIDTH 1 /* CHG_BATT_FAIL_EINT */
#define WM831X_CHG_OV_EINT 0x1000 /* CHG_OV_EINT */
#define WM831X_CHG_OV_EINT_MASK 0x1000 /* CHG_OV_EINT */
#define WM831X_CHG_OV_EINT_SHIFT 12 /* CHG_OV_EINT */
#define WM831X_CHG_OV_EINT_WIDTH 1 /* CHG_OV_EINT */
#define WM831X_CHG_END_EINT 0x0800 /* CHG_END_EINT */
#define WM831X_CHG_END_EINT_MASK 0x0800 /* CHG_END_EINT */
#define WM831X_CHG_END_EINT_SHIFT 11 /* CHG_END_EINT */
#define WM831X_CHG_END_EINT_WIDTH 1 /* CHG_END_EINT */
#define WM831X_CHG_TO_EINT 0x0400 /* CHG_TO_EINT */
#define WM831X_CHG_TO_EINT_MASK 0x0400 /* CHG_TO_EINT */
#define WM831X_CHG_TO_EINT_SHIFT 10 /* CHG_TO_EINT */
#define WM831X_CHG_TO_EINT_WIDTH 1 /* CHG_TO_EINT */
#define WM831X_CHG_MODE_EINT 0x0200 /* CHG_MODE_EINT */
#define WM831X_CHG_MODE_EINT_MASK 0x0200 /* CHG_MODE_EINT */
#define WM831X_CHG_MODE_EINT_SHIFT 9 /* CHG_MODE_EINT */
#define WM831X_CHG_MODE_EINT_WIDTH 1 /* CHG_MODE_EINT */
#define WM831X_CHG_START_EINT 0x0100 /* CHG_START_EINT */
#define WM831X_CHG_START_EINT_MASK 0x0100 /* CHG_START_EINT */
#define WM831X_CHG_START_EINT_SHIFT 8 /* CHG_START_EINT */
#define WM831X_CHG_START_EINT_WIDTH 1 /* CHG_START_EINT */
#define WM831X_CS2_EINT 0x0080 /* CS2_EINT */
#define WM831X_CS2_EINT_MASK 0x0080 /* CS2_EINT */
#define WM831X_CS2_EINT_SHIFT 7 /* CS2_EINT */
#define WM831X_CS2_EINT_WIDTH 1 /* CS2_EINT */
#define WM831X_CS1_EINT 0x0040 /* CS1_EINT */
#define WM831X_CS1_EINT_MASK 0x0040 /* CS1_EINT */
#define WM831X_CS1_EINT_SHIFT 6 /* CS1_EINT */
#define WM831X_CS1_EINT_WIDTH 1 /* CS1_EINT */
#define WM831X_OTP_CMD_END_EINT 0x0020 /* OTP_CMD_END_EINT */
#define WM831X_OTP_CMD_END_EINT_MASK 0x0020 /* OTP_CMD_END_EINT */
#define WM831X_OTP_CMD_END_EINT_SHIFT 5 /* OTP_CMD_END_EINT */
#define WM831X_OTP_CMD_END_EINT_WIDTH 1 /* OTP_CMD_END_EINT */
#define WM831X_OTP_ERR_EINT 0x0010 /* OTP_ERR_EINT */
#define WM831X_OTP_ERR_EINT_MASK 0x0010 /* OTP_ERR_EINT */
#define WM831X_OTP_ERR_EINT_SHIFT 4 /* OTP_ERR_EINT */
#define WM831X_OTP_ERR_EINT_WIDTH 1 /* OTP_ERR_EINT */
#define WM831X_PS_POR_EINT 0x0004 /* PS_POR_EINT */
#define WM831X_PS_POR_EINT_MASK 0x0004 /* PS_POR_EINT */
#define WM831X_PS_POR_EINT_SHIFT 2 /* PS_POR_EINT */
#define WM831X_PS_POR_EINT_WIDTH 1 /* PS_POR_EINT */
#define WM831X_PS_SLEEP_OFF_EINT 0x0002 /* PS_SLEEP_OFF_EINT */
#define WM831X_PS_SLEEP_OFF_EINT_MASK 0x0002 /* PS_SLEEP_OFF_EINT */
#define WM831X_PS_SLEEP_OFF_EINT_SHIFT 1 /* PS_SLEEP_OFF_EINT */
#define WM831X_PS_SLEEP_OFF_EINT_WIDTH 1 /* PS_SLEEP_OFF_EINT */
#define WM831X_PS_ON_WAKE_EINT 0x0001 /* PS_ON_WAKE_EINT */
#define WM831X_PS_ON_WAKE_EINT_MASK 0x0001 /* PS_ON_WAKE_EINT */
#define WM831X_PS_ON_WAKE_EINT_SHIFT 0 /* PS_ON_WAKE_EINT */
#define WM831X_PS_ON_WAKE_EINT_WIDTH 1 /* PS_ON_WAKE_EINT */
/*
* R16403 (0x4013) - Interrupt Status 3
*/
#define WM831X_UV_LDO10_EINT 0x0200 /* UV_LDO10_EINT */
#define WM831X_UV_LDO10_EINT_MASK 0x0200 /* UV_LDO10_EINT */
#define WM831X_UV_LDO10_EINT_SHIFT 9 /* UV_LDO10_EINT */
#define WM831X_UV_LDO10_EINT_WIDTH 1 /* UV_LDO10_EINT */
#define WM831X_UV_LDO9_EINT 0x0100 /* UV_LDO9_EINT */
#define WM831X_UV_LDO9_EINT_MASK 0x0100 /* UV_LDO9_EINT */
#define WM831X_UV_LDO9_EINT_SHIFT 8 /* UV_LDO9_EINT */
#define WM831X_UV_LDO9_EINT_WIDTH 1 /* UV_LDO9_EINT */
#define WM831X_UV_LDO8_EINT 0x0080 /* UV_LDO8_EINT */
#define WM831X_UV_LDO8_EINT_MASK 0x0080 /* UV_LDO8_EINT */
#define WM831X_UV_LDO8_EINT_SHIFT 7 /* UV_LDO8_EINT */
#define WM831X_UV_LDO8_EINT_WIDTH 1 /* UV_LDO8_EINT */
#define WM831X_UV_LDO7_EINT 0x0040 /* UV_LDO7_EINT */
#define WM831X_UV_LDO7_EINT_MASK 0x0040 /* UV_LDO7_EINT */
#define WM831X_UV_LDO7_EINT_SHIFT 6 /* UV_LDO7_EINT */
#define WM831X_UV_LDO7_EINT_WIDTH 1 /* UV_LDO7_EINT */
#define WM831X_UV_LDO6_EINT 0x0020 /* UV_LDO6_EINT */
#define WM831X_UV_LDO6_EINT_MASK 0x0020 /* UV_LDO6_EINT */
#define WM831X_UV_LDO6_EINT_SHIFT 5 /* UV_LDO6_EINT */
#define WM831X_UV_LDO6_EINT_WIDTH 1 /* UV_LDO6_EINT */
#define WM831X_UV_LDO5_EINT 0x0010 /* UV_LDO5_EINT */
#define WM831X_UV_LDO5_EINT_MASK 0x0010 /* UV_LDO5_EINT */
#define WM831X_UV_LDO5_EINT_SHIFT 4 /* UV_LDO5_EINT */
#define WM831X_UV_LDO5_EINT_WIDTH 1 /* UV_LDO5_EINT */
#define WM831X_UV_LDO4_EINT 0x0008 /* UV_LDO4_EINT */
#define WM831X_UV_LDO4_EINT_MASK 0x0008 /* UV_LDO4_EINT */
#define WM831X_UV_LDO4_EINT_SHIFT 3 /* UV_LDO4_EINT */
#define WM831X_UV_LDO4_EINT_WIDTH 1 /* UV_LDO4_EINT */
#define WM831X_UV_LDO3_EINT 0x0004 /* UV_LDO3_EINT */
#define WM831X_UV_LDO3_EINT_MASK 0x0004 /* UV_LDO3_EINT */
#define WM831X_UV_LDO3_EINT_SHIFT 2 /* UV_LDO3_EINT */
#define WM831X_UV_LDO3_EINT_WIDTH 1 /* UV_LDO3_EINT */
#define WM831X_UV_LDO2_EINT 0x0002 /* UV_LDO2_EINT */
#define WM831X_UV_LDO2_EINT_MASK 0x0002 /* UV_LDO2_EINT */
#define WM831X_UV_LDO2_EINT_SHIFT 1 /* UV_LDO2_EINT */
#define WM831X_UV_LDO2_EINT_WIDTH 1 /* UV_LDO2_EINT */
#define WM831X_UV_LDO1_EINT 0x0001 /* UV_LDO1_EINT */
#define WM831X_UV_LDO1_EINT_MASK 0x0001 /* UV_LDO1_EINT */
#define WM831X_UV_LDO1_EINT_SHIFT 0 /* UV_LDO1_EINT */
#define WM831X_UV_LDO1_EINT_WIDTH 1 /* UV_LDO1_EINT */
/*
* R16404 (0x4014) - Interrupt Status 4
*/
#define WM831X_HC_DC2_EINT 0x0200 /* HC_DC2_EINT */
#define WM831X_HC_DC2_EINT_MASK 0x0200 /* HC_DC2_EINT */
#define WM831X_HC_DC2_EINT_SHIFT 9 /* HC_DC2_EINT */
#define WM831X_HC_DC2_EINT_WIDTH 1 /* HC_DC2_EINT */
#define WM831X_HC_DC1_EINT 0x0100 /* HC_DC1_EINT */
#define WM831X_HC_DC1_EINT_MASK 0x0100 /* HC_DC1_EINT */
#define WM831X_HC_DC1_EINT_SHIFT 8 /* HC_DC1_EINT */
#define WM831X_HC_DC1_EINT_WIDTH 1 /* HC_DC1_EINT */
#define WM831X_UV_DC4_EINT 0x0008 /* UV_DC4_EINT */
#define WM831X_UV_DC4_EINT_MASK 0x0008 /* UV_DC4_EINT */
#define WM831X_UV_DC4_EINT_SHIFT 3 /* UV_DC4_EINT */
#define WM831X_UV_DC4_EINT_WIDTH 1 /* UV_DC4_EINT */
#define WM831X_UV_DC3_EINT 0x0004 /* UV_DC3_EINT */
#define WM831X_UV_DC3_EINT_MASK 0x0004 /* UV_DC3_EINT */
#define WM831X_UV_DC3_EINT_SHIFT 2 /* UV_DC3_EINT */
#define WM831X_UV_DC3_EINT_WIDTH 1 /* UV_DC3_EINT */
#define WM831X_UV_DC2_EINT 0x0002 /* UV_DC2_EINT */
#define WM831X_UV_DC2_EINT_MASK 0x0002 /* UV_DC2_EINT */
#define WM831X_UV_DC2_EINT_SHIFT 1 /* UV_DC2_EINT */
#define WM831X_UV_DC2_EINT_WIDTH 1 /* UV_DC2_EINT */
#define WM831X_UV_DC1_EINT 0x0001 /* UV_DC1_EINT */
#define WM831X_UV_DC1_EINT_MASK 0x0001 /* UV_DC1_EINT */
#define WM831X_UV_DC1_EINT_SHIFT 0 /* UV_DC1_EINT */
#define WM831X_UV_DC1_EINT_WIDTH 1 /* UV_DC1_EINT */
/*
* R16405 (0x4015) - Interrupt Status 5
*/
#define WM831X_GP16_EINT 0x8000 /* GP16_EINT */
#define WM831X_GP16_EINT_MASK 0x8000 /* GP16_EINT */
#define WM831X_GP16_EINT_SHIFT 15 /* GP16_EINT */
#define WM831X_GP16_EINT_WIDTH 1 /* GP16_EINT */
#define WM831X_GP15_EINT 0x4000 /* GP15_EINT */
#define WM831X_GP15_EINT_MASK 0x4000 /* GP15_EINT */
#define WM831X_GP15_EINT_SHIFT 14 /* GP15_EINT */
#define WM831X_GP15_EINT_WIDTH 1 /* GP15_EINT */
#define WM831X_GP14_EINT 0x2000 /* GP14_EINT */
#define WM831X_GP14_EINT_MASK 0x2000 /* GP14_EINT */
#define WM831X_GP14_EINT_SHIFT 13 /* GP14_EINT */
#define WM831X_GP14_EINT_WIDTH 1 /* GP14_EINT */
#define WM831X_GP13_EINT 0x1000 /* GP13_EINT */
#define WM831X_GP13_EINT_MASK 0x1000 /* GP13_EINT */
#define WM831X_GP13_EINT_SHIFT 12 /* GP13_EINT */
#define WM831X_GP13_EINT_WIDTH 1 /* GP13_EINT */
#define WM831X_GP12_EINT 0x0800 /* GP12_EINT */
#define WM831X_GP12_EINT_MASK 0x0800 /* GP12_EINT */
#define WM831X_GP12_EINT_SHIFT 11 /* GP12_EINT */
#define WM831X_GP12_EINT_WIDTH 1 /* GP12_EINT */
#define WM831X_GP11_EINT 0x0400 /* GP11_EINT */
#define WM831X_GP11_EINT_MASK 0x0400 /* GP11_EINT */
#define WM831X_GP11_EINT_SHIFT 10 /* GP11_EINT */
#define WM831X_GP11_EINT_WIDTH 1 /* GP11_EINT */
#define WM831X_GP10_EINT 0x0200 /* GP10_EINT */
#define WM831X_GP10_EINT_MASK 0x0200 /* GP10_EINT */
#define WM831X_GP10_EINT_SHIFT 9 /* GP10_EINT */
#define WM831X_GP10_EINT_WIDTH 1 /* GP10_EINT */
#define WM831X_GP9_EINT 0x0100 /* GP9_EINT */
#define WM831X_GP9_EINT_MASK 0x0100 /* GP9_EINT */
#define WM831X_GP9_EINT_SHIFT 8 /* GP9_EINT */
#define WM831X_GP9_EINT_WIDTH 1 /* GP9_EINT */
#define WM831X_GP8_EINT 0x0080 /* GP8_EINT */
#define WM831X_GP8_EINT_MASK 0x0080 /* GP8_EINT */
#define WM831X_GP8_EINT_SHIFT 7 /* GP8_EINT */
#define WM831X_GP8_EINT_WIDTH 1 /* GP8_EINT */
#define WM831X_GP7_EINT 0x0040 /* GP7_EINT */
#define WM831X_GP7_EINT_MASK 0x0040 /* GP7_EINT */
#define WM831X_GP7_EINT_SHIFT 6 /* GP7_EINT */
#define WM831X_GP7_EINT_WIDTH 1 /* GP7_EINT */
#define WM831X_GP6_EINT 0x0020 /* GP6_EINT */
#define WM831X_GP6_EINT_MASK 0x0020 /* GP6_EINT */
#define WM831X_GP6_EINT_SHIFT 5 /* GP6_EINT */
#define WM831X_GP6_EINT_WIDTH 1 /* GP6_EINT */
#define WM831X_GP5_EINT 0x0010 /* GP5_EINT */
#define WM831X_GP5_EINT_MASK 0x0010 /* GP5_EINT */
#define WM831X_GP5_EINT_SHIFT 4 /* GP5_EINT */
#define WM831X_GP5_EINT_WIDTH 1 /* GP5_EINT */
#define WM831X_GP4_EINT 0x0008 /* GP4_EINT */
#define WM831X_GP4_EINT_MASK 0x0008 /* GP4_EINT */
#define WM831X_GP4_EINT_SHIFT 3 /* GP4_EINT */
#define WM831X_GP4_EINT_WIDTH 1 /* GP4_EINT */
#define WM831X_GP3_EINT 0x0004 /* GP3_EINT */
#define WM831X_GP3_EINT_MASK 0x0004 /* GP3_EINT */
#define WM831X_GP3_EINT_SHIFT 2 /* GP3_EINT */
#define WM831X_GP3_EINT_WIDTH 1 /* GP3_EINT */
#define WM831X_GP2_EINT 0x0002 /* GP2_EINT */
#define WM831X_GP2_EINT_MASK 0x0002 /* GP2_EINT */
#define WM831X_GP2_EINT_SHIFT 1 /* GP2_EINT */
#define WM831X_GP2_EINT_WIDTH 1 /* GP2_EINT */
#define WM831X_GP1_EINT 0x0001 /* GP1_EINT */
#define WM831X_GP1_EINT_MASK 0x0001 /* GP1_EINT */
#define WM831X_GP1_EINT_SHIFT 0 /* GP1_EINT */
#define WM831X_GP1_EINT_WIDTH 1 /* GP1_EINT */
/*
* R16407 (0x4017) - IRQ Config
*/
#define WM831X_IRQ_OD 0x0002 /* IRQ_OD */
#define WM831X_IRQ_OD_MASK 0x0002 /* IRQ_OD */
#define WM831X_IRQ_OD_SHIFT 1 /* IRQ_OD */
#define WM831X_IRQ_OD_WIDTH 1 /* IRQ_OD */
#define WM831X_IM_IRQ 0x0001 /* IM_IRQ */
#define WM831X_IM_IRQ_MASK 0x0001 /* IM_IRQ */
#define WM831X_IM_IRQ_SHIFT 0 /* IM_IRQ */
#define WM831X_IM_IRQ_WIDTH 1 /* IM_IRQ */
/*
* R16408 (0x4018) - System Interrupts Mask
*/
#define WM831X_IM_PS_INT 0x8000 /* IM_PS_INT */
#define WM831X_IM_PS_INT_MASK 0x8000 /* IM_PS_INT */
#define WM831X_IM_PS_INT_SHIFT 15 /* IM_PS_INT */
#define WM831X_IM_PS_INT_WIDTH 1 /* IM_PS_INT */
#define WM831X_IM_TEMP_INT 0x4000 /* IM_TEMP_INT */
#define WM831X_IM_TEMP_INT_MASK 0x4000 /* IM_TEMP_INT */
#define WM831X_IM_TEMP_INT_SHIFT 14 /* IM_TEMP_INT */
#define WM831X_IM_TEMP_INT_WIDTH 1 /* IM_TEMP_INT */
#define WM831X_IM_GP_INT 0x2000 /* IM_GP_INT */
#define WM831X_IM_GP_INT_MASK 0x2000 /* IM_GP_INT */
#define WM831X_IM_GP_INT_SHIFT 13 /* IM_GP_INT */
#define WM831X_IM_GP_INT_WIDTH 1 /* IM_GP_INT */
#define WM831X_IM_ON_PIN_INT 0x1000 /* IM_ON_PIN_INT */
#define WM831X_IM_ON_PIN_INT_MASK 0x1000 /* IM_ON_PIN_INT */
#define WM831X_IM_ON_PIN_INT_SHIFT 12 /* IM_ON_PIN_INT */
#define WM831X_IM_ON_PIN_INT_WIDTH 1 /* IM_ON_PIN_INT */
#define WM831X_IM_WDOG_INT 0x0800 /* IM_WDOG_INT */
#define WM831X_IM_WDOG_INT_MASK 0x0800 /* IM_WDOG_INT */
#define WM831X_IM_WDOG_INT_SHIFT 11 /* IM_WDOG_INT */
#define WM831X_IM_WDOG_INT_WIDTH 1 /* IM_WDOG_INT */
#define WM831X_IM_TCHDATA_INT 0x0400 /* IM_TCHDATA_INT */
#define WM831X_IM_TCHDATA_INT_MASK 0x0400 /* IM_TCHDATA_INT */
#define WM831X_IM_TCHDATA_INT_SHIFT 10 /* IM_TCHDATA_INT */
#define WM831X_IM_TCHDATA_INT_WIDTH 1 /* IM_TCHDATA_INT */
#define WM831X_IM_TCHPD_INT 0x0200 /* IM_TCHPD_INT */
#define WM831X_IM_TCHPD_INT_MASK 0x0200 /* IM_TCHPD_INT */
#define WM831X_IM_TCHPD_INT_SHIFT 9 /* IM_TCHPD_INT */
#define WM831X_IM_TCHPD_INT_WIDTH 1 /* IM_TCHPD_INT */
#define WM831X_IM_AUXADC_INT 0x0100 /* IM_AUXADC_INT */
#define WM831X_IM_AUXADC_INT_MASK 0x0100 /* IM_AUXADC_INT */
#define WM831X_IM_AUXADC_INT_SHIFT 8 /* IM_AUXADC_INT */
#define WM831X_IM_AUXADC_INT_WIDTH 1 /* IM_AUXADC_INT */
#define WM831X_IM_PPM_INT 0x0080 /* IM_PPM_INT */
#define WM831X_IM_PPM_INT_MASK 0x0080 /* IM_PPM_INT */
#define WM831X_IM_PPM_INT_SHIFT 7 /* IM_PPM_INT */
#define WM831X_IM_PPM_INT_WIDTH 1 /* IM_PPM_INT */
#define WM831X_IM_CS_INT 0x0040 /* IM_CS_INT */
#define WM831X_IM_CS_INT_MASK 0x0040 /* IM_CS_INT */
#define WM831X_IM_CS_INT_SHIFT 6 /* IM_CS_INT */
#define WM831X_IM_CS_INT_WIDTH 1 /* IM_CS_INT */
#define WM831X_IM_RTC_INT 0x0020 /* IM_RTC_INT */
#define WM831X_IM_RTC_INT_MASK 0x0020 /* IM_RTC_INT */
#define WM831X_IM_RTC_INT_SHIFT 5 /* IM_RTC_INT */
#define WM831X_IM_RTC_INT_WIDTH 1 /* IM_RTC_INT */
#define WM831X_IM_OTP_INT 0x0010 /* IM_OTP_INT */
#define WM831X_IM_OTP_INT_MASK 0x0010 /* IM_OTP_INT */
#define WM831X_IM_OTP_INT_SHIFT 4 /* IM_OTP_INT */
#define WM831X_IM_OTP_INT_WIDTH 1 /* IM_OTP_INT */
#define WM831X_IM_CHILD_INT 0x0008 /* IM_CHILD_INT */
#define WM831X_IM_CHILD_INT_MASK 0x0008 /* IM_CHILD_INT */
#define WM831X_IM_CHILD_INT_SHIFT 3 /* IM_CHILD_INT */
#define WM831X_IM_CHILD_INT_WIDTH 1 /* IM_CHILD_INT */
#define WM831X_IM_CHG_INT 0x0004 /* IM_CHG_INT */
#define WM831X_IM_CHG_INT_MASK 0x0004 /* IM_CHG_INT */
#define WM831X_IM_CHG_INT_SHIFT 2 /* IM_CHG_INT */
#define WM831X_IM_CHG_INT_WIDTH 1 /* IM_CHG_INT */
#define WM831X_IM_HC_INT 0x0002 /* IM_HC_INT */
#define WM831X_IM_HC_INT_MASK 0x0002 /* IM_HC_INT */
#define WM831X_IM_HC_INT_SHIFT 1 /* IM_HC_INT */
#define WM831X_IM_HC_INT_WIDTH 1 /* IM_HC_INT */
#define WM831X_IM_UV_INT 0x0001 /* IM_UV_INT */
#define WM831X_IM_UV_INT_MASK 0x0001 /* IM_UV_INT */
#define WM831X_IM_UV_INT_SHIFT 0 /* IM_UV_INT */
#define WM831X_IM_UV_INT_WIDTH 1 /* IM_UV_INT */
/*
* R16409 (0x4019) - Interrupt Status 1 Mask
*/
#define WM831X_IM_PPM_SYSLO_EINT 0x8000 /* IM_PPM_SYSLO_EINT */
#define WM831X_IM_PPM_SYSLO_EINT_MASK 0x8000 /* IM_PPM_SYSLO_EINT */
#define WM831X_IM_PPM_SYSLO_EINT_SHIFT 15 /* IM_PPM_SYSLO_EINT */
#define WM831X_IM_PPM_SYSLO_EINT_WIDTH 1 /* IM_PPM_SYSLO_EINT */
#define WM831X_IM_PPM_PWR_SRC_EINT 0x4000 /* IM_PPM_PWR_SRC_EINT */
#define WM831X_IM_PPM_PWR_SRC_EINT_MASK 0x4000 /* IM_PPM_PWR_SRC_EINT */
#define WM831X_IM_PPM_PWR_SRC_EINT_SHIFT 14 /* IM_PPM_PWR_SRC_EINT */
#define WM831X_IM_PPM_PWR_SRC_EINT_WIDTH 1 /* IM_PPM_PWR_SRC_EINT */
#define WM831X_IM_PPM_USB_CURR_EINT 0x2000 /* IM_PPM_USB_CURR_EINT */
#define WM831X_IM_PPM_USB_CURR_EINT_MASK 0x2000 /* IM_PPM_USB_CURR_EINT */
#define WM831X_IM_PPM_USB_CURR_EINT_SHIFT 13 /* IM_PPM_USB_CURR_EINT */
#define WM831X_IM_PPM_USB_CURR_EINT_WIDTH 1 /* IM_PPM_USB_CURR_EINT */
#define WM831X_IM_ON_PIN_EINT 0x1000 /* IM_ON_PIN_EINT */
#define WM831X_IM_ON_PIN_EINT_MASK 0x1000 /* IM_ON_PIN_EINT */
#define WM831X_IM_ON_PIN_EINT_SHIFT 12 /* IM_ON_PIN_EINT */
#define WM831X_IM_ON_PIN_EINT_WIDTH 1 /* IM_ON_PIN_EINT */
#define WM831X_IM_WDOG_TO_EINT 0x0800 /* IM_WDOG_TO_EINT */
#define WM831X_IM_WDOG_TO_EINT_MASK 0x0800 /* IM_WDOG_TO_EINT */
#define WM831X_IM_WDOG_TO_EINT_SHIFT 11 /* IM_WDOG_TO_EINT */
#define WM831X_IM_WDOG_TO_EINT_WIDTH 1 /* IM_WDOG_TO_EINT */
#define WM831X_IM_TCHDATA_EINT 0x0400 /* IM_TCHDATA_EINT */
#define WM831X_IM_TCHDATA_EINT_MASK 0x0400 /* IM_TCHDATA_EINT */
#define WM831X_IM_TCHDATA_EINT_SHIFT 10 /* IM_TCHDATA_EINT */
#define WM831X_IM_TCHDATA_EINT_WIDTH 1 /* IM_TCHDATA_EINT */
#define WM831X_IM_TCHPD_EINT 0x0200 /* IM_TCHPD_EINT */
#define WM831X_IM_TCHPD_EINT_MASK 0x0200 /* IM_TCHPD_EINT */
#define WM831X_IM_TCHPD_EINT_SHIFT 9 /* IM_TCHPD_EINT */
#define WM831X_IM_TCHPD_EINT_WIDTH 1 /* IM_TCHPD_EINT */
#define WM831X_IM_AUXADC_DATA_EINT 0x0100 /* IM_AUXADC_DATA_EINT */
#define WM831X_IM_AUXADC_DATA_EINT_MASK 0x0100 /* IM_AUXADC_DATA_EINT */
#define WM831X_IM_AUXADC_DATA_EINT_SHIFT 8 /* IM_AUXADC_DATA_EINT */
#define WM831X_IM_AUXADC_DATA_EINT_WIDTH 1 /* IM_AUXADC_DATA_EINT */
#define WM831X_IM_AUXADC_DCOMP4_EINT 0x0080 /* IM_AUXADC_DCOMP4_EINT */
#define WM831X_IM_AUXADC_DCOMP4_EINT_MASK 0x0080 /* IM_AUXADC_DCOMP4_EINT */
#define WM831X_IM_AUXADC_DCOMP4_EINT_SHIFT 7 /* IM_AUXADC_DCOMP4_EINT */
#define WM831X_IM_AUXADC_DCOMP4_EINT_WIDTH 1 /* IM_AUXADC_DCOMP4_EINT */
#define WM831X_IM_AUXADC_DCOMP3_EINT 0x0040 /* IM_AUXADC_DCOMP3_EINT */
#define WM831X_IM_AUXADC_DCOMP3_EINT_MASK 0x0040 /* IM_AUXADC_DCOMP3_EINT */
#define WM831X_IM_AUXADC_DCOMP3_EINT_SHIFT 6 /* IM_AUXADC_DCOMP3_EINT */
#define WM831X_IM_AUXADC_DCOMP3_EINT_WIDTH 1 /* IM_AUXADC_DCOMP3_EINT */
#define WM831X_IM_AUXADC_DCOMP2_EINT 0x0020 /* IM_AUXADC_DCOMP2_EINT */
#define WM831X_IM_AUXADC_DCOMP2_EINT_MASK 0x0020 /* IM_AUXADC_DCOMP2_EINT */
#define WM831X_IM_AUXADC_DCOMP2_EINT_SHIFT 5 /* IM_AUXADC_DCOMP2_EINT */
#define WM831X_IM_AUXADC_DCOMP2_EINT_WIDTH 1 /* IM_AUXADC_DCOMP2_EINT */
#define WM831X_IM_AUXADC_DCOMP1_EINT 0x0010 /* IM_AUXADC_DCOMP1_EINT */
#define WM831X_IM_AUXADC_DCOMP1_EINT_MASK 0x0010 /* IM_AUXADC_DCOMP1_EINT */
#define WM831X_IM_AUXADC_DCOMP1_EINT_SHIFT 4 /* IM_AUXADC_DCOMP1_EINT */
#define WM831X_IM_AUXADC_DCOMP1_EINT_WIDTH 1 /* IM_AUXADC_DCOMP1_EINT */
#define WM831X_IM_RTC_PER_EINT 0x0008 /* IM_RTC_PER_EINT */
#define WM831X_IM_RTC_PER_EINT_MASK 0x0008 /* IM_RTC_PER_EINT */
#define WM831X_IM_RTC_PER_EINT_SHIFT 3 /* IM_RTC_PER_EINT */
#define WM831X_IM_RTC_PER_EINT_WIDTH 1 /* IM_RTC_PER_EINT */
#define WM831X_IM_RTC_ALM_EINT 0x0004 /* IM_RTC_ALM_EINT */
#define WM831X_IM_RTC_ALM_EINT_MASK 0x0004 /* IM_RTC_ALM_EINT */
#define WM831X_IM_RTC_ALM_EINT_SHIFT 2 /* IM_RTC_ALM_EINT */
#define WM831X_IM_RTC_ALM_EINT_WIDTH 1 /* IM_RTC_ALM_EINT */
#define WM831X_IM_TEMP_THW_EINT 0x0002 /* IM_TEMP_THW_EINT */
#define WM831X_IM_TEMP_THW_EINT_MASK 0x0002 /* IM_TEMP_THW_EINT */
#define WM831X_IM_TEMP_THW_EINT_SHIFT 1 /* IM_TEMP_THW_EINT */
#define WM831X_IM_TEMP_THW_EINT_WIDTH 1 /* IM_TEMP_THW_EINT */
/*
* R16410 (0x401A) - Interrupt Status 2 Mask
*/
#define WM831X_IM_CHG_BATT_HOT_EINT 0x8000 /* IM_CHG_BATT_HOT_EINT */
#define WM831X_IM_CHG_BATT_HOT_EINT_MASK 0x8000 /* IM_CHG_BATT_HOT_EINT */
#define WM831X_IM_CHG_BATT_HOT_EINT_SHIFT 15 /* IM_CHG_BATT_HOT_EINT */
#define WM831X_IM_CHG_BATT_HOT_EINT_WIDTH 1 /* IM_CHG_BATT_HOT_EINT */
#define WM831X_IM_CHG_BATT_COLD_EINT 0x4000 /* IM_CHG_BATT_COLD_EINT */
#define WM831X_IM_CHG_BATT_COLD_EINT_MASK 0x4000 /* IM_CHG_BATT_COLD_EINT */
#define WM831X_IM_CHG_BATT_COLD_EINT_SHIFT 14 /* IM_CHG_BATT_COLD_EINT */
#define WM831X_IM_CHG_BATT_COLD_EINT_WIDTH 1 /* IM_CHG_BATT_COLD_EINT */
#define WM831X_IM_CHG_BATT_FAIL_EINT 0x2000 /* IM_CHG_BATT_FAIL_EINT */
#define WM831X_IM_CHG_BATT_FAIL_EINT_MASK 0x2000 /* IM_CHG_BATT_FAIL_EINT */
#define WM831X_IM_CHG_BATT_FAIL_EINT_SHIFT 13 /* IM_CHG_BATT_FAIL_EINT */
#define WM831X_IM_CHG_BATT_FAIL_EINT_WIDTH 1 /* IM_CHG_BATT_FAIL_EINT */
#define WM831X_IM_CHG_OV_EINT 0x1000 /* IM_CHG_OV_EINT */
#define WM831X_IM_CHG_OV_EINT_MASK 0x1000 /* IM_CHG_OV_EINT */
#define WM831X_IM_CHG_OV_EINT_SHIFT 12 /* IM_CHG_OV_EINT */
#define WM831X_IM_CHG_OV_EINT_WIDTH 1 /* IM_CHG_OV_EINT */
#define WM831X_IM_CHG_END_EINT 0x0800 /* IM_CHG_END_EINT */
#define WM831X_IM_CHG_END_EINT_MASK 0x0800 /* IM_CHG_END_EINT */
#define WM831X_IM_CHG_END_EINT_SHIFT 11 /* IM_CHG_END_EINT */
#define WM831X_IM_CHG_END_EINT_WIDTH 1 /* IM_CHG_END_EINT */
#define WM831X_IM_CHG_TO_EINT 0x0400 /* IM_CHG_TO_EINT */
#define WM831X_IM_CHG_TO_EINT_MASK 0x0400 /* IM_CHG_TO_EINT */
#define WM831X_IM_CHG_TO_EINT_SHIFT 10 /* IM_CHG_TO_EINT */
#define WM831X_IM_CHG_TO_EINT_WIDTH 1 /* IM_CHG_TO_EINT */
#define WM831X_IM_CHG_MODE_EINT 0x0200 /* IM_CHG_MODE_EINT */
#define WM831X_IM_CHG_MODE_EINT_MASK 0x0200 /* IM_CHG_MODE_EINT */
#define WM831X_IM_CHG_MODE_EINT_SHIFT 9 /* IM_CHG_MODE_EINT */
#define WM831X_IM_CHG_MODE_EINT_WIDTH 1 /* IM_CHG_MODE_EINT */
#define WM831X_IM_CHG_START_EINT 0x0100 /* IM_CHG_START_EINT */
#define WM831X_IM_CHG_START_EINT_MASK 0x0100 /* IM_CHG_START_EINT */
#define WM831X_IM_CHG_START_EINT_SHIFT 8 /* IM_CHG_START_EINT */
#define WM831X_IM_CHG_START_EINT_WIDTH 1 /* IM_CHG_START_EINT */
#define WM831X_IM_CS2_EINT 0x0080 /* IM_CS2_EINT */
#define WM831X_IM_CS2_EINT_MASK 0x0080 /* IM_CS2_EINT */
#define WM831X_IM_CS2_EINT_SHIFT 7 /* IM_CS2_EINT */
#define WM831X_IM_CS2_EINT_WIDTH 1 /* IM_CS2_EINT */
#define WM831X_IM_CS1_EINT 0x0040 /* IM_CS1_EINT */
#define WM831X_IM_CS1_EINT_MASK 0x0040 /* IM_CS1_EINT */
#define WM831X_IM_CS1_EINT_SHIFT 6 /* IM_CS1_EINT */
#define WM831X_IM_CS1_EINT_WIDTH 1 /* IM_CS1_EINT */
#define WM831X_IM_OTP_CMD_END_EINT 0x0020 /* IM_OTP_CMD_END_EINT */
#define WM831X_IM_OTP_CMD_END_EINT_MASK 0x0020 /* IM_OTP_CMD_END_EINT */
#define WM831X_IM_OTP_CMD_END_EINT_SHIFT 5 /* IM_OTP_CMD_END_EINT */
#define WM831X_IM_OTP_CMD_END_EINT_WIDTH 1 /* IM_OTP_CMD_END_EINT */
#define WM831X_IM_OTP_ERR_EINT 0x0010 /* IM_OTP_ERR_EINT */
#define WM831X_IM_OTP_ERR_EINT_MASK 0x0010 /* IM_OTP_ERR_EINT */
#define WM831X_IM_OTP_ERR_EINT_SHIFT 4 /* IM_OTP_ERR_EINT */
#define WM831X_IM_OTP_ERR_EINT_WIDTH 1 /* IM_OTP_ERR_EINT */
#define WM831X_IM_PS_POR_EINT 0x0004 /* IM_PS_POR_EINT */
#define WM831X_IM_PS_POR_EINT_MASK 0x0004 /* IM_PS_POR_EINT */
#define WM831X_IM_PS_POR_EINT_SHIFT 2 /* IM_PS_POR_EINT */
#define WM831X_IM_PS_POR_EINT_WIDTH 1 /* IM_PS_POR_EINT */
#define WM831X_IM_PS_SLEEP_OFF_EINT 0x0002 /* IM_PS_SLEEP_OFF_EINT */
#define WM831X_IM_PS_SLEEP_OFF_EINT_MASK 0x0002 /* IM_PS_SLEEP_OFF_EINT */
#define WM831X_IM_PS_SLEEP_OFF_EINT_SHIFT 1 /* IM_PS_SLEEP_OFF_EINT */
#define WM831X_IM_PS_SLEEP_OFF_EINT_WIDTH 1 /* IM_PS_SLEEP_OFF_EINT */
#define WM831X_IM_PS_ON_WAKE_EINT 0x0001 /* IM_PS_ON_WAKE_EINT */
#define WM831X_IM_PS_ON_WAKE_EINT_MASK 0x0001 /* IM_PS_ON_WAKE_EINT */
#define WM831X_IM_PS_ON_WAKE_EINT_SHIFT 0 /* IM_PS_ON_WAKE_EINT */
#define WM831X_IM_PS_ON_WAKE_EINT_WIDTH 1 /* IM_PS_ON_WAKE_EINT */
/*
* R16411 (0x401B) - Interrupt Status 3 Mask
*/
#define WM831X_IM_UV_LDO10_EINT 0x0200 /* IM_UV_LDO10_EINT */
#define WM831X_IM_UV_LDO10_EINT_MASK 0x0200 /* IM_UV_LDO10_EINT */
#define WM831X_IM_UV_LDO10_EINT_SHIFT 9 /* IM_UV_LDO10_EINT */
#define WM831X_IM_UV_LDO10_EINT_WIDTH 1 /* IM_UV_LDO10_EINT */
#define WM831X_IM_UV_LDO9_EINT 0x0100 /* IM_UV_LDO9_EINT */
#define WM831X_IM_UV_LDO9_EINT_MASK 0x0100 /* IM_UV_LDO9_EINT */
#define WM831X_IM_UV_LDO9_EINT_SHIFT 8 /* IM_UV_LDO9_EINT */
#define WM831X_IM_UV_LDO9_EINT_WIDTH 1 /* IM_UV_LDO9_EINT */
#define WM831X_IM_UV_LDO8_EINT 0x0080 /* IM_UV_LDO8_EINT */
#define WM831X_IM_UV_LDO8_EINT_MASK 0x0080 /* IM_UV_LDO8_EINT */
#define WM831X_IM_UV_LDO8_EINT_SHIFT 7 /* IM_UV_LDO8_EINT */
#define WM831X_IM_UV_LDO8_EINT_WIDTH 1 /* IM_UV_LDO8_EINT */
#define WM831X_IM_UV_LDO7_EINT 0x0040 /* IM_UV_LDO7_EINT */
#define WM831X_IM_UV_LDO7_EINT_MASK 0x0040 /* IM_UV_LDO7_EINT */
#define WM831X_IM_UV_LDO7_EINT_SHIFT 6 /* IM_UV_LDO7_EINT */
#define WM831X_IM_UV_LDO7_EINT_WIDTH 1 /* IM_UV_LDO7_EINT */
#define WM831X_IM_UV_LDO6_EINT 0x0020 /* IM_UV_LDO6_EINT */
#define WM831X_IM_UV_LDO6_EINT_MASK 0x0020 /* IM_UV_LDO6_EINT */
#define WM831X_IM_UV_LDO6_EINT_SHIFT 5 /* IM_UV_LDO6_EINT */
#define WM831X_IM_UV_LDO6_EINT_WIDTH 1 /* IM_UV_LDO6_EINT */
#define WM831X_IM_UV_LDO5_EINT 0x0010 /* IM_UV_LDO5_EINT */
#define WM831X_IM_UV_LDO5_EINT_MASK 0x0010 /* IM_UV_LDO5_EINT */
#define WM831X_IM_UV_LDO5_EINT_SHIFT 4 /* IM_UV_LDO5_EINT */
#define WM831X_IM_UV_LDO5_EINT_WIDTH 1 /* IM_UV_LDO5_EINT */
#define WM831X_IM_UV_LDO4_EINT 0x0008 /* IM_UV_LDO4_EINT */
#define WM831X_IM_UV_LDO4_EINT_MASK 0x0008 /* IM_UV_LDO4_EINT */
#define WM831X_IM_UV_LDO4_EINT_SHIFT 3 /* IM_UV_LDO4_EINT */
#define WM831X_IM_UV_LDO4_EINT_WIDTH 1 /* IM_UV_LDO4_EINT */
#define WM831X_IM_UV_LDO3_EINT 0x0004 /* IM_UV_LDO3_EINT */
#define WM831X_IM_UV_LDO3_EINT_MASK 0x0004 /* IM_UV_LDO3_EINT */
#define WM831X_IM_UV_LDO3_EINT_SHIFT 2 /* IM_UV_LDO3_EINT */
#define WM831X_IM_UV_LDO3_EINT_WIDTH 1 /* IM_UV_LDO3_EINT */
#define WM831X_IM_UV_LDO2_EINT 0x0002 /* IM_UV_LDO2_EINT */
#define WM831X_IM_UV_LDO2_EINT_MASK 0x0002 /* IM_UV_LDO2_EINT */
#define WM831X_IM_UV_LDO2_EINT_SHIFT 1 /* IM_UV_LDO2_EINT */
#define WM831X_IM_UV_LDO2_EINT_WIDTH 1 /* IM_UV_LDO2_EINT */
#define WM831X_IM_UV_LDO1_EINT 0x0001 /* IM_UV_LDO1_EINT */
#define WM831X_IM_UV_LDO1_EINT_MASK 0x0001 /* IM_UV_LDO1_EINT */
#define WM831X_IM_UV_LDO1_EINT_SHIFT 0 /* IM_UV_LDO1_EINT */
#define WM831X_IM_UV_LDO1_EINT_WIDTH 1 /* IM_UV_LDO1_EINT */
/*
* R16412 (0x401C) - Interrupt Status 4 Mask
*/
#define WM831X_IM_HC_DC2_EINT 0x0200 /* IM_HC_DC2_EINT */
#define WM831X_IM_HC_DC2_EINT_MASK 0x0200 /* IM_HC_DC2_EINT */
#define WM831X_IM_HC_DC2_EINT_SHIFT 9 /* IM_HC_DC2_EINT */
#define WM831X_IM_HC_DC2_EINT_WIDTH 1 /* IM_HC_DC2_EINT */
#define WM831X_IM_HC_DC1_EINT 0x0100 /* IM_HC_DC1_EINT */
#define WM831X_IM_HC_DC1_EINT_MASK 0x0100 /* IM_HC_DC1_EINT */
#define WM831X_IM_HC_DC1_EINT_SHIFT 8 /* IM_HC_DC1_EINT */
#define WM831X_IM_HC_DC1_EINT_WIDTH 1 /* IM_HC_DC1_EINT */
#define WM831X_IM_UV_DC4_EINT 0x0008 /* IM_UV_DC4_EINT */
#define WM831X_IM_UV_DC4_EINT_MASK 0x0008 /* IM_UV_DC4_EINT */
#define WM831X_IM_UV_DC4_EINT_SHIFT 3 /* IM_UV_DC4_EINT */
#define WM831X_IM_UV_DC4_EINT_WIDTH 1 /* IM_UV_DC4_EINT */
#define WM831X_IM_UV_DC3_EINT 0x0004 /* IM_UV_DC3_EINT */
#define WM831X_IM_UV_DC3_EINT_MASK 0x0004 /* IM_UV_DC3_EINT */
#define WM831X_IM_UV_DC3_EINT_SHIFT 2 /* IM_UV_DC3_EINT */
#define WM831X_IM_UV_DC3_EINT_WIDTH 1 /* IM_UV_DC3_EINT */
#define WM831X_IM_UV_DC2_EINT 0x0002 /* IM_UV_DC2_EINT */
#define WM831X_IM_UV_DC2_EINT_MASK 0x0002 /* IM_UV_DC2_EINT */
#define WM831X_IM_UV_DC2_EINT_SHIFT 1 /* IM_UV_DC2_EINT */
#define WM831X_IM_UV_DC2_EINT_WIDTH 1 /* IM_UV_DC2_EINT */
#define WM831X_IM_UV_DC1_EINT 0x0001 /* IM_UV_DC1_EINT */
#define WM831X_IM_UV_DC1_EINT_MASK 0x0001 /* IM_UV_DC1_EINT */
#define WM831X_IM_UV_DC1_EINT_SHIFT 0 /* IM_UV_DC1_EINT */
#define WM831X_IM_UV_DC1_EINT_WIDTH 1 /* IM_UV_DC1_EINT */
/*
* R16413 (0x401D) - Interrupt Status 5 Mask
*/
#define WM831X_IM_GP16_EINT 0x8000 /* IM_GP16_EINT */
#define WM831X_IM_GP16_EINT_MASK 0x8000 /* IM_GP16_EINT */
#define WM831X_IM_GP16_EINT_SHIFT 15 /* IM_GP16_EINT */
#define WM831X_IM_GP16_EINT_WIDTH 1 /* IM_GP16_EINT */
#define WM831X_IM_GP15_EINT 0x4000 /* IM_GP15_EINT */
#define WM831X_IM_GP15_EINT_MASK 0x4000 /* IM_GP15_EINT */
#define WM831X_IM_GP15_EINT_SHIFT 14 /* IM_GP15_EINT */
#define WM831X_IM_GP15_EINT_WIDTH 1 /* IM_GP15_EINT */
#define WM831X_IM_GP14_EINT 0x2000 /* IM_GP14_EINT */
#define WM831X_IM_GP14_EINT_MASK 0x2000 /* IM_GP14_EINT */
#define WM831X_IM_GP14_EINT_SHIFT 13 /* IM_GP14_EINT */
#define WM831X_IM_GP14_EINT_WIDTH 1 /* IM_GP14_EINT */
#define WM831X_IM_GP13_EINT 0x1000 /* IM_GP13_EINT */
#define WM831X_IM_GP13_EINT_MASK 0x1000 /* IM_GP13_EINT */
#define WM831X_IM_GP13_EINT_SHIFT 12 /* IM_GP13_EINT */
#define WM831X_IM_GP13_EINT_WIDTH 1 /* IM_GP13_EINT */
#define WM831X_IM_GP12_EINT 0x0800 /* IM_GP12_EINT */
#define WM831X_IM_GP12_EINT_MASK 0x0800 /* IM_GP12_EINT */
#define WM831X_IM_GP12_EINT_SHIFT 11 /* IM_GP12_EINT */
#define WM831X_IM_GP12_EINT_WIDTH 1 /* IM_GP12_EINT */
#define WM831X_IM_GP11_EINT 0x0400 /* IM_GP11_EINT */
#define WM831X_IM_GP11_EINT_MASK 0x0400 /* IM_GP11_EINT */
#define WM831X_IM_GP11_EINT_SHIFT 10 /* IM_GP11_EINT */
#define WM831X_IM_GP11_EINT_WIDTH 1 /* IM_GP11_EINT */
#define WM831X_IM_GP10_EINT 0x0200 /* IM_GP10_EINT */
#define WM831X_IM_GP10_EINT_MASK 0x0200 /* IM_GP10_EINT */
#define WM831X_IM_GP10_EINT_SHIFT 9 /* IM_GP10_EINT */
#define WM831X_IM_GP10_EINT_WIDTH 1 /* IM_GP10_EINT */
#define WM831X_IM_GP9_EINT 0x0100 /* IM_GP9_EINT */
#define WM831X_IM_GP9_EINT_MASK 0x0100 /* IM_GP9_EINT */
#define WM831X_IM_GP9_EINT_SHIFT 8 /* IM_GP9_EINT */
#define WM831X_IM_GP9_EINT_WIDTH 1 /* IM_GP9_EINT */
#define WM831X_IM_GP8_EINT 0x0080 /* IM_GP8_EINT */
#define WM831X_IM_GP8_EINT_MASK 0x0080 /* IM_GP8_EINT */
#define WM831X_IM_GP8_EINT_SHIFT 7 /* IM_GP8_EINT */
#define WM831X_IM_GP8_EINT_WIDTH 1 /* IM_GP8_EINT */
#define WM831X_IM_GP7_EINT 0x0040 /* IM_GP7_EINT */
#define WM831X_IM_GP7_EINT_MASK 0x0040 /* IM_GP7_EINT */
#define WM831X_IM_GP7_EINT_SHIFT 6 /* IM_GP7_EINT */
#define WM831X_IM_GP7_EINT_WIDTH 1 /* IM_GP7_EINT */
#define WM831X_IM_GP6_EINT 0x0020 /* IM_GP6_EINT */
#define WM831X_IM_GP6_EINT_MASK 0x0020 /* IM_GP6_EINT */
#define WM831X_IM_GP6_EINT_SHIFT 5 /* IM_GP6_EINT */
#define WM831X_IM_GP6_EINT_WIDTH 1 /* IM_GP6_EINT */
#define WM831X_IM_GP5_EINT 0x0010 /* IM_GP5_EINT */
#define WM831X_IM_GP5_EINT_MASK 0x0010 /* IM_GP5_EINT */
#define WM831X_IM_GP5_EINT_SHIFT 4 /* IM_GP5_EINT */
#define WM831X_IM_GP5_EINT_WIDTH 1 /* IM_GP5_EINT */
#define WM831X_IM_GP4_EINT 0x0008 /* IM_GP4_EINT */
#define WM831X_IM_GP4_EINT_MASK 0x0008 /* IM_GP4_EINT */
#define WM831X_IM_GP4_EINT_SHIFT 3 /* IM_GP4_EINT */
#define WM831X_IM_GP4_EINT_WIDTH 1 /* IM_GP4_EINT */
#define WM831X_IM_GP3_EINT 0x0004 /* IM_GP3_EINT */
#define WM831X_IM_GP3_EINT_MASK 0x0004 /* IM_GP3_EINT */
#define WM831X_IM_GP3_EINT_SHIFT 2 /* IM_GP3_EINT */
#define WM831X_IM_GP3_EINT_WIDTH 1 /* IM_GP3_EINT */
#define WM831X_IM_GP2_EINT 0x0002 /* IM_GP2_EINT */
#define WM831X_IM_GP2_EINT_MASK 0x0002 /* IM_GP2_EINT */
#define WM831X_IM_GP2_EINT_SHIFT 1 /* IM_GP2_EINT */
#define WM831X_IM_GP2_EINT_WIDTH 1 /* IM_GP2_EINT */
#define WM831X_IM_GP1_EINT 0x0001 /* IM_GP1_EINT */
#define WM831X_IM_GP1_EINT_MASK 0x0001 /* IM_GP1_EINT */
#define WM831X_IM_GP1_EINT_SHIFT 0 /* IM_GP1_EINT */
#define WM831X_IM_GP1_EINT_WIDTH 1 /* IM_GP1_EINT */
#endif

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/*
* include/linux/mfd/wm831x/otp.h -- OTP interface for WM831x
*
* Copyright 2009 Wolfson Microelectronics PLC.
*
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __MFD_WM831X_OTP_H__
#define __MFD_WM831X_OTP_H__
int wm831x_otp_init(struct wm831x *wm831x);
void wm831x_otp_exit(struct wm831x *wm831x);
/*
* R30720 (0x7800) - Unique ID 1
*/
#define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
/*
* R30721 (0x7801) - Unique ID 2
*/
#define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
/*
* R30722 (0x7802) - Unique ID 3
*/
#define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
/*
* R30723 (0x7803) - Unique ID 4
*/
#define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
/*
* R30724 (0x7804) - Unique ID 5
*/
#define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
/*
* R30725 (0x7805) - Unique ID 6
*/
#define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
/*
* R30726 (0x7806) - Unique ID 7
*/
#define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
/*
* R30727 (0x7807) - Unique ID 8
*/
#define WM831X_UNIQUE_ID_MASK 0xFFFF /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_SHIFT 0 /* UNIQUE_ID - [15:0] */
#define WM831X_UNIQUE_ID_WIDTH 16 /* UNIQUE_ID - [15:0] */
/*
* R30728 (0x7808) - Factory OTP ID
*/
#define WM831X_OTP_FACT_ID_MASK 0xFFFE /* OTP_FACT_ID - [15:1] */
#define WM831X_OTP_FACT_ID_SHIFT 1 /* OTP_FACT_ID - [15:1] */
#define WM831X_OTP_FACT_ID_WIDTH 15 /* OTP_FACT_ID - [15:1] */
#define WM831X_OTP_FACT_FINAL 0x0001 /* OTP_FACT_FINAL */
#define WM831X_OTP_FACT_FINAL_MASK 0x0001 /* OTP_FACT_FINAL */
#define WM831X_OTP_FACT_FINAL_SHIFT 0 /* OTP_FACT_FINAL */
#define WM831X_OTP_FACT_FINAL_WIDTH 1 /* OTP_FACT_FINAL */
/*
* R30729 (0x7809) - Factory OTP 1
*/
#define WM831X_DC3_TRIM_MASK 0xF000 /* DC3_TRIM - [15:12] */
#define WM831X_DC3_TRIM_SHIFT 12 /* DC3_TRIM - [15:12] */
#define WM831X_DC3_TRIM_WIDTH 4 /* DC3_TRIM - [15:12] */
#define WM831X_DC2_TRIM_MASK 0x0FC0 /* DC2_TRIM - [11:6] */
#define WM831X_DC2_TRIM_SHIFT 6 /* DC2_TRIM - [11:6] */
#define WM831X_DC2_TRIM_WIDTH 6 /* DC2_TRIM - [11:6] */
#define WM831X_DC1_TRIM_MASK 0x003F /* DC1_TRIM - [5:0] */
#define WM831X_DC1_TRIM_SHIFT 0 /* DC1_TRIM - [5:0] */
#define WM831X_DC1_TRIM_WIDTH 6 /* DC1_TRIM - [5:0] */
/*
* R30730 (0x780A) - Factory OTP 2
*/
#define WM831X_CHIP_ID_MASK 0xFFFF /* CHIP_ID - [15:0] */
#define WM831X_CHIP_ID_SHIFT 0 /* CHIP_ID - [15:0] */
#define WM831X_CHIP_ID_WIDTH 16 /* CHIP_ID - [15:0] */
/*
* R30731 (0x780B) - Factory OTP 3
*/
#define WM831X_OSC_TRIM_MASK 0x0780 /* OSC_TRIM - [10:7] */
#define WM831X_OSC_TRIM_SHIFT 7 /* OSC_TRIM - [10:7] */
#define WM831X_OSC_TRIM_WIDTH 4 /* OSC_TRIM - [10:7] */
#define WM831X_BG_TRIM_MASK 0x0078 /* BG_TRIM - [6:3] */
#define WM831X_BG_TRIM_SHIFT 3 /* BG_TRIM - [6:3] */
#define WM831X_BG_TRIM_WIDTH 4 /* BG_TRIM - [6:3] */
#define WM831X_LPBG_TRIM_MASK 0x0007 /* LPBG_TRIM - [2:0] */
#define WM831X_LPBG_TRIM_SHIFT 0 /* LPBG_TRIM - [2:0] */
#define WM831X_LPBG_TRIM_WIDTH 3 /* LPBG_TRIM - [2:0] */
/*
* R30732 (0x780C) - Factory OTP 4
*/
#define WM831X_CHILD_I2C_ADDR_MASK 0x00FE /* CHILD_I2C_ADDR - [7:1] */
#define WM831X_CHILD_I2C_ADDR_SHIFT 1 /* CHILD_I2C_ADDR - [7:1] */
#define WM831X_CHILD_I2C_ADDR_WIDTH 7 /* CHILD_I2C_ADDR - [7:1] */
#define WM831X_CH_AW 0x0001 /* CH_AW */
#define WM831X_CH_AW_MASK 0x0001 /* CH_AW */
#define WM831X_CH_AW_SHIFT 0 /* CH_AW */
#define WM831X_CH_AW_WIDTH 1 /* CH_AW */
/*
* R30733 (0x780D) - Factory OTP 5
*/
#define WM831X_CHARGE_TRIM_MASK 0x003F /* CHARGE_TRIM - [5:0] */
#define WM831X_CHARGE_TRIM_SHIFT 0 /* CHARGE_TRIM - [5:0] */
#define WM831X_CHARGE_TRIM_WIDTH 6 /* CHARGE_TRIM - [5:0] */
/*
* R30736 (0x7810) - Customer OTP ID
*/
#define WM831X_OTP_AUTO_PROG 0x8000 /* OTP_AUTO_PROG */
#define WM831X_OTP_AUTO_PROG_MASK 0x8000 /* OTP_AUTO_PROG */
#define WM831X_OTP_AUTO_PROG_SHIFT 15 /* OTP_AUTO_PROG */
#define WM831X_OTP_AUTO_PROG_WIDTH 1 /* OTP_AUTO_PROG */
#define WM831X_OTP_CUST_ID_MASK 0x7FFE /* OTP_CUST_ID - [14:1] */
#define WM831X_OTP_CUST_ID_SHIFT 1 /* OTP_CUST_ID - [14:1] */
#define WM831X_OTP_CUST_ID_WIDTH 14 /* OTP_CUST_ID - [14:1] */
#define WM831X_OTP_CUST_FINAL 0x0001 /* OTP_CUST_FINAL */
#define WM831X_OTP_CUST_FINAL_MASK 0x0001 /* OTP_CUST_FINAL */
#define WM831X_OTP_CUST_FINAL_SHIFT 0 /* OTP_CUST_FINAL */
#define WM831X_OTP_CUST_FINAL_WIDTH 1 /* OTP_CUST_FINAL */
/*
* R30759 (0x7827) - DBE CHECK DATA
*/
#define WM831X_DBE_VALID_DATA_MASK 0xFFFF /* DBE_VALID_DATA - [15:0] */
#define WM831X_DBE_VALID_DATA_SHIFT 0 /* DBE_VALID_DATA - [15:0] */
#define WM831X_DBE_VALID_DATA_WIDTH 16 /* DBE_VALID_DATA - [15:0] */
#endif

113
include/linux/mfd/wm831x/pdata.h Normal file
View file

@ -0,0 +1,113 @@
/*
* include/linux/mfd/wm831x/pdata.h -- Platform data for WM831x
*
* Copyright 2009 Wolfson Microelectronics PLC.
*
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __MFD_WM831X_PDATA_H__
#define __MFD_WM831X_PDATA_H__
struct wm831x;
struct regulator_init_data;
struct wm831x_backlight_pdata {
int isink; /** ISINK to use, 1 or 2 */
int max_uA; /** Maximum current to allow */
};
struct wm831x_backup_pdata {
int charger_enable;
int no_constant_voltage; /** Disable constant voltage charging */
int vlim; /** Voltage limit in milivolts */
int ilim; /** Current limit in microamps */
};
struct wm831x_battery_pdata {
int enable; /** Enable charging */
int fast_enable; /** Enable fast charging */
int off_mask; /** Mask OFF while charging */
int trickle_ilim; /** Trickle charge current limit, in mA */
int vsel; /** Target voltage, in mV */
int eoc_iterm; /** End of trickle charge current, in mA */
int fast_ilim; /** Fast charge current limit, in mA */
int timeout; /** Charge cycle timeout, in minutes */
};
/* Sources for status LED configuration. Values are register values
* plus 1 to allow for a zero default for preserve.
*/
enum wm831x_status_src {
WM831X_STATUS_PRESERVE = 0, /* Keep the current hardware setting */
WM831X_STATUS_OTP = 1,
WM831X_STATUS_POWER = 2,
WM831X_STATUS_CHARGER = 3,
WM831X_STATUS_MANUAL = 4,
};
struct wm831x_status_pdata {
enum wm831x_status_src default_src;
const char *name;
const char *default_trigger;
};
struct wm831x_touch_pdata {
int fivewire; /** 1 for five wire mode, 0 for 4 wire */
int isel; /** Current for pen down (uA) */
int rpu; /** Pen down sensitivity resistor divider */
int pressure; /** Report pressure (boolean) */
int data_irq; /** Touch data ready IRQ */
};
enum wm831x_watchdog_action {
WM831X_WDOG_NONE = 0,
WM831X_WDOG_INTERRUPT = 1,
WM831X_WDOG_RESET = 2,
WM831X_WDOG_WAKE = 3,
};
struct wm831x_watchdog_pdata {
enum wm831x_watchdog_action primary, secondary;
int update_gpio;
unsigned int software:1;
};
#define WM831X_MAX_STATUS 2
#define WM831X_MAX_DCDC 4
#define WM831X_MAX_EPE 2
#define WM831X_MAX_LDO 11
#define WM831X_MAX_ISINK 2
struct wm831x_pdata {
/** Called before subdevices are set up */
int (*pre_init)(struct wm831x *wm831x);
/** Called after subdevices are set up */
int (*post_init)(struct wm831x *wm831x);
int gpio_base;
struct wm831x_backlight_pdata *backlight;
struct wm831x_backup_pdata *backup;
struct wm831x_battery_pdata *battery;
struct wm831x_touch_pdata *touch;
struct wm831x_watchdog_pdata *watchdog;
/** LED1 = 0 and so on */
struct wm831x_status_pdata *status[WM831X_MAX_STATUS];
/** DCDC1 = 0 and so on */
struct regulator_init_data *dcdc[WM831X_MAX_DCDC];
/** EPE1 = 0 and so on */
struct regulator_init_data *epe[WM831X_MAX_EPE];
/** LDO1 = 0 and so on */
struct regulator_init_data *ldo[WM831X_MAX_LDO];
/** ISINK1 = 0 and so on*/
struct regulator_init_data *isink[WM831X_MAX_ISINK];
};
#endif

1218
include/linux/mfd/wm831x/regulator.h Normal file
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File diff suppressed because it is too large Load diff

52
include/linux/mfd/wm831x/watchdog.h Normal file
View file

@ -0,0 +1,52 @@
/*
* include/linux/mfd/wm831x/watchdog.h -- Watchdog for WM831x
*
* Copyright 2009 Wolfson Microelectronics PLC.
*
* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
*/
#ifndef __MFD_WM831X_WATCHDOG_H__
#define __MFD_WM831X_WATCHDOG_H__
/*
* R16388 (0x4004) - Watchdog
*/
#define WM831X_WDOG_ENA 0x8000 /* WDOG_ENA */
#define WM831X_WDOG_ENA_MASK 0x8000 /* WDOG_ENA */
#define WM831X_WDOG_ENA_SHIFT 15 /* WDOG_ENA */
#define WM831X_WDOG_ENA_WIDTH 1 /* WDOG_ENA */
#define WM831X_WDOG_DEBUG 0x4000 /* WDOG_DEBUG */
#define WM831X_WDOG_DEBUG_MASK 0x4000 /* WDOG_DEBUG */
#define WM831X_WDOG_DEBUG_SHIFT 14 /* WDOG_DEBUG */
#define WM831X_WDOG_DEBUG_WIDTH 1 /* WDOG_DEBUG */
#define WM831X_WDOG_RST_SRC 0x2000 /* WDOG_RST_SRC */
#define WM831X_WDOG_RST_SRC_MASK 0x2000 /* WDOG_RST_SRC */
#define WM831X_WDOG_RST_SRC_SHIFT 13 /* WDOG_RST_SRC */
#define WM831X_WDOG_RST_SRC_WIDTH 1 /* WDOG_RST_SRC */
#define WM831X_WDOG_SLPENA 0x1000 /* WDOG_SLPENA */
#define WM831X_WDOG_SLPENA_MASK 0x1000 /* WDOG_SLPENA */
#define WM831X_WDOG_SLPENA_SHIFT 12 /* WDOG_SLPENA */
#define WM831X_WDOG_SLPENA_WIDTH 1 /* WDOG_SLPENA */
#define WM831X_WDOG_RESET 0x0800 /* WDOG_RESET */
#define WM831X_WDOG_RESET_MASK 0x0800 /* WDOG_RESET */
#define WM831X_WDOG_RESET_SHIFT 11 /* WDOG_RESET */
#define WM831X_WDOG_RESET_WIDTH 1 /* WDOG_RESET */
#define WM831X_WDOG_SECACT_MASK 0x0300 /* WDOG_SECACT - [9:8] */
#define WM831X_WDOG_SECACT_SHIFT 8 /* WDOG_SECACT - [9:8] */
#define WM831X_WDOG_SECACT_WIDTH 2 /* WDOG_SECACT - [9:8] */
#define WM831X_WDOG_PRIMACT_MASK 0x0030 /* WDOG_PRIMACT - [5:4] */
#define WM831X_WDOG_PRIMACT_SHIFT 4 /* WDOG_PRIMACT - [5:4] */
#define WM831X_WDOG_PRIMACT_WIDTH 2 /* WDOG_PRIMACT - [5:4] */
#define WM831X_WDOG_TO_MASK 0x0007 /* WDOG_TO - [2:0] */
#define WM831X_WDOG_TO_SHIFT 0 /* WDOG_TO - [2:0] */
#define WM831X_WDOG_TO_WIDTH 3 /* WDOG_TO - [2:0] */
#endif

7
include/linux/mfd/wm8350/core.h
View file

@ -605,6 +605,11 @@ struct wm8350_irq {
void *data;
};
struct wm8350_hwmon {
struct platform_device *pdev;
struct device *classdev;
};
struct wm8350 {
struct device *dev;
@ -621,7 +626,6 @@ struct wm8350 {
struct mutex auxadc_mutex;
/* Interrupt handling */
struct work_struct irq_work;
struct mutex irq_mutex; /* IRQ table mutex */
struct wm8350_irq irq[WM8350_NUM_IRQ];
int chip_irq;
@ -629,6 +633,7 @@ struct wm8350 {
/* Client devices */
struct wm8350_codec codec;
struct wm8350_gpio gpio;
struct wm8350_hwmon hwmon;
struct wm8350_pmic pmic;
struct wm8350_power power;
struct wm8350_rtc rtc;

6
include/linux/mmc/sdio_ids.h
View file

@ -22,6 +22,12 @@
/*
* Vendors and devices. Sort key: vendor first, device next.
*/
#define SDIO_VENDOR_ID_INTEL 0x0089
#define SDIO_DEVICE_ID_INTEL_IWMC3200WIMAX 0x1402
#define SDIO_DEVICE_ID_INTEL_IWMC3200WIFI 0x1403
#define SDIO_DEVICE_ID_INTEL_IWMC3200TOP 0x1404
#define SDIO_DEVICE_ID_INTEL_IWMC3200GPS 0x1405
#define SDIO_DEVICE_ID_INTEL_IWMC3200BT 0x1406
#define SDIO_VENDOR_ID_MARVELL 0x02df
#define SDIO_DEVICE_ID_MARVELL_LIBERTAS 0x9103

14
include/linux/module.h
View file

@ -17,10 +17,12 @@
#include <linux/moduleparam.h>
#include <linux/marker.h>
#include <linux/tracepoint.h>
#include <asm/local.h>
#include <asm/local.h>
#include <asm/module.h>
#include <trace/events/module.h>
/* Not Yet Implemented */
#define MODULE_SUPPORTED_DEVICE(name)
@ -462,7 +464,10 @@ static inline local_t *__module_ref_addr(struct module *mod, int cpu)
static inline void __module_get(struct module *module)
{
if (module) {
local_inc(__module_ref_addr(module, get_cpu()));
unsigned int cpu = get_cpu();
local_inc(__module_ref_addr(module, cpu));
trace_module_get(module, _THIS_IP_,
local_read(__module_ref_addr(module, cpu)));
put_cpu();
}
}
@ -473,8 +478,11 @@ static inline int try_module_get(struct module *module)
if (module) {
unsigned int cpu = get_cpu();
if (likely(module_is_live(module)))
if (likely(module_is_live(module))) {
local_inc(__module_ref_addr(module, cpu));
trace_module_get(module, _THIS_IP_,
local_read(__module_ref_addr(module, cpu)));
}
else
ret = 0;
put_cpu();

2
include/linux/mtd/partitions.h
View file

@ -1,7 +1,7 @@
/*
* MTD partitioning layer definitions
*
* (C) 2000 Nicolas Pitre <nico@cam.org>
* (C) 2000 Nicolas Pitre <nico@fluxnic.net>
*
* This code is GPL
*/

5
include/linux/net.h
View file

@ -57,6 +57,7 @@ typedef enum {
#include <linux/random.h>
#include <linux/wait.h>
#include <linux/fcntl.h> /* For O_CLOEXEC and O_NONBLOCK */
#include <linux/kmemcheck.h>
struct poll_table_struct;
struct pipe_inode_info;
@ -127,7 +128,11 @@ enum sock_shutdown_cmd {
*/
struct socket {
socket_state state;
kmemcheck_bitfield_begin(type);
short type;
kmemcheck_bitfield_end(type);
unsigned long flags;
/*
* Please keep fasync_list & wait fields in the same cache line

1
include/linux/net_dropmon.h
View file

@ -3,7 +3,6 @@
#include <linux/types.h>
#include <linux/netlink.h>
#include <linux/types.h>
struct net_dm_drop_point {
__u8 pc[8];

56
include/linux/netdevice.h
View file

@ -72,10 +72,6 @@ struct wireless_dev;
/* Backlog congestion levels */
#define NET_RX_SUCCESS 0 /* keep 'em coming, baby */
#define NET_RX_DROP 1 /* packet dropped */
#define NET_RX_CN_LOW 2 /* storm alert, just in case */
#define NET_RX_CN_MOD 3 /* Storm on its way! */
#define NET_RX_CN_HIGH 4 /* The storm is here */
#define NET_RX_BAD 5 /* packet dropped due to kernel error */
/* NET_XMIT_CN is special. It does not guarantee that this packet is lost. It
* indicates that the device will soon be dropping packets, or already drops
@ -83,17 +79,19 @@ struct wireless_dev;
#define net_xmit_eval(e) ((e) == NET_XMIT_CN? 0 : (e))
#define net_xmit_errno(e) ((e) != NET_XMIT_CN ? -ENOBUFS : 0)
/* Driver transmit return codes */
enum netdev_tx {
NETDEV_TX_OK = 0, /* driver took care of packet */
NETDEV_TX_BUSY, /* driver tx path was busy*/
NETDEV_TX_LOCKED = -1, /* driver tx lock was already taken */
};
typedef enum netdev_tx netdev_tx_t;
#endif
#define MAX_ADDR_LEN 32 /* Largest hardware address length */
/* Driver transmit return codes */
#define NETDEV_TX_OK 0 /* driver took care of packet */
#define NETDEV_TX_BUSY 1 /* driver tx path was busy*/
#define NETDEV_TX_LOCKED -1 /* driver tx lock was already taken */
#ifdef __KERNEL__
/*
* Compute the worst case header length according to the protocols
* used.
@ -511,9 +509,11 @@ struct netdev_queue {
* This function is called when network device transistions to the down
* state.
*
* int (*ndo_start_xmit)(struct sk_buff *skb, struct net_device *dev);
* netdev_tx_t (*ndo_start_xmit)(struct sk_buff *skb,
* struct net_device *dev);
* Called when a packet needs to be transmitted.
* Must return NETDEV_TX_OK , NETDEV_TX_BUSY, or NETDEV_TX_LOCKED,
* Must return NETDEV_TX_OK , NETDEV_TX_BUSY.
* (can also return NETDEV_TX_LOCKED iff NETIF_F_LLTX)
* Required can not be NULL.
*
* u16 (*ndo_select_queue)(struct net_device *dev, struct sk_buff *skb);
@ -584,7 +584,7 @@ struct net_device_ops {
void (*ndo_uninit)(struct net_device *dev);
int (*ndo_open)(struct net_device *dev);
int (*ndo_stop)(struct net_device *dev);
int (*ndo_start_xmit) (struct sk_buff *skb,
netdev_tx_t (*ndo_start_xmit) (struct sk_buff *skb,
struct net_device *dev);
u16 (*ndo_select_queue)(struct net_device *dev,
struct sk_buff *skb);
@ -627,6 +627,8 @@ struct net_device_ops {
void (*ndo_poll_controller)(struct net_device *dev);
#endif
#if defined(CONFIG_FCOE) || defined(CONFIG_FCOE_MODULE)
int (*ndo_fcoe_enable)(struct net_device *dev);
int (*ndo_fcoe_disable)(struct net_device *dev);
int (*ndo_fcoe_ddp_setup)(struct net_device *dev,
u16 xid,
struct scatterlist *sgl,
@ -705,6 +707,7 @@ struct net_device
/* the GSO_MASK reserves bits 16 through 23 */
#define NETIF_F_FCOE_CRC (1 << 24) /* FCoE CRC32 */
#define NETIF_F_SCTP_CSUM (1 << 25) /* SCTP checksum offload */
#define NETIF_F_FCOE_MTU (1 << 26) /* Supports max FCoE MTU, 2158 bytes*/
/* Segmentation offload features */
#define NETIF_F_GSO_SHIFT 16
@ -829,6 +832,9 @@ struct net_device
/* Number of TX queues currently active in device */
unsigned int real_num_tx_queues;
/* root qdisc from userspace point of view */
struct Qdisc *qdisc;
unsigned long tx_queue_len; /* Max frames per queue allowed */
spinlock_t tx_global_lock;
/*
@ -889,7 +895,7 @@ struct net_device
/* class/net/name entry */
struct device dev;
/* space for optional statistics and wireless sysfs groups */
struct attribute_group *sysfs_groups[3];
const struct attribute_group *sysfs_groups[3];
/* rtnetlink link ops */
const struct rtnl_link_ops *rtnl_link_ops;
@ -992,6 +998,12 @@ static inline void *netdev_priv(const struct net_device *dev)
*/
#define SET_NETDEV_DEV(net, pdev) ((net)->dev.parent = (pdev))
/* Set the sysfs device type for the network logical device to allow
* fin grained indentification of different network device types. For
* example Ethernet, Wirelss LAN, Bluetooth, WiMAX etc.
*/
#define SET_NETDEV_DEVTYPE(net, devtype) ((net)->dev.type = (devtype))
/**
* netif_napi_add - initialize a napi context
* @dev: network device
@ -1260,7 +1272,7 @@ static inline void netif_tx_wake_queue(struct netdev_queue *dev_queue)
{
#ifdef CONFIG_NETPOLL_TRAP
if (netpoll_trap()) {
clear_bit(__QUEUE_STATE_XOFF, &dev_queue->state);
netif_tx_start_queue(dev_queue);
return;
}
#endif
@ -1366,7 +1378,8 @@ static inline int netif_running(const struct net_device *dev)
static inline void netif_start_subqueue(struct net_device *dev, u16 queue_index)
{
struct netdev_queue *txq = netdev_get_tx_queue(dev, queue_index);
clear_bit(__QUEUE_STATE_XOFF, &txq->state);
netif_tx_start_queue(txq);
}
/**
@ -1383,7 +1396,7 @@ static inline void netif_stop_subqueue(struct net_device *dev, u16 queue_index)
if (netpoll_trap())
return;
#endif
set_bit(__QUEUE_STATE_XOFF, &txq->state);
netif_tx_stop_queue(txq);
}
/**
@ -1397,7 +1410,8 @@ static inline int __netif_subqueue_stopped(const struct net_device *dev,
u16 queue_index)
{
struct netdev_queue *txq = netdev_get_tx_queue(dev, queue_index);
return test_bit(__QUEUE_STATE_XOFF, &txq->state);
return netif_tx_queue_stopped(txq);
}
static inline int netif_subqueue_stopped(const struct net_device *dev,
@ -1749,8 +1763,7 @@ static inline void netif_tx_unlock(struct net_device *dev)
* force a schedule.
*/
clear_bit(__QUEUE_STATE_FROZEN, &txq->state);
if (!test_bit(__QUEUE_STATE_XOFF, &txq->state))
__netif_schedule(txq->qdisc);
netif_schedule_queue(txq);
}
spin_unlock(&dev->tx_global_lock);
}
@ -1860,7 +1873,8 @@ extern void __dev_addr_unsync(struct dev_addr_list **to, int *to_count, struct
extern int dev_set_promiscuity(struct net_device *dev, int inc);
extern int dev_set_allmulti(struct net_device *dev, int inc);
extern void netdev_state_change(struct net_device *dev);
extern void netdev_bonding_change(struct net_device *dev);
extern void netdev_bonding_change(struct net_device *dev,
unsigned long event);
extern void netdev_features_change(struct net_device *dev);
/* Load a device via the kmod */
extern void dev_load(struct net *net, const char *name);

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