mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-18 18:52:18 -04:00
Merge commit 'v2.6.35-rc3' into perf/core
Merge reason: Go from -rc1 base to -rc3 base, merge in fixes.
This commit is contained in:
commit
646b1db495
1019 changed files with 83287 additions and 7720 deletions
|
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@ -106,7 +106,7 @@ int bdi_register_dev(struct backing_dev_info *bdi, dev_t dev);
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void bdi_unregister(struct backing_dev_info *bdi);
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int bdi_setup_and_register(struct backing_dev_info *, char *, unsigned int);
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||||
void bdi_start_writeback(struct backing_dev_info *bdi, struct super_block *sb,
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||||
long nr_pages, int sb_locked);
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||||
long nr_pages);
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||||
int bdi_writeback_task(struct bdi_writeback *wb);
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||||
int bdi_has_dirty_io(struct backing_dev_info *bdi);
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void bdi_arm_supers_timer(void);
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@ -1211,14 +1211,23 @@ struct work_struct;
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int kblockd_schedule_work(struct request_queue *q, struct work_struct *work);
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#ifdef CONFIG_BLK_CGROUP
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/*
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* This should not be using sched_clock(). A real patch is in progress
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* to fix this up, until that is in place we need to disable preemption
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* around sched_clock() in this function and set_io_start_time_ns().
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*/
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static inline void set_start_time_ns(struct request *req)
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{
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preempt_disable();
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req->start_time_ns = sched_clock();
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preempt_enable();
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}
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static inline void set_io_start_time_ns(struct request *req)
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{
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preempt_disable();
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req->io_start_time_ns = sched_clock();
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preempt_enable();
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}
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static inline uint64_t rq_start_time_ns(struct request *req)
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@ -31,7 +31,7 @@
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#ifndef __cacheline_aligned
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#define __cacheline_aligned \
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__attribute__((__aligned__(SMP_CACHE_BYTES), \
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__section__(".data.cacheline_aligned")))
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__section__(".data..cacheline_aligned")))
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#endif /* __cacheline_aligned */
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#ifndef __cacheline_aligned_in_smp
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@ -53,7 +53,7 @@
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extern const char *drbd_buildtag(void);
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#define REL_VERSION "8.3.8rc1"
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#define REL_VERSION "8.3.8rc2"
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#define API_VERSION 88
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#define PRO_VERSION_MIN 86
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#define PRO_VERSION_MAX 94
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31
include/linux/edac_mce.h
Normal file
31
include/linux/edac_mce.h
Normal file
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@ -0,0 +1,31 @@
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/* Provides edac interface to mcelog events
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*
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||||
* This file may be distributed under the terms of the
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* GNU General Public License version 2.
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*
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* Copyright (c) 2009 by:
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* Mauro Carvalho Chehab <mchehab@redhat.com>
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*
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* Red Hat Inc. http://www.redhat.com
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*/
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#if defined(CONFIG_EDAC_MCE) || \
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(defined(CONFIG_EDAC_MCE_MODULE) && defined(MODULE))
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#include <asm/mce.h>
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#include <linux/list.h>
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struct edac_mce {
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struct list_head list;
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void *priv;
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int (*check_error)(void *priv, struct mce *mce);
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};
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int edac_mce_register(struct edac_mce *edac_mce);
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void edac_mce_unregister(struct edac_mce *edac_mce);
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int edac_mce_parse(struct mce *mce);
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#else
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#define edac_mce_parse(mce) (0)
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#endif
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@ -2388,7 +2388,7 @@ extern const struct file_operations simple_dir_operations;
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extern const struct inode_operations simple_dir_inode_operations;
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struct tree_descr { char *name; const struct file_operations *ops; int mode; };
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struct dentry *d_alloc_name(struct dentry *, const char *);
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extern int simple_fill_super(struct super_block *, int, struct tree_descr *);
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extern int simple_fill_super(struct super_block *, unsigned long, struct tree_descr *);
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extern int simple_pin_fs(struct file_system_type *, struct vfsmount **mount, int *count);
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extern void simple_release_fs(struct vfsmount **mount, int *count);
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@ -301,7 +301,7 @@ void __init parse_early_options(char *cmdline);
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#endif
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||||
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||||
/* Data marked not to be saved by software suspend */
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||||
#define __nosavedata __section(.data.nosave)
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||||
#define __nosavedata __section(.data..nosave)
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||||
|
||||
/* This means "can be init if no module support, otherwise module load
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||||
may call it." */
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@ -183,7 +183,7 @@ extern struct cred init_cred;
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}
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||||
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||||
/* Attach to the init_task data structure for proper alignment */
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#define __init_task_data __attribute__((__section__(".data.init_task")))
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#define __init_task_data __attribute__((__section__(".data..init_task")))
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||||
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||||
#endif
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@ -7,7 +7,6 @@
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|||
struct cfq_queue;
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||||
struct cfq_io_context {
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||||
void *key;
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||||
unsigned long dead_key;
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||||
|
||||
struct cfq_queue *cfqq[2];
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||||
|
||||
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@ -1023,6 +1023,7 @@ extern void ata_scsi_simulate(struct ata_device *dev, struct scsi_cmnd *cmd,
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extern int ata_std_bios_param(struct scsi_device *sdev,
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||||
struct block_device *bdev,
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||||
sector_t capacity, int geom[]);
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||||
extern void ata_scsi_unlock_native_capacity(struct scsi_device *sdev);
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||||
extern int ata_scsi_slave_config(struct scsi_device *sdev);
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||||
extern void ata_scsi_slave_destroy(struct scsi_device *sdev);
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||||
extern int ata_scsi_change_queue_depth(struct scsi_device *sdev,
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@ -1174,6 +1175,7 @@ extern struct device_attribute *ata_common_sdev_attrs[];
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.slave_configure = ata_scsi_slave_config, \
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.slave_destroy = ata_scsi_slave_destroy, \
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||||
.bios_param = ata_std_bios_param, \
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||||
.unlock_native_capacity = ata_scsi_unlock_native_capacity, \
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||||
.sdev_attrs = ata_common_sdev_attrs
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||||
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||||
#define ATA_NCQ_SHT(drv_name) \
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||||
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@ -18,8 +18,8 @@
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|||
# define asmregparm
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||||
#endif
|
||||
|
||||
#define __page_aligned_data __section(.data.page_aligned) __aligned(PAGE_SIZE)
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||||
#define __page_aligned_bss __section(.bss.page_aligned) __aligned(PAGE_SIZE)
|
||||
#define __page_aligned_data __section(.data..page_aligned) __aligned(PAGE_SIZE)
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||||
#define __page_aligned_bss __section(.bss..page_aligned) __aligned(PAGE_SIZE)
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||||
|
||||
/*
|
||||
* For assembly routines.
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||||
|
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@ -27,8 +27,8 @@
|
|||
* Note when using these that you must specify the appropriate
|
||||
* alignment directives yourself
|
||||
*/
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||||
#define __PAGE_ALIGNED_DATA .section ".data.page_aligned", "aw"
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||||
#define __PAGE_ALIGNED_BSS .section ".bss.page_aligned", "aw"
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||||
#define __PAGE_ALIGNED_DATA .section ".data..page_aligned", "aw"
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||||
#define __PAGE_ALIGNED_BSS .section ".bss..page_aligned", "aw"
|
||||
|
||||
/*
|
||||
* This is used by architectures to keep arguments on the stack
|
||||
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|
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@ -3,6 +3,12 @@
|
|||
#include <linux/module.h>
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||||
#include <linux/major.h>
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||||
|
||||
/*
|
||||
* These allocations are managed by device@lanana.org. If you use an
|
||||
* entry that is not in assigned your entry may well be moved and
|
||||
* reassigned, or set dynamic if a fixed value is not justified.
|
||||
*/
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||||
|
||||
#define PSMOUSE_MINOR 1
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||||
#define MS_BUSMOUSE_MINOR 2
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||||
#define ATIXL_BUSMOUSE_MINOR 3
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||||
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@ -30,7 +36,6 @@
|
|||
#define HPET_MINOR 228
|
||||
#define FUSE_MINOR 229
|
||||
#define KVM_MINOR 232
|
||||
#define VHOST_NET_MINOR 233
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||||
#define BTRFS_MINOR 234
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||||
#define AUTOFS_MINOR 235
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||||
#define MISC_DYNAMIC_MINOR 255
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||||
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@ -14,6 +14,9 @@
|
|||
#ifndef __SH_MMCIF_H__
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||||
#define __SH_MMCIF_H__
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||||
|
||||
#include <linux/platform_device.h>
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||||
#include <linux/io.h>
|
||||
|
||||
/*
|
||||
* MMCIF : CE_CLK_CTRL [19:16]
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||||
* 1000 : Peripheral clock / 512
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||||
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@ -36,4 +39,162 @@ struct sh_mmcif_plat_data {
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|||
u32 ocr;
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||||
};
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||||
|
||||
#define MMCIF_CE_CMD_SET 0x00000000
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||||
#define MMCIF_CE_ARG 0x00000008
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||||
#define MMCIF_CE_ARG_CMD12 0x0000000C
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||||
#define MMCIF_CE_CMD_CTRL 0x00000010
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||||
#define MMCIF_CE_BLOCK_SET 0x00000014
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||||
#define MMCIF_CE_CLK_CTRL 0x00000018
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||||
#define MMCIF_CE_BUF_ACC 0x0000001C
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||||
#define MMCIF_CE_RESP3 0x00000020
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||||
#define MMCIF_CE_RESP2 0x00000024
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||||
#define MMCIF_CE_RESP1 0x00000028
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||||
#define MMCIF_CE_RESP0 0x0000002C
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||||
#define MMCIF_CE_RESP_CMD12 0x00000030
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#define MMCIF_CE_DATA 0x00000034
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||||
#define MMCIF_CE_INT 0x00000040
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||||
#define MMCIF_CE_INT_MASK 0x00000044
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||||
#define MMCIF_CE_HOST_STS1 0x00000048
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||||
#define MMCIF_CE_HOST_STS2 0x0000004C
|
||||
#define MMCIF_CE_VERSION 0x0000007C
|
||||
|
||||
extern inline u32 sh_mmcif_readl(void __iomem *addr, int reg)
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||||
{
|
||||
return readl(addr + reg);
|
||||
}
|
||||
|
||||
extern inline void sh_mmcif_writel(void __iomem *addr, int reg, u32 val)
|
||||
{
|
||||
writel(val, addr + reg);
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||||
}
|
||||
|
||||
#define SH_MMCIF_BBS 512 /* boot block size */
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||||
|
||||
extern inline void sh_mmcif_boot_cmd_send(void __iomem *base,
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unsigned long cmd, unsigned long arg)
|
||||
{
|
||||
sh_mmcif_writel(base, MMCIF_CE_INT, 0);
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||||
sh_mmcif_writel(base, MMCIF_CE_ARG, arg);
|
||||
sh_mmcif_writel(base, MMCIF_CE_CMD_SET, cmd);
|
||||
}
|
||||
|
||||
extern inline int sh_mmcif_boot_cmd_poll(void __iomem *base, unsigned long mask)
|
||||
{
|
||||
unsigned long tmp;
|
||||
int cnt;
|
||||
|
||||
for (cnt = 0; cnt < 1000000; cnt++) {
|
||||
tmp = sh_mmcif_readl(base, MMCIF_CE_INT);
|
||||
if (tmp & mask) {
|
||||
sh_mmcif_writel(base, MMCIF_CE_INT, tmp & ~mask);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
extern inline int sh_mmcif_boot_cmd(void __iomem *base,
|
||||
unsigned long cmd, unsigned long arg)
|
||||
{
|
||||
sh_mmcif_boot_cmd_send(base, cmd, arg);
|
||||
return sh_mmcif_boot_cmd_poll(base, 0x00010000);
|
||||
}
|
||||
|
||||
extern inline int sh_mmcif_boot_do_read_single(void __iomem *base,
|
||||
unsigned int block_nr,
|
||||
unsigned long *buf)
|
||||
{
|
||||
int k;
|
||||
|
||||
/* CMD13 - Status */
|
||||
sh_mmcif_boot_cmd(base, 0x0d400000, 0x00010000);
|
||||
|
||||
if (sh_mmcif_readl(base, MMCIF_CE_RESP0) != 0x0900)
|
||||
return -1;
|
||||
|
||||
/* CMD17 - Read */
|
||||
sh_mmcif_boot_cmd(base, 0x11480000, block_nr * SH_MMCIF_BBS);
|
||||
if (sh_mmcif_boot_cmd_poll(base, 0x00100000) < 0)
|
||||
return -1;
|
||||
|
||||
for (k = 0; k < (SH_MMCIF_BBS / 4); k++)
|
||||
buf[k] = sh_mmcif_readl(base, MMCIF_CE_DATA);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
extern inline int sh_mmcif_boot_do_read(void __iomem *base,
|
||||
unsigned long first_block,
|
||||
unsigned long nr_blocks,
|
||||
void *buf)
|
||||
{
|
||||
unsigned long k;
|
||||
int ret = 0;
|
||||
|
||||
/* CMD16 - Set the block size */
|
||||
sh_mmcif_boot_cmd(base, 0x10400000, SH_MMCIF_BBS);
|
||||
|
||||
for (k = 0; !ret && k < nr_blocks; k++)
|
||||
ret = sh_mmcif_boot_do_read_single(base, first_block + k,
|
||||
buf + (k * SH_MMCIF_BBS));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
extern inline void sh_mmcif_boot_init(void __iomem *base)
|
||||
{
|
||||
unsigned long tmp;
|
||||
|
||||
/* reset */
|
||||
tmp = sh_mmcif_readl(base, MMCIF_CE_VERSION);
|
||||
sh_mmcif_writel(base, MMCIF_CE_VERSION, tmp | 0x80000000);
|
||||
sh_mmcif_writel(base, MMCIF_CE_VERSION, tmp & ~0x80000000);
|
||||
|
||||
/* byte swap */
|
||||
sh_mmcif_writel(base, MMCIF_CE_BUF_ACC, 0x00010000);
|
||||
|
||||
/* Set block size in MMCIF hardware */
|
||||
sh_mmcif_writel(base, MMCIF_CE_BLOCK_SET, SH_MMCIF_BBS);
|
||||
|
||||
/* Enable the clock, set it to Bus clock/256 (about 325Khz)*/
|
||||
sh_mmcif_writel(base, MMCIF_CE_CLK_CTRL, 0x01072fff);
|
||||
|
||||
/* CMD0 */
|
||||
sh_mmcif_boot_cmd(base, 0x00000040, 0);
|
||||
|
||||
/* CMD1 - Get OCR */
|
||||
do {
|
||||
sh_mmcif_boot_cmd(base, 0x01405040, 0x40300000); /* CMD1 */
|
||||
} while ((sh_mmcif_readl(base, MMCIF_CE_RESP0) & 0x80000000)
|
||||
!= 0x80000000);
|
||||
|
||||
/* CMD2 - Get CID */
|
||||
sh_mmcif_boot_cmd(base, 0x02806040, 0);
|
||||
|
||||
/* CMD3 - Set card relative address */
|
||||
sh_mmcif_boot_cmd(base, 0x03400040, 0x00010000);
|
||||
}
|
||||
|
||||
extern inline void sh_mmcif_boot_slurp(void __iomem *base,
|
||||
unsigned char *buf,
|
||||
unsigned long no_bytes)
|
||||
{
|
||||
unsigned long tmp;
|
||||
|
||||
/* In data transfer mode: Set clock to Bus clock/4 (about 20Mhz) */
|
||||
sh_mmcif_writel(base, MMCIF_CE_CLK_CTRL, 0x01012fff);
|
||||
|
||||
/* CMD9 - Get CSD */
|
||||
sh_mmcif_boot_cmd(base, 0x09806000, 0x00010000);
|
||||
|
||||
/* CMD7 - Select the card */
|
||||
sh_mmcif_boot_cmd(base, 0x07400000, 0x00010000);
|
||||
|
||||
tmp = no_bytes / SH_MMCIF_BBS;
|
||||
tmp += (no_bytes % SH_MMCIF_BBS) ? 1 : 0;
|
||||
|
||||
sh_mmcif_boot_do_read(base, 512, tmp, buf);
|
||||
}
|
||||
|
||||
#endif /* __SH_MMCIF_H__ */
|
||||
|
|
|
|||
|
|
@ -181,6 +181,13 @@ void *__symbol_get(const char *symbol);
|
|||
void *__symbol_get_gpl(const char *symbol);
|
||||
#define symbol_get(x) ((typeof(&x))(__symbol_get(MODULE_SYMBOL_PREFIX #x)))
|
||||
|
||||
/* modules using other modules: kdb wants to see this. */
|
||||
struct module_use {
|
||||
struct list_head source_list;
|
||||
struct list_head target_list;
|
||||
struct module *source, *target;
|
||||
};
|
||||
|
||||
#ifndef __GENKSYMS__
|
||||
#ifdef CONFIG_MODVERSIONS
|
||||
/* Mark the CRC weak since genksyms apparently decides not to
|
||||
|
|
@ -359,7 +366,9 @@ struct module
|
|||
|
||||
#ifdef CONFIG_MODULE_UNLOAD
|
||||
/* What modules depend on me? */
|
||||
struct list_head modules_which_use_me;
|
||||
struct list_head source_list;
|
||||
/* What modules do I depend on? */
|
||||
struct list_head target_list;
|
||||
|
||||
/* Who is waiting for us to be unloaded */
|
||||
struct task_struct *waiter;
|
||||
|
|
@ -663,43 +672,10 @@ static inline int module_get_iter_tracepoints(struct tracepoint_iter *iter)
|
|||
|
||||
#endif /* CONFIG_MODULES */
|
||||
|
||||
struct device_driver;
|
||||
#ifdef CONFIG_SYSFS
|
||||
struct module;
|
||||
|
||||
extern struct kset *module_kset;
|
||||
extern struct kobj_type module_ktype;
|
||||
extern int module_sysfs_initialized;
|
||||
|
||||
int mod_sysfs_init(struct module *mod);
|
||||
int mod_sysfs_setup(struct module *mod,
|
||||
struct kernel_param *kparam,
|
||||
unsigned int num_params);
|
||||
int module_add_modinfo_attrs(struct module *mod);
|
||||
void module_remove_modinfo_attrs(struct module *mod);
|
||||
|
||||
#else /* !CONFIG_SYSFS */
|
||||
|
||||
static inline int mod_sysfs_init(struct module *mod)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int mod_sysfs_setup(struct module *mod,
|
||||
struct kernel_param *kparam,
|
||||
unsigned int num_params)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int module_add_modinfo_attrs(struct module *mod)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void module_remove_modinfo_attrs(struct module *mod)
|
||||
{ }
|
||||
|
||||
#endif /* CONFIG_SYSFS */
|
||||
|
||||
#define symbol_request(x) try_then_request_module(symbol_get(x), "symbol:" #x)
|
||||
|
|
|
|||
|
|
@ -397,7 +397,7 @@ struct xt_table_info {
|
|||
* @stacksize jumps (number of user chains) can possibly be made.
|
||||
*/
|
||||
unsigned int stacksize;
|
||||
unsigned int *stackptr;
|
||||
unsigned int __percpu *stackptr;
|
||||
void ***jumpstack;
|
||||
/* ipt_entry tables: one per CPU */
|
||||
/* Note : this field MUST be the last one, see XT_TABLE_INFO_SZ */
|
||||
|
|
|
|||
|
|
@ -632,6 +632,7 @@ void pci_fixup_cardbus(struct pci_bus *);
|
|||
|
||||
/* Generic PCI functions used internally */
|
||||
|
||||
void pcibios_scan_specific_bus(int busn);
|
||||
extern struct pci_bus *pci_find_bus(int domain, int busnr);
|
||||
void pci_bus_add_devices(const struct pci_bus *bus);
|
||||
struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
|
||||
|
|
|
|||
|
|
@ -2321,6 +2321,7 @@
|
|||
#define PCI_VENDOR_ID_JMICRON 0x197B
|
||||
#define PCI_DEVICE_ID_JMICRON_JMB360 0x2360
|
||||
#define PCI_DEVICE_ID_JMICRON_JMB361 0x2361
|
||||
#define PCI_DEVICE_ID_JMICRON_JMB362 0x2362
|
||||
#define PCI_DEVICE_ID_JMICRON_JMB363 0x2363
|
||||
#define PCI_DEVICE_ID_JMICRON_JMB365 0x2365
|
||||
#define PCI_DEVICE_ID_JMICRON_JMB366 0x2366
|
||||
|
|
@ -2532,11 +2533,63 @@
|
|||
#define PCI_DEVICE_ID_INTEL_ICH9_6 0x2930
|
||||
#define PCI_DEVICE_ID_INTEL_ICH9_7 0x2916
|
||||
#define PCI_DEVICE_ID_INTEL_ICH9_8 0x2918
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MCR 0x2c18
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_TAD 0x2c19
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_RAS 0x2c1a
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_TEST 0x2c1c
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_CH0_CTRL 0x2c20
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_CH0_ADDR 0x2c21
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_CH0_RANK 0x2c22
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_CH0_TC 0x2c23
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_CH1_CTRL 0x2c28
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_CH1_ADDR 0x2c29
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_CH1_RANK 0x2c2a
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_CH1_TC 0x2c2b
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_CH2_CTRL 0x2c30
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_CH2_ADDR 0x2c31
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_CH2_RANK 0x2c32
|
||||
#define PCI_DEVICE_ID_INTEL_I7_MC_CH2_TC 0x2c33
|
||||
#define PCI_DEVICE_ID_INTEL_I7_NONCORE 0x2c41
|
||||
#define PCI_DEVICE_ID_INTEL_I7_NONCORE_ALT 0x2c40
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE 0x2c50
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_ALT 0x2c51
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_NONCORE_REV2 0x2c70
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_SAD 0x2c81
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_QPI_LINK0 0x2c90
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_QPI_PHY0 0x2c91
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR 0x2c98
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD 0x2c99
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST 0x2c9C
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL 0x2ca0
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR 0x2ca1
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK 0x2ca2
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC 0x2ca3
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL 0x2ca8
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR 0x2ca9
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK 0x2caa
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC 0x2cab
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MCR_REV2 0x2d98
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TAD_REV2 0x2d99
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_RAS_REV2 0x2d9a
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_TEST_REV2 0x2d9c
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_CTRL_REV2 0x2da0
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_ADDR_REV2 0x2da1
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_RANK_REV2 0x2da2
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH0_TC_REV2 0x2da3
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_CTRL_REV2 0x2da8
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_ADDR_REV2 0x2da9
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_RANK_REV2 0x2daa
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH1_TC_REV2 0x2dab
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_CTRL_REV2 0x2db0
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_ADDR_REV2 0x2db1
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_RANK_REV2 0x2db2
|
||||
#define PCI_DEVICE_ID_INTEL_LYNNFIELD_MC_CH2_TC_REV2 0x2db3
|
||||
#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340
|
||||
#define PCI_DEVICE_ID_INTEL_IOAT_TBG4 0x3429
|
||||
#define PCI_DEVICE_ID_INTEL_IOAT_TBG5 0x342a
|
||||
#define PCI_DEVICE_ID_INTEL_IOAT_TBG6 0x342b
|
||||
#define PCI_DEVICE_ID_INTEL_IOAT_TBG7 0x342c
|
||||
#define PCI_DEVICE_ID_INTEL_X58_HUB_MGMT 0x342e
|
||||
#define PCI_DEVICE_ID_INTEL_IOAT_TBG0 0x3430
|
||||
#define PCI_DEVICE_ID_INTEL_IOAT_TBG1 0x3431
|
||||
#define PCI_DEVICE_ID_INTEL_IOAT_TBG2 0x3432
|
||||
|
|
|
|||
|
|
@ -131,11 +131,11 @@
|
|||
* Declaration/definition used for per-CPU variables that must be page aligned.
|
||||
*/
|
||||
#define DECLARE_PER_CPU_PAGE_ALIGNED(type, name) \
|
||||
DECLARE_PER_CPU_SECTION(type, name, ".page_aligned") \
|
||||
DECLARE_PER_CPU_SECTION(type, name, "..page_aligned") \
|
||||
__aligned(PAGE_SIZE)
|
||||
|
||||
#define DEFINE_PER_CPU_PAGE_ALIGNED(type, name) \
|
||||
DEFINE_PER_CPU_SECTION(type, name, ".page_aligned") \
|
||||
DEFINE_PER_CPU_SECTION(type, name, "..page_aligned") \
|
||||
__aligned(PAGE_SIZE)
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@ struct pt_regs;
|
|||
|
||||
extern int register_exec_domain(struct exec_domain *);
|
||||
extern int unregister_exec_domain(struct exec_domain *);
|
||||
extern int __set_personality(unsigned long);
|
||||
extern int __set_personality(unsigned int);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
|
|
|
|||
|
|
@ -139,7 +139,9 @@ void pipe_lock(struct pipe_inode_info *);
|
|||
void pipe_unlock(struct pipe_inode_info *);
|
||||
void pipe_double_lock(struct pipe_inode_info *, struct pipe_inode_info *);
|
||||
|
||||
extern unsigned int pipe_max_pages;
|
||||
extern unsigned int pipe_max_size, pipe_min_size;
|
||||
int pipe_proc_fn(struct ctl_table *, int, void __user *, size_t *, loff_t *);
|
||||
|
||||
|
||||
/* Drop the inode semaphore and wait for a pipe event, atomically */
|
||||
void pipe_wait(struct pipe_inode_info *pipe);
|
||||
|
|
|
|||
|
|
@ -2,9 +2,7 @@
|
|||
#define __LINUX_SERIAL_SCI_H
|
||||
|
||||
#include <linux/serial_core.h>
|
||||
#ifdef CONFIG_SERIAL_SH_SCI_DMA
|
||||
#include <asm/dmaengine.h>
|
||||
#endif
|
||||
#include <linux/sh_dma.h>
|
||||
|
||||
/*
|
||||
* Generic header for SuperH SCI(F) (used by sh/sh64/h8300 and related parts)
|
||||
|
|
|
|||
|
|
@ -380,7 +380,10 @@ struct sk_buff {
|
|||
kmemcheck_bitfield_begin(flags2);
|
||||
__u16 queue_mapping:16;
|
||||
#ifdef CONFIG_IPV6_NDISC_NODETYPE
|
||||
__u8 ndisc_nodetype:2;
|
||||
__u8 ndisc_nodetype:2,
|
||||
deliver_no_wcard:1;
|
||||
#else
|
||||
__u8 deliver_no_wcard:1;
|
||||
#endif
|
||||
kmemcheck_bitfield_end(flags2);
|
||||
|
||||
|
|
@ -501,7 +504,7 @@ static inline struct sk_buff *alloc_skb_fclone(unsigned int size,
|
|||
return __alloc_skb(size, priority, 1, -1);
|
||||
}
|
||||
|
||||
extern int skb_recycle_check(struct sk_buff *skb, int skb_size);
|
||||
extern bool skb_recycle_check(struct sk_buff *skb, int skb_size);
|
||||
|
||||
extern struct sk_buff *skb_morph(struct sk_buff *dst, struct sk_buff *src);
|
||||
extern struct sk_buff *skb_clone(struct sk_buff *skb,
|
||||
|
|
|
|||
|
|
@ -60,7 +60,7 @@
|
|||
/*
|
||||
* Must define these before including other files, inline functions need them
|
||||
*/
|
||||
#define LOCK_SECTION_NAME ".text.lock."KBUILD_BASENAME
|
||||
#define LOCK_SECTION_NAME ".text..lock."KBUILD_BASENAME
|
||||
|
||||
#define LOCK_SECTION_START(extra) \
|
||||
".subsection 1\n\t" \
|
||||
|
|
|
|||
|
|
@ -289,7 +289,7 @@ asmlinkage long sys_capget(cap_user_header_t header,
|
|||
cap_user_data_t dataptr);
|
||||
asmlinkage long sys_capset(cap_user_header_t header,
|
||||
const cap_user_data_t data);
|
||||
asmlinkage long sys_personality(u_long personality);
|
||||
asmlinkage long sys_personality(unsigned int personality);
|
||||
|
||||
asmlinkage long sys_sigpending(old_sigset_t __user *set);
|
||||
asmlinkage long sys_sigprocmask(int how, old_sigset_t __user *set,
|
||||
|
|
|
|||
|
|
@ -18,6 +18,16 @@
|
|||
/* v1.0 and v2.0 of this standard have many things in common. For the rest
|
||||
* of the definitions, please refer to audio.h */
|
||||
|
||||
static inline bool uac2_control_is_readable(u32 bmControls, u8 control)
|
||||
{
|
||||
return (bmControls >> (control * 2)) & 0x1;
|
||||
}
|
||||
|
||||
static inline bool uac2_control_is_writeable(u32 bmControls, u8 control)
|
||||
{
|
||||
return (bmControls >> (control * 2)) & 0x2;
|
||||
}
|
||||
|
||||
/* 4.7.2.1 Clock Source Descriptor */
|
||||
|
||||
struct uac_clock_source_descriptor {
|
||||
|
|
@ -31,6 +41,13 @@ struct uac_clock_source_descriptor {
|
|||
__u8 iClockSource;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* bmAttribute fields */
|
||||
#define UAC_CLOCK_SOURCE_TYPE_EXT 0x0
|
||||
#define UAC_CLOCK_SOURCE_TYPE_INT_FIXED 0x1
|
||||
#define UAC_CLOCK_SOURCE_TYPE_INT_VAR 0x2
|
||||
#define UAC_CLOCK_SOURCE_TYPE_INT_PROG 0x3
|
||||
#define UAC_CLOCK_SOURCE_SYNCED_TO_SOF (1 << 2)
|
||||
|
||||
/* 4.7.2.2 Clock Source Descriptor */
|
||||
|
||||
struct uac_clock_selector_descriptor {
|
||||
|
|
@ -39,8 +56,20 @@ struct uac_clock_selector_descriptor {
|
|||
__u8 bDescriptorSubtype;
|
||||
__u8 bClockID;
|
||||
__u8 bNrInPins;
|
||||
__u8 bmControls;
|
||||
__u8 baCSourceID[];
|
||||
/* bmControls, bAssocTerminal and iClockSource omitted */
|
||||
} __attribute__((packed));
|
||||
|
||||
/* 4.7.2.3 Clock Multiplier Descriptor */
|
||||
|
||||
struct uac_clock_multiplier_descriptor {
|
||||
__u8 bLength;
|
||||
__u8 bDescriptorType;
|
||||
__u8 bDescriptorSubtype;
|
||||
__u8 bClockID;
|
||||
__u8 bCSourceID;
|
||||
__u8 bmControls;
|
||||
__u8 iClockMultiplier;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* 4.7.2.4 Input terminal descriptor */
|
||||
|
|
|
|||
|
|
@ -47,6 +47,15 @@
|
|||
#define UAC_FORMAT_TYPE 0x02
|
||||
#define UAC_FORMAT_SPECIFIC 0x03
|
||||
|
||||
/* A.7 Processing Unit Process Types */
|
||||
#define UAC_PROCESS_UNDEFINED 0x00
|
||||
#define UAC_PROCESS_UP_DOWNMIX 0x01
|
||||
#define UAC_PROCESS_DOLBY_PROLOGIC 0x02
|
||||
#define UAC_PROCESS_STEREO_EXTENDER 0x03
|
||||
#define UAC_PROCESS_REVERB 0x04
|
||||
#define UAC_PROCESS_CHORUS 0x05
|
||||
#define UAC_PROCESS_DYN_RANGE_COMP 0x06
|
||||
|
||||
/* A.8 Audio Class-Specific Endpoint Descriptor Subtypes */
|
||||
#define UAC_EP_GENERAL 0x01
|
||||
|
||||
|
|
@ -73,6 +82,60 @@
|
|||
|
||||
#define UAC_GET_STAT 0xff
|
||||
|
||||
/* A.10 Control Selector Codes */
|
||||
|
||||
/* A.10.1 Terminal Control Selectors */
|
||||
#define UAC_TERM_COPY_PROTECT 0x01
|
||||
|
||||
/* A.10.2 Feature Unit Control Selectors */
|
||||
#define UAC_FU_MUTE 0x01
|
||||
#define UAC_FU_VOLUME 0x02
|
||||
#define UAC_FU_BASS 0x03
|
||||
#define UAC_FU_MID 0x04
|
||||
#define UAC_FU_TREBLE 0x05
|
||||
#define UAC_FU_GRAPHIC_EQUALIZER 0x06
|
||||
#define UAC_FU_AUTOMATIC_GAIN 0x07
|
||||
#define UAC_FU_DELAY 0x08
|
||||
#define UAC_FU_BASS_BOOST 0x09
|
||||
#define UAC_FU_LOUDNESS 0x0a
|
||||
|
||||
#define UAC_CONTROL_BIT(CS) (1 << ((CS) - 1))
|
||||
|
||||
/* A.10.3.1 Up/Down-mix Processing Unit Controls Selectors */
|
||||
#define UAC_UD_ENABLE 0x01
|
||||
#define UAC_UD_MODE_SELECT 0x02
|
||||
|
||||
/* A.10.3.2 Dolby Prologic (tm) Processing Unit Controls Selectors */
|
||||
#define UAC_DP_ENABLE 0x01
|
||||
#define UAC_DP_MODE_SELECT 0x02
|
||||
|
||||
/* A.10.3.3 3D Stereo Extender Processing Unit Control Selectors */
|
||||
#define UAC_3D_ENABLE 0x01
|
||||
#define UAC_3D_SPACE 0x02
|
||||
|
||||
/* A.10.3.4 Reverberation Processing Unit Control Selectors */
|
||||
#define UAC_REVERB_ENABLE 0x01
|
||||
#define UAC_REVERB_LEVEL 0x02
|
||||
#define UAC_REVERB_TIME 0x03
|
||||
#define UAC_REVERB_FEEDBACK 0x04
|
||||
|
||||
/* A.10.3.5 Chorus Processing Unit Control Selectors */
|
||||
#define UAC_CHORUS_ENABLE 0x01
|
||||
#define UAC_CHORUS_LEVEL 0x02
|
||||
#define UAC_CHORUS_RATE 0x03
|
||||
#define UAC_CHORUS_DEPTH 0x04
|
||||
|
||||
/* A.10.3.6 Dynamic Range Compressor Unit Control Selectors */
|
||||
#define UAC_DCR_ENABLE 0x01
|
||||
#define UAC_DCR_RATE 0x02
|
||||
#define UAC_DCR_MAXAMPL 0x03
|
||||
#define UAC_DCR_THRESHOLD 0x04
|
||||
#define UAC_DCR_ATTACK_TIME 0x05
|
||||
#define UAC_DCR_RELEASE_TIME 0x06
|
||||
|
||||
/* A.10.4 Extension Unit Control Selectors */
|
||||
#define UAC_XU_ENABLE 0x01
|
||||
|
||||
/* MIDI - A.1 MS Class-Specific Interface Descriptor Subtypes */
|
||||
#define UAC_MS_HEADER 0x01
|
||||
#define UAC_MIDI_IN_JACK 0x02
|
||||
|
|
@ -244,7 +307,7 @@ struct uac_selector_unit_descriptor {
|
|||
static inline __u8 uac_selector_unit_iSelector(struct uac_selector_unit_descriptor *desc)
|
||||
{
|
||||
__u8 *raw = (__u8 *) desc;
|
||||
return raw[9 + desc->bLength - 1];
|
||||
return raw[desc->bLength - 1];
|
||||
}
|
||||
|
||||
/* 4.3.2.5 Feature Unit Descriptor */
|
||||
|
|
@ -463,31 +526,6 @@ struct uac_iso_endpoint_descriptor {
|
|||
#define UAC_EP_CS_ATTR_PITCH_CONTROL 0x02
|
||||
#define UAC_EP_CS_ATTR_FILL_MAX 0x80
|
||||
|
||||
/* A.10.2 Feature Unit Control Selectors */
|
||||
|
||||
#define UAC_FU_CONTROL_UNDEFINED 0x00
|
||||
#define UAC_MUTE_CONTROL 0x01
|
||||
#define UAC_VOLUME_CONTROL 0x02
|
||||
#define UAC_BASS_CONTROL 0x03
|
||||
#define UAC_MID_CONTROL 0x04
|
||||
#define UAC_TREBLE_CONTROL 0x05
|
||||
#define UAC_GRAPHIC_EQUALIZER_CONTROL 0x06
|
||||
#define UAC_AUTOMATIC_GAIN_CONTROL 0x07
|
||||
#define UAC_DELAY_CONTROL 0x08
|
||||
#define UAC_BASS_BOOST_CONTROL 0x09
|
||||
#define UAC_LOUDNESS_CONTROL 0x0a
|
||||
|
||||
#define UAC_FU_MUTE (1 << (UAC_MUTE_CONTROL - 1))
|
||||
#define UAC_FU_VOLUME (1 << (UAC_VOLUME_CONTROL - 1))
|
||||
#define UAC_FU_BASS (1 << (UAC_BASS_CONTROL - 1))
|
||||
#define UAC_FU_MID (1 << (UAC_MID_CONTROL - 1))
|
||||
#define UAC_FU_TREBLE (1 << (UAC_TREBLE_CONTROL - 1))
|
||||
#define UAC_FU_GRAPHIC_EQ (1 << (UAC_GRAPHIC_EQUALIZER_CONTROL - 1))
|
||||
#define UAC_FU_AUTO_GAIN (1 << (UAC_AUTOMATIC_GAIN_CONTROL - 1))
|
||||
#define UAC_FU_DELAY (1 << (UAC_DELAY_CONTROL - 1))
|
||||
#define UAC_FU_BASS_BOOST (1 << (UAC_BASS_BOOST_CONTROL - 1))
|
||||
#define UAC_FU_LOUDNESS (1 << (UAC_LOUDNESS_CONTROL - 1))
|
||||
|
||||
/* status word format (3.7.1.1) */
|
||||
|
||||
#define UAC1_STATUS_TYPE_ORIG_MASK 0x0f
|
||||
|
|
|
|||
|
|
@ -5,6 +5,27 @@
|
|||
* (C) Copyright 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
||||
* (C) Copyright 2007 Paulo R. Zanoni <przanoni@gmail.com>
|
||||
* (C) Copyright 2007, 2009 Tiago Vignatti <vignatti@freedesktop.org>
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS
|
||||
* IN THE SOFTWARE.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef LINUX_VGA_H
|
||||
|
|
|
|||
|
|
@ -56,24 +56,6 @@ struct writeback_control {
|
|||
unsigned for_reclaim:1; /* Invoked from the page allocator */
|
||||
unsigned range_cyclic:1; /* range_start is cyclic */
|
||||
unsigned more_io:1; /* more io to be dispatched */
|
||||
/*
|
||||
* write_cache_pages() won't update wbc->nr_to_write and
|
||||
* mapping->writeback_index if no_nrwrite_index_update
|
||||
* is set. write_cache_pages() may write more than we
|
||||
* requested and we want to make sure nr_to_write and
|
||||
* writeback_index are updated in a consistent manner
|
||||
* so we use a single control to update them
|
||||
*/
|
||||
unsigned no_nrwrite_index_update:1;
|
||||
|
||||
/*
|
||||
* For WB_SYNC_ALL, the sb must always be pinned. For WB_SYNC_NONE,
|
||||
* the writeback code will pin the sb for the caller. However,
|
||||
* for eg umount, the caller does WB_SYNC_NONE but already has
|
||||
* the sb pinned. If the below is set, caller already has the
|
||||
* sb pinned.
|
||||
*/
|
||||
unsigned sb_pinned:1;
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -82,7 +64,6 @@ struct writeback_control {
|
|||
struct bdi_writeback;
|
||||
int inode_wait(void *);
|
||||
void writeback_inodes_sb(struct super_block *);
|
||||
void writeback_inodes_sb_locked(struct super_block *);
|
||||
int writeback_inodes_sb_if_idle(struct super_block *);
|
||||
void sync_inodes_sb(struct super_block *);
|
||||
void writeback_inodes_wbc(struct writeback_control *wbc);
|
||||
|
|
|
|||
Loading…
Reference in a new issue